Commit 8739a96 1 parent 004ecce commit 8739a96 Copy full SHA for 8739a96
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1 file changed +7
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lines changed Original file line number Diff line number Diff line change @@ -527,6 +527,8 @@ def _build_if_else_circuit(
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circ = circ_builder .circuit ()
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if isinstance (if_else_op .condition [0 ], Clbit ):
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+ if len (bits ) != 1 :
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+ raise NotImplementedError ("Conditions on multiple bits not yet supported" )
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circ .add_circbox (
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circbox = if_box ,
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args = qubits ,
@@ -535,11 +537,6 @@ def _build_if_else_circuit(
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)
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# If we have an else_box defined, add it to the circuit
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if else_box is not None :
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- if if_else_op .condition [1 ] not in {0 , 1 }:
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- raise ValueError (
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- "A bit must have condition value 0 or 1"
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- + f", got { if_else_op .condition [1 ]} "
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- )
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circ .add_circbox (
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circbox = else_box ,
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args = qubits ,
@@ -560,6 +557,11 @@ def _build_if_else_circuit(
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args = qubits ,
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condition = reg_neq (pytket_bit_reg , if_else_op .condition [1 ]),
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)
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+ else :
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+ raise TypeError (
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+ "Unrecognized type used to construct IfElseOp. Expected "
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+ + f"ClBit or ClassicalRegister, got { type (if_else_op .condition [0 ])} "
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+ )
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return circ
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