Fix bit rotates (#1062) by using == 0 instead of != 0 for mask_is_zero.

Author: eddyb

CHANGELOG.md

@@ -30,13 +30,16 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 ## [Unreleased]
 
 ### Changed 🛠
-- [PR#1127](https://github.com/EmbarkStudios/rust-gpu/pull/1127) updated `spirv-tools` to `0.10.0`, which follows `vulkan-sdk-1.3.275`.
-- [PR#1101](https://github.com/EmbarkStudios/rust-gpu/pull/1101) Add `ignore` and `no_run` to documentation to make `cargo test` pass.
+- [PR#1127](https://github.com/EmbarkStudios/rust-gpu/pull/1127) updated `spirv-tools` to `0.10.0`, which follows `vulkan-sdk-1.3.275`
+- [PR#1101](https://github.com/EmbarkStudios/rust-gpu/pull/1101) added `ignore` and `no_run` to documentation to make `cargo test` pass
 - [PR#1112](https://github.com/EmbarkStudios/rust-gpu/pull/1112) updated wgpu and winit in example runners
 - [PR#1100](https://github.com/EmbarkStudios/rust-gpu/pull/1100) updated toolchain to `nightly-2023-09-30`
 - [PR#1091](https://github.com/EmbarkStudios/rust-gpu/pull/1091) updated toolchain to `nightly-2023-08-29`
 - [PR#1085](https://github.com/EmbarkStudios/rust-gpu/pull/1085) updated toolchain to `nightly-2023-07-08`
 
+### Fixed 🩹
+- [PR#1129](https://github.com/EmbarkStudios/rust-gpu/pull/1129) fixed [#1062](https://github.com/EmbarkStudios/rust-gpu/issues/1062) by not flipping the comparison of the rotate amount with zero
+
 ## [0.9.0]
 
 ### Added ⭐

crates/rustc_codegen_spirv/src/builder/mod.rs

@@ -242,7 +242,7 @@ impl<'a, 'tcx> Builder<'a, 'tcx> {
         // So we need to check for zero shift, and don't use the shift result if it is.
         let mask_is_zero = self
             .emit()
-            .i_not_equal(bool, None, mask_shift.def(self), zero.def(self))
+            .i_equal(bool, None, mask_shift.def(self), zero.def(self))
             .unwrap()
             .with_type(bool);
         self.select(mask_is_zero, value, or)

tests/ui/dis/issue-1062.stderr

@@ -10,14 +10,14 @@ OpLine %11 1142 4
 %16 = OpShiftLeftLogical  %7  %6 %12
 %17 = OpShiftRightLogical  %7  %6 %14
 %18 = OpBitwiseOr  %7  %16 %17
-%19 = OpINotEqual  %20  %12 %21
+%19 = OpIEqual  %20  %12 %21
 %22 = OpSelect  %7  %19 %6 %18
 %23 = OpBitwiseAnd  %7  %9 %13
 %24 = OpISub  %7  %15 %23
 %25 = OpShiftRightLogical  %7  %6 %23
 %26 = OpShiftLeftLogical  %7  %6 %24
 %27 = OpBitwiseOr  %7  %25 %26
-%28 = OpINotEqual  %20  %23 %21
+%28 = OpIEqual  %20  %23 %21
 %29 = OpSelect  %7  %28 %6 %27
 OpLine %5 12 4
 %30 = OpAccessChain  %31  %32 %21