@@ -27,6 +27,8 @@ LOG_MODULE_REGISTER(LOG_DOMAIN);
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#define STM32_SERIES_MAX_FLASH 2048
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#endif
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+ #define PAGES_PER_BANK ((FLASH_SIZE / FLASH_PAGE_SIZE) / 2)
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+
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#define BANK2_OFFSET (KB(STM32_SERIES_MAX_FLASH) / 2)
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#define ICACHE_DISABLE_TIMEOUT_VALUE 1U /* 1ms */
@@ -356,50 +358,52 @@ void flash_stm32_page_layout(const struct device *dev,
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{
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FLASH_TypeDef * regs = FLASH_STM32_REGS (dev );
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static struct flash_pages_layout stm32_flash_layout [3 ];
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- #define PAGES_PER_BANK ((FLASH_SIZE / FLASH_PAGE_SIZE) / 2)
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+
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+ * layout = stm32_flash_layout ;
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+ * layout_size = ARRAY_SIZE (stm32_flash_layout );
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+
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+ if (stm32_flash_layout [0 ].pages_count != 0 ) {
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+ /* Short circuit calculation logic if already performed */
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+ return ;
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+ }
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if (((regs -> OPTR & FLASH_STM32_DBANK ) == FLASH_STM32_DBANK ) &&
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(CONFIG_FLASH_SIZE < STM32_SERIES_MAX_FLASH )) {
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/*
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- * For stm32l552xx with 256 KB flash
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- * or For stm32u57x with 1MB flash
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+ * For stm32l552xx with 256 kB flash or stm32u57x with 1MB flash
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+ * which have space between banks 1 and 2.
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*/
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- if (stm32_flash_layout [0 ].pages_count == 0 ) {
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- /* Bank1 */
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- stm32_flash_layout [0 ].pages_count = PAGES_PER_BANK ;
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- stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE ;
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- /* Dummy page corresponding to discontinuity between
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- * bank 1/2
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- */
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- stm32_flash_layout [1 ].pages_count = 1 ;
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- stm32_flash_layout [1 ].pages_size = BANK2_OFFSET
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- - (PAGES_PER_BANK * FLASH_PAGE_SIZE );
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- /* Bank2 */
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- stm32_flash_layout [2 ].pages_count = PAGES_PER_BANK ;
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- stm32_flash_layout [2 ].pages_size = FLASH_PAGE_SIZE ;
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- }
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+
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+ /* Bank1 */
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+ stm32_flash_layout [0 ].pages_count = PAGES_PER_BANK ;
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+ stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE ;
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+
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+ /* Dummy page corresponding to space between banks 1 and 2 */
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+ stm32_flash_layout [1 ].pages_count = 1 ;
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+ stm32_flash_layout [1 ].pages_size = BANK2_OFFSET
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+ - (PAGES_PER_BANK * FLASH_PAGE_SIZE );
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+
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+ /* Bank2 */
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+ stm32_flash_layout [2 ].pages_count = PAGES_PER_BANK ;
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+ stm32_flash_layout [2 ].pages_size = FLASH_PAGE_SIZE ;
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} else {
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/*
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- * For stm32l562xx & stm32l552xx with 512 KB flash
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- * or For stm32u58x with 2MB flash
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+ * For stm32l562xx & stm32l552xx with 512 flash or stm32u58x
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+ * with 2MB flash which has no space between banks 1 and 2.
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*/
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- if (stm32_flash_layout [ 0 ]. pages_count == 0 ) {
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- if (( regs -> OPTR & FLASH_STM32_DBANK ) == FLASH_STM32_DBANK ) {
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- /* flash with dualbank has 2k pages */
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- stm32_flash_layout [0 ].pages_count = FLASH_SIZE / FLASH_PAGE_SIZE ;
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- stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE ;
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+ if (( regs -> OPTR & FLASH_STM32_DBANK ) == FLASH_STM32_DBANK ) {
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+ /* L5 flash with dualbank has 2k pages */
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+ /* U5 flash pages are always 8 kB in size */
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+ stm32_flash_layout [0 ].pages_count = FLASH_SIZE / FLASH_PAGE_SIZE ;
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+ stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE ;
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#if defined(CONFIG_SOC_SERIES_STM32L5X )
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- } else {
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- /* flash without dualbank has 4k pages */
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- stm32_flash_layout [0 ].pages_count = FLASH_PAGE_NB_128_BITS ;
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- stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE_128_BITS ;
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-
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+ } else {
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+ /* L5 flash without dualbank has 4k pages */
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+ stm32_flash_layout [0 ].pages_count = FLASH_PAGE_NB_128_BITS ;
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+ stm32_flash_layout [0 ].pages_size = FLASH_PAGE_SIZE_128_BITS ;
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#endif /* CONFIG_SOC_SERIES_STM32L5X */
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- }
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}
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}
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- * layout = stm32_flash_layout ;
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- * layout_size = ARRAY_SIZE (stm32_flash_layout );
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}
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