Boot Sequence
This page aims to outline the boot sequence of ADSP-SC5xx platforms.
The Boot ROM is responsible for initial start up - when the board powers on, the cores are brought online, and the Arm core will begin executing from the Boot ROM.
The Boot ROM will then boot the system according to the Boot Mode - set by a rotary switch on the carrier boards, or 3 pins on the SoC more generally. Boot modes 0 through 6 are available, with 7 reserved. They are defined in the HRM of the relevant SoC (Table 47-15 for the SC598, for example) as follows:
| Number (SC57x) | Number (SC58x) | Number (SC59x) | Boot Source | Description |
|---|---|---|---|---|
| 0 | 0 | 0 | No Boot | The processor does not boot. Rather the boot kernel executes some of the preboot operations then enters an endless WFI/IDLE state. Used generally when there is no other boot source available, e.g. during first setup or if the usual boot source is corrupted, or in debugging. JTAG or another debugging connection can then be used to boot the system. |
| 1 | 1 | 1 | SPI Controller Boot | Boot from the onboard SPI Flash memory. The most commonly used mode to boot U-Boot and Linux. |
| 2 | 2 | 2 | SPI Target Boot | Boot from the SPI interface, configured as a target. |
| 3 | 7 | 3 | UART Boot | Boot through the UART interface, configured as a target. |
| 4 | 6 | 4 | LINKPORT Boot | Boot through the LINKPORT peripheral, configured as a target. Only available on some systems. |
| - | - | 5 | OSPI Controller Boot | Boot from the onboard Octal SPI Flash memory. Only available on systems with OSPI. |
| - | - | 6 | eMMC Controller Boot | Boot from an eMMC card. |
| 5,6,7 | 3,4,5 | 7 | Reserved | - |
Note, there are Controller and Target boot modes. In Target boot modes, the processor functions as a target to a host device. In these modes, the host device usually applies the reset sequence and waits until the processor is ready to boot, depending on the peripheral in use, and transmits the boot stream data to the processor. In Controller boot modes, the processor controls the peripheral and requests data via the peripheral as and when required.
Below is a flowchart that gives an overview of the U-Boot/Linux boot process in some of these modes.
