Make argument order of imap_go's black box consistent with #2543

Fixes #2904

Author: martijnbastiaan

clash-lib/prims/systemverilog/Clash_Sized_Vector.primitives.yaml

@@ -148,21 +148,21 @@
 - BlackBox:
     name: Clash.Sized.Vector.imap_go
     kind: Declaration
-    type: 'imap_go :: Index n -> (Index n -> a -> b) -> Vec m a -> Vec m b'
+    type: 'imap_go :: (Index n -> a -> b) -> Vec m a -> Index n -> Vec m b'
     template: |-
       // imap begin
       genvar ~GENSYM[n][1];
       ~GENERATE
       for (~SYM[1]=0; ~SYM[1] < $size(~RESULT); ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]
-        ~TYP[0] ~GENSYM[i][3];
-        assign ~SYM[3] = ~SYM[1] + ~ARG[0];~IF~SIZE[~TYP[2]]~THEN
-        ~TYPEL[~TYP[2]] ~GENSYM[imap_in][4];
-        assign ~SYM[4] = ~FROMBV[~VAR[vec][2][\~SYM[1]\]][~TYPEL[~TYP[2]]];~ELSE ~FI
+        ~TYP[2] ~GENSYM[i][3];
+        assign ~SYM[3] = ~SYM[1] + ~ARG[2];~IF~SIZE[~TYP[1]]~THEN
+        ~TYPEL[~TYP[1]] ~GENSYM[imap_in][4];
+        assign ~SYM[4] = ~FROMBV[~VAR[vec][1][\~SYM[1]\]][~TYPEL[~TYP[1]]];~ELSE ~FI
         ~TYPEL[~TYPO] ~GENSYM[imap_out][5];
-        ~INST 1
+        ~INST 0
           ~OUTPUT <= ~SYM[5]~ ~TYPEL[~TYPO]~
-          ~INPUT  <= ~SYM[3]~ ~TYP[0]~
-          ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[2]]~
+          ~INPUT  <= ~SYM[3]~ ~TYP[2]~
+          ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[1]]~
         ~INST
         assign ~RESULT[~SYM[1]] = ~TOBV[~SYM[5]][~TYPEL[~TYPO]];
       end

clash-lib/prims/verilog/Clash_Sized_Vector.primitives.yaml

@@ -127,22 +127,22 @@
 - BlackBox:
     name: Clash.Sized.Vector.imap_go
     kind: Declaration
-    type: 'imap :: Index n -> (Index n -> a -> b) -> Vec m a -> Vec m b'
+    type: 'imap_go :: (Index n -> a -> b) -> Vec m a -> Index n -> Vec m b'
     template: |-
       // imap begin
       genvar ~GENSYM[i][1];
       ~GENERATE
       for (~SYM[1]=0; ~SYM[1] < ~LENGTH[~TYPO]; ~SYM[1] = ~SYM[1] + 1) begin : ~GENSYM[imap][2]
-        wire ~TYP[0] ~GENSYM[map_index][3];~IF~SIZE[~TYP[2]]~THEN
-        wire ~TYPEL[~TYP[2]] ~GENSYM[map_in][4];
-        assign ~SYM[4] = ~VAR[vec][2][~SYM[1]*~SIZE[~TYPEL[~TYP[2]]]+:~SIZE[~TYPEL[~TYP[2]]]];~ELSE ~FI
-        ~OUTPUTUSAGE[1] ~TYPEL[~TYPO] ~GENSYM[map_out][5];
+        wire ~TYP[2] ~GENSYM[map_index][3];~IF~SIZE[~TYP[1]]~THEN
+        wire ~TYPEL[~TYP[1]] ~GENSYM[map_in][4];
+        assign ~SYM[4] = ~VAR[vec][1][~SYM[1]*~SIZE[~TYPEL[~TYP[1]]]+:~SIZE[~TYPEL[~TYP[1]]]];~ELSE ~FI
+        ~OUTPUTUSAGE[0] ~TYPEL[~TYPO] ~GENSYM[map_out][5];
 
-        assign ~SYM[3] = ~SIZE[~TYP[0]]'d~MAXINDEX[~TYPO] - ~SYM[1][0+:~SIZE[~TYP[0]]] + ~ARG[0];
-        ~INST 1
+        assign ~SYM[3] = ~SIZE[~TYP[2]]'d~MAXINDEX[~TYPO] - ~SYM[1][0+:~SIZE[~TYP[2]]] + ~ARG[2];
+        ~INST 0
           ~OUTPUT <= ~SYM[5]~ ~TYPEL[~TYPO]~
-          ~INPUT  <= ~SYM[3]~ ~TYP[0]~
-          ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[2]]~
+          ~INPUT  <= ~SYM[3]~ ~TYP[2]~
+          ~INPUT  <= ~SYM[4]~ ~TYPEL[~TYP[1]]~
         ~INST
         assign ~RESULT[~SYM[1]*~SIZE[~TYPEL[~TYPO]]+:~SIZE[~TYPEL[~TYPO]]] = ~SYM[5];
       end

clash-lib/prims/vhdl/Clash_Sized_Vector.primitives.yaml

@@ -148,30 +148,30 @@
 - BlackBox:
     name: Clash.Sized.Vector.imap_go
     kind: Declaration
-    type: 'imap_go :: Index n -> (Index n -> a -> b) -> Vec m a -> Vec m b'
+    type: 'imap_go :: (Index n -> a -> b) -> Vec m a -> Index n -> Vec m b'
     template: |-
       -- imap_go begin
-      ~GENSYM[imap][5] : for ~GENSYM[i][1] in ~RESULT'range generate~IF ~VIVADO ~THEN~IF~SIZE[~TYP[2]]~THEN
-        signal ~GENSYM[map_in][2]  : ~TYPEL[~TYP[2]];~ELSE ~FI
+      ~GENSYM[imap][5] : for ~GENSYM[i][1] in ~RESULT'range generate~IF ~VIVADO ~THEN~IF~SIZE[~TYP[1]]~THEN
+        signal ~GENSYM[map_in][2]  : ~TYPEL[~TYP[1]];~ELSE ~FI
         signal ~GENSYM[map_out][3] : ~TYPEL[~TYPO];
-        signal ~GENSYM[i2][4]      : ~TYP[0];
-      begin~IF~SIZE[~TYP[2]]~THEN
-        ~SYM[2] <= fromSLV(~VAR[vec][2](~SYM[1]));~ELSE ~FI
-        ~SYM[4] <= ~ARG[0] + to_unsigned(~SYM[1],~SIZE[~TYP[0]]);
-        ~INST 1
+        signal ~GENSYM[i2][4]      : ~TYP[2];
+      begin~IF~SIZE[~TYP[1]]~THEN
+        ~SYM[2] <= fromSLV(~VAR[vec][1](~SYM[1]));~ELSE ~FI
+        ~SYM[4] <= ~ARG[2] + to_unsigned(~SYM[1],~SIZE[~TYP[2]]);
+        ~INST 0
           ~OUTPUT <= ~SYM[3]~ ~TYPEL[~TYPO]~
-          ~INPUT  <= ~SYM[4]~ ~TYP[0]~
-          ~INPUT  <= ~SYM[2]~ ~TYPEL[~TYP[2]]~
+          ~INPUT  <= ~SYM[4]~ ~TYP[2]~
+          ~INPUT  <= ~SYM[2]~ ~TYPEL[~TYP[1]]~
         ~INST
         ~RESULT(~SYM[1]) <= ~TOBV[~SYM[3]][~TYPEL[~TYPO]];
       end generate;~ELSE
-        signal ~SYM[4] : ~TYP[0];
+        signal ~SYM[4] : ~TYP[2];
       begin
-        ~SYM[4] <= ~ARG[0] + to_unsigned(~SYM[1],~SIZE[~TYP[0]]);
-        ~INST 1
+        ~SYM[4] <= ~ARG[2] + to_unsigned(~SYM[1],~SIZE[~TYP[2]]);
+        ~INST 0
           ~OUTPUT <= ~RESULT(~SYM[1])~ ~TYPEL[~TYPO]~
-          ~INPUT  <= ~SYM[4]~ ~TYP[0]~
-          ~INPUT  <= ~VAR[vec][2](~SYM[1])~ ~TYPEL[~TYP[2]]~
+          ~INPUT  <= ~SYM[4]~ ~TYP[2]~
+          ~INPUT  <= ~VAR[vec][1](~SYM[1])~ ~TYPEL[~TYP[1]]~
         ~INST
       end generate;~FI
       -- imap_go end