We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
GPIO 7 on output 3 is used as hardware chip select/enable pin for SPI0. Users need to disable CE pins on SPI0 to use this pin.
The text was updated successfully, but these errors were encountered:
dereulenspiegel
No branches or pull requests
GPIO 7 on output 3 is used as hardware chip select/enable pin for SPI0. Users need to disable CE pins on SPI0 to use this pin.
The text was updated successfully, but these errors were encountered: