From a86a7c13b495044851ce808df7250a5b2f7be262 Mon Sep 17 00:00:00 2001
From: "Wojciech M. Zabolotny" <wzab01@gmail.com>
Date: Fri, 5 Aug 2016 00:12:40 +0200
Subject: [PATCH] The verilator testbench extended with possibility to dump the
 memory image with all currently defined words to the mem_dump.hex file, that
 can be used instead of the original nuc.hex to generate the memory image for
 FPGA synthesis. That allows having the J1B with all needed words defined
 immediately after the FPGA is configured.

---
 j1b/mem_dump.fs                     |  5 +++++
 j1b/user.fs                         |  4 ++++
 j1b/verilator/j1b.v                 | 21 +++++++++++++++++----
 j1b/verilator/localtest_gen_hex     | 15 +++++++++++++++
 j1b/verilator/localtest_interactive | 14 ++++++++++++++
 5 files changed, 55 insertions(+), 4 deletions(-)
 create mode 100644 j1b/mem_dump.fs
 create mode 100644 j1b/user.fs
 create mode 100755 j1b/verilator/localtest_gen_hex
 create mode 100755 j1b/verilator/localtest_interactive

diff --git a/j1b/mem_dump.fs b/j1b/mem_dump.fs
new file mode 100644
index 0000000..5dca2ef
--- /dev/null
+++ b/j1b/mem_dump.fs
@@ -0,0 +1,5 @@
+\ Written by Wojciech M. Zabolotny for the testbench with memory dump
+\ feature
+$2345 io@ \ Dump the memory to mem_dump.hex
+
+
diff --git a/j1b/user.fs b/j1b/user.fs
new file mode 100644
index 0000000..353d60e
--- /dev/null
+++ b/j1b/user.fs
@@ -0,0 +1,4 @@
+\ Put your words here
+: user_test
+  ." This is a simple user defined word "
+;
diff --git a/j1b/verilator/j1b.v b/j1b/verilator/j1b.v
index d0e40af..507492a 100644
--- a/j1b/verilator/j1b.v
+++ b/j1b/verilator/j1b.v
@@ -60,8 +60,8 @@ module j1b(input wire clk,
 
   // ######   UART   ##########################################
 
-  wire uart0_wr = io_wr_ & io_addr_[12];
-  wire uart0_rd = io_rd_ & io_addr_[12];
+  wire uart0_wr = io_wr_ & ( io_addr_ == 16'h1000 );
+  wire uart0_rd = io_rd_ & ( io_addr_ == 16'h1000 );
   assign uart_w = dout_[7:0];
 
   // always @(posedge clk) begin
@@ -79,7 +79,20 @@ module j1b(input wire clk,
   */
 
   assign io_din =
-    (io_addr_[12] ? {24'd0, uart0_data}                                  : 32'd0) |
-    (io_addr_[13] ? {28'd0, 1'b0, 1'b0, uart0_valid, 1'b1} : 32'd0);
+    (io_addr_ == 16'h1000 ? {24'd0, uart0_data}                                  : 32'd0) |
+    (io_addr_ == 16'h2000 ? {28'd0, 1'b0, 1'b0, uart0_valid, 1'b1} : 32'd0);
+
+   // ###### DUMP MEMORY FUNCTION #############################
+   int fout;
+   int i;   
+   always @(posedge clk) begin
+      if ( io_rd_ & ( io_addr_== 16'h2345 )) begin
+	   fout = $fopen("mem_dump.hex","w");
+           for(i=0;i<=8191;i++)
+		$fdisplay(fout,"%8.8h",ram[i]);
+	   $fclose(fout);
+      end
+   end
 
 endmodule
+
diff --git a/j1b/verilator/localtest_gen_hex b/j1b/verilator/localtest_gen_hex
new file mode 100755
index 0000000..390d00b
--- /dev/null
+++ b/j1b/verilator/localtest_gen_hex
@@ -0,0 +1,15 @@
+set -e
+make
+
+# ( echo
+#   python expand.py ../swapforth.fs ../../demos/factorials.fs
+#   echo 42 FAC .FAC
+# ) |
+# obj_dir/Vj1a ../build/nuc.hex
+# # grep 1,405,006,117,752,879,898,543,142,606,244,511,569,936,384,000,000,000
+
+echo |
+python shell.py -p ../ -p ../../common -p ../../anstests/ -p ../../../forth \
+-e '#noverbose' swapforth.fs \
+user.fs mem_dump.fs
+#../runtests.fs # ../../demos/factorials.fs
diff --git a/j1b/verilator/localtest_interactive b/j1b/verilator/localtest_interactive
new file mode 100755
index 0000000..2a83803
--- /dev/null
+++ b/j1b/verilator/localtest_interactive
@@ -0,0 +1,14 @@
+set -e
+make
+
+# ( echo
+#   python expand.py ../swapforth.fs ../../demos/factorials.fs
+#   echo 42 FAC .FAC
+# ) |
+# obj_dir/Vj1a ../build/nuc.hex
+# # grep 1,405,006,117,752,879,898,543,142,606,244,511,569,936,384,000,000,000
+
+#echo |
+python shell.py -p ../ -p ../../common -p ../../anstests/ -e '#noverbose' swapforth.fs \
+user.fs
+#../runtests.fs # ../../demos/factorials.fs