[GPU] Add remove reorder pattern i32 to f16

Author: kelvinchoi-intel

src/plugins/intel_gpu/src/graph/gather.cpp

@@ -139,7 +139,8 @@ void gather_inst::on_execute() {
 void gather_inst::update_output_memory() {
     if (!can_be_optimized())
         return;
-    if (static_cast<bool>(_outputs[0]) && _network.get_engine().is_the_same_buffer(output_memory(), input_memory()))
+    if (static_cast<bool>(_outputs[0]) && _network.get_engine().is_the_same_buffer(output_memory(), input_memory()) &&
+        output_memory().get_layout() == _impl_params->get_output_layout())
         return;
 
     if (_node != nullptr)

src/plugins/intel_gpu/src/graph/graph_optimizer/remove_redundant_reorders.cpp

@@ -696,6 +696,55 @@ void remove_redundant_reorders::run(program& p) {
         p.remove_if_dangling(*node);
     }
 
+    // Remove reorder for data type convert
+    // Target pattern: F32 -> I32 -> F16 reorder
+    // F32 -> I32 -> F32 reorder should be done before here
+    itr = p.get_processing_order().begin();
+    while (itr != p.get_processing_order().end()) {
+        auto& node = *itr++;
+        if (!node->is_type<reorder>())
+            continue;
+
+        auto& deps = node->get_dependencies();
+        if (deps.size() != 1)
+            continue;
+
+        auto& dep = *deps[0].first;
+        if (dep.is_type<reorder>())
+            continue;
+
+        bool allowed_dep_input_type = true;
+        auto dep_input_layouts = dep.get_input_layouts();
+        for (auto& l : dep_input_layouts) {
+            if (l.data_type != data_types::f32) {
+                allowed_dep_input_type = false;
+                continue;
+            }
+        }
+
+        auto dep_output_layout = dep.get_output_layout();
+        auto node_output_layout = node->get_output_layout();
+        if (!(allowed_dep_input_type &&
+            dep_output_layout.data_type == data_types::i32 &&
+            node_output_layout.data_type == data_types::f16))
+            continue;
+
+        // allow only daya_type conversion
+        auto validate_layout = node_output_layout;
+        validate_layout.data_type = dep_output_layout.data_type;
+        if (validate_layout != dep_output_layout)
+            continue;
+
+        dep_output_layout.data_type = node_output_layout.data_type;
+        dep.set_output_layout(dep_output_layout);
+
+        LOG_NODE_REMOVAL(node->id());
+        p.replace_all_usages(*node, dep);
+        p.add_optimized_primitive_info(node->id());
+        p.remove_all_connections(*node);
+        p.remove_if_dangling(*node);
+    }
+
     for (auto n : p.get_processing_order()) {
         if (n->is_in_data_flow() && n->is_type<reorder>()) {
             auto preferred_impl = lo.get_preferred_impl_type(*n, n->get_input_layout(0).format);

src/plugins/intel_gpu/tests/unit/test_cases/fully_connected_gpu_test.cpp

@@ -316,6 +316,43 @@ TEST(fully_connected_gpu, no_biases_int8) {
     ASSERT_EQ(-52.0f, output_ptr[3]);
 }
 
+TEST(fully_connected_gpu, no_biases_fc_i32_reorder_f16) {
+    const int32_t input_f = 2, input_b = 1,    // size of the whole input buffer
+                  weight_b = 1, weight_f = 2;  // size of the whole weights buffer
+
+    auto& engine = get_test_engine();
+
+    auto input_prim = engine.allocate_memory({ data_types::i32, format::bfyx, { input_b, input_f, 1, 1 } });
+    auto weights_prim = engine.allocate_memory({ data_types::i32, format::bfyx, { weight_b, weight_f, 1, 1 } });
+
+    set_values<int32_t>(input_prim, { 1, 1 });
+    set_values<int32_t>(weights_prim, { 1, 1 });
+
+    cldnn::topology topology{
+        input_layout("input", input_prim->get_layout()),
+        data("weights", weights_prim),
+        fully_connected("fc_prim", input_info("input"), "weights"),
+        reorder("reorder_to_f16", input_info("fc_prim"), { data_types::f16, format::bfyx, { input_b, weight_b, 1, 1 } }),
+        activation("output", input_info("reorder_to_f16"), activation_func::floor)
+    };
+
+    ExecutionConfig config = get_test_default_config(engine);
+    config.set_property(ov::intel_gpu::optimize_data(true));
+    config.set_property(ov::intel_gpu::allow_new_shape_infer(true));
+
+    cldnn::network network(engine, topology, config);
+
+    network.set_input_data("input", input_prim);
+
+    auto outputs = network.execute();
+    ASSERT_EQ(outputs.size(), size_t(1));
+    ASSERT_EQ(outputs.begin()->first, "output");
+
+    auto output_prim = outputs.begin()->second.get_memory();
+    cldnn::mem_lock<ov::float16> output_ptr (output_prim, get_test_stream());
+    ASSERT_EQ(2, output_ptr[0]);
+}
+
 TEST(fully_connected_gpu, xb_f32_batch_1) {
     //  Input  : 3x1
     //  Output : 4x1