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[GPU] Add i32 output for FC
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2 files changed

+38
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src/plugins/intel_gpu/src/kernel_selector/kernels/fully_connected/fully_connected_kernel_bfyx_ref.cpp

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@@ -15,6 +15,7 @@ ParamsKey FullyConnected_bfyx_Ref::GetSupportedKey() const {
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k.EnableInputDataType(Datatype::F32);
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k.EnableInputDataType(Datatype::INT8);
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k.EnableInputDataType(Datatype::UINT8);
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k.EnableOutputDataType(Datatype::INT32);
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k.EnableOutputDataType(Datatype::F16);
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k.EnableOutputDataType(Datatype::F32);
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k.EnableOutputDataType(Datatype::INT8);

src/plugins/intel_gpu/tests/unit/test_cases/fully_connected_gpu_test.cpp

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@@ -316,6 +316,43 @@ TEST(fully_connected_gpu, no_biases_int8) {
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ASSERT_EQ(-52.0f, output_ptr[3]);
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}
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TEST(fully_connected_gpu, no_biases_fc_i32_reorder_f16) {
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const int32_t input_f = 2, input_b = 1, // size of the whole input buffer
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weight_b = 1, weight_f = 2; // size of the whole weights buffer
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auto& engine = get_test_engine();
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auto input_prim = engine.allocate_memory({ data_types::i32, format::bfyx, { input_b, input_f, 1, 1 } });
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auto weights_prim = engine.allocate_memory({ data_types::i32, format::bfyx, { weight_b, weight_f, 1, 1 } });
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set_values<int32_t>(input_prim, { 1, 1 });
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set_values<int32_t>(weights_prim, { 1, 1 });
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cldnn::topology topology{
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input_layout("input", input_prim->get_layout()),
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data("weights", weights_prim),
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fully_connected("fc_prim", input_info("input"), "weights"),
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reorder("reorder_to_f16", input_info("fc_prim"), { data_types::f16, format::bfyx, { input_b, weight_b, 1, 1 } }),
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activation("output", input_info("reorder_to_f16"), activation_func::floor)
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};
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ExecutionConfig config = get_test_default_config(engine);
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config.set_property(ov::intel_gpu::optimize_data(true));
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config.set_property(ov::intel_gpu::allow_new_shape_infer(true));
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cldnn::network network(engine, topology, config);
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network.set_input_data("input", input_prim);
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auto outputs = network.execute();
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ASSERT_EQ(outputs.size(), size_t(1));
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ASSERT_EQ(outputs.begin()->first, "output");
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auto output_prim = outputs.begin()->second.get_memory();
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cldnn::mem_lock<ov::float16> output_ptr (output_prim, get_test_stream());
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ASSERT_EQ(2, output_ptr[0]);
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}
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TEST(fully_connected_gpu, xb_f32_batch_1) {
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// Input : 3x1
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// Output : 4x1

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