diff --git a/devices/mediatek_filogic/.config b/devices/mediatek_filogic/.config index cc958f446db8..692e554987e8 100644 --- a/devices/mediatek_filogic/.config +++ b/devices/mediatek_filogic/.config @@ -29,3 +29,5 @@ CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_cmcc_a10=y CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_konka_komi-a31=y CONFIG_TARGET_DEVICE_mediatek_filogic_DEVICE_imou_lc-hx3001=y CONFIG_PACKAGE_luci-ssl=y # uhttpd服务 + +CONFIG_PACKAGE_oscam=m diff --git a/devices/qualcommax_ipq60xx/.config b/devices/qualcommax_ipq60xx/.config index 73a2cbbb22bd..979225355101 100644 --- a/devices/qualcommax_ipq60xx/.config +++ b/devices/qualcommax_ipq60xx/.config @@ -6,8 +6,14 @@ CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_glinet_gl-ax1800=y CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_glinet_gl-axt1800=y CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_qihoo_360v6=y CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_zn_m2=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_huasifei_ipq6018-hr6001=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_ipq6018_ipq6018-l6018=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_ipq6018_ipq6018-cpr-regulator=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_ipq6018_ipq6018-cp-cpu=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_ipq6018_ipq6018-cp03-cpu=y +CONFIG_TARGET_DEVICE_qualcommax_ipq60xx_DEVICE_ipq60xx_ipq60xx-nss=y CONFIG_TARGET_ALL_PROFILES=y CONFIG_PACKAGE_kmod-qca-nss-cfi-cryptoapi=n -CONFIG_PACKAGE_luci-ssl=y # uhttpd服务 \ No newline at end of file +CONFIG_PACKAGE_luci-ssl=y # uhttpd服务 diff --git a/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/Makefile b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/Makefile new file mode 100644 index 000000000000..dd1bd90e93c4 --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/Makefile @@ -0,0 +1,178 @@ +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/version.mk + +PKG_NAME:=ipq-wifi +PKG_RELEASE:=1 +PKG_FLAGS:=nonshared + +include $(INCLUDE_DIR)/package.mk + +define Build/Prepare + mkdir -p $(PKG_BUILD_DIR) +endef + +define Build/Compile +endef + +# Use ath10k-bdencoder from https://github.com/qca/qca-swiss-army-knife.git +# to generate the board-* files here. +# +# This is intended to be used on an interim basis until device-specific +# board data for new devices is available through the upstream compilation +# +# Please send a mail with your device-specific board files upstream. +# You can find instructions and examples on the linux-wireless wiki: +# + +ALLWIFIBOARDS:= \ + 8dev_habanero-dvk \ + aruba_ap-303 \ + asus_rt-ac42u \ + avm_fritzrepeater-1200 \ + buffalo_wtr-m2133hp \ + cellc_rtl30vw \ + devolo_magic-2-wifi-next \ + dlink_dap2610 \ + edgecore_eap102 \ + edgecore_ecw5410 \ + edgecore_oap100 \ + edimax_cax1800 \ + engenius_eap2200 \ + engenius_emd1 \ + engenius_emr3500 \ + ezviz_cs-w3-wd1200g-eup \ + glinet_gl-ap1300 \ + glinet_gl-b2200 \ + glinet_gl-s1300 \ + google_wifi \ + linksys_ea8300 \ + linksys_mr8300-v0 \ + luma_wrtq-329acn \ + mikrotik_cap-ac \ + mikrotik_hap-ac2 \ + mikrotik_hap-ac3 \ + mikrotik_sxtsq-5-ac \ + mobipromo_cm520-79f \ + nec_wg2600hp3 \ + p2w_r619ac \ + plasmacloud_pa1200 \ + plasmacloud_pa2200 \ + qnap_301w \ + qxwlan_e2600ac-c1 \ + qxwlan_e2600ac-c2 \ + teltonika_rutx \ + redmi_ax6 \ + xiaomi_ax3600 \ + xiaomi_ax9000 \ + zte_mf286d + +ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD)) + +define Package/ipq-wifi-default + SUBMENU:=ath10k Board-Specific Overrides + SECTION:=firmware + CATEGORY:=Firmware + DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x) + TITLE:=Custom Board +endef + +define ipq-wifi-install-one-to + $(INSTALL_DIR) $(2)/lib/firmware/ath10k/$(3)/ + $(INSTALL_DATA) $(1) $(2)/lib/firmware/ath10k/$(3)/board-2.bin +endef + +define ipq-wifi-install-ath11-one-to + $(INSTALL_DIR) $(2)/lib/firmware/ath11k/$(3)/ + $(INSTALL_DATA) $(1) $(2)/lib/firmware/ath11k/$(3)/board-2.bin +endef + +define ipq-wifi-install-one + $(if $(filter $(suffix $(1)),.QCA4019 .qca4019),\ + $(call ipq-wifi-install-one-to,$(1),$(2),QCA4019/hw1.0),\ + $(if $(filter $(suffix $(1)),.QCA9888 .qca9888),\ + $(call ipq-wifi-install-one-to,$(1),$(2),QCA9888/hw2.0),\ + $(if $(filter $(suffix $(1)),.QCA9984 .qca9984),\ + $(call ipq-wifi-install-one-to,$(1),$(2),QCA9984/hw1.0),\ + $(if $(filter $(suffix $(1)),.QCA9889 .qca9889),\ + $(call ipq-wifi-install-one-to,$(1),$(2),QCA9887/hw1.0),\ + $(if $(filter $(suffix $(1)),.IPQ8074 .ipq8074),\ + $(call ipq-wifi-install-ath11-one-to,$(1),$(2),IPQ8074/hw2.0),\ + $(error Unrecognized board-file suffix '$(suffix $(1))' for '$(1)')\ + ))))) + +endef +# Blank line required at end of above define due to foreach context + +define generate-ipq-wifi-package + define Package/ipq-wifi-$(1) + $(call Package/ipq-wifi-default) + TITLE:=board-2.bin Overrides for $(2) + CONFLICTS:=$(PREV_BOARD) + endef + + define Package/ipq-wifi-$(1)/description +The $(2) requires board-specific, reference ("cal") data +that is not yet present in the upstream wireless firmware distribution. + +This package supplies board-2.bin file(s) that, in the interim, +overwrite those supplied by the ath10k-firmware-* packages. + +This is package is only necessary for the $(2). + +Do not install it for any other device! + endef + + define Package/ipq-wifi-$(1)/install-overlay + $$$$(foreach IPQ_WIFI_BOARD_FILE,$$$$(wildcard board-$(1).*),\ + $$$$(call ipq-wifi-install-one,$$$$(IPQ_WIFI_BOARD_FILE),$$(1))) + endef + + PREV_BOARD+=ipq-wifi-$(1) +endef + +# Add board name to ALLWIFIBOARDS +# Place files in this directory as board-. +# Add $(eval $(call generate-ipq-wifi-package,,)) + +$(eval $(call generate-ipq-wifi-package,8dev_habanero-dvk,8devices Habanero DVK)) +$(eval $(call generate-ipq-wifi-package,aruba_ap-303,Aruba AP-303)) +$(eval $(call generate-ipq-wifi-package,asus_rt-ac42u,ASUS RT-AC42U)) +$(eval $(call generate-ipq-wifi-package,avm_fritzrepeater-1200,AVM FRITZRepeater 1200)) +$(eval $(call generate-ipq-wifi-package,buffalo_wtr-m2133hp,Buffalo WTR-M2133HP)) +$(eval $(call generate-ipq-wifi-package,cellc_rtl30vw, Cell C RTL30VW)) +$(eval $(call generate-ipq-wifi-package,devolo_magic-2-wifi-next,devolo Magic 2 WiFi next)) +$(eval $(call generate-ipq-wifi-package,dlink_dap2610,D-Link DAP-2610)) +$(eval $(call generate-ipq-wifi-package,edgecore_eap102,Edgecore EAP102)) +$(eval $(call generate-ipq-wifi-package,edgecore_ecw5410,Edgecore ECW5410)) +$(eval $(call generate-ipq-wifi-package,edgecore_oap100,Edgecore OAP100)) +$(eval $(call generate-ipq-wifi-package,edimax_cax1800,Edimax CAX1800)) +$(eval $(call generate-ipq-wifi-package,engenius_eap2200,EnGenius EAP2200)) +$(eval $(call generate-ipq-wifi-package,engenius_emd1,EnGenius EMD1)) +$(eval $(call generate-ipq-wifi-package,engenius_emr3500,EnGenius EMR3500)) +$(eval $(call generate-ipq-wifi-package,ezviz_cs-w3-wd1200g-eup,EZVIZ CS-W3-WD1200G EUP)) +$(eval $(call generate-ipq-wifi-package,glinet_gl-ap1300,GL.iNet GL-AP1300)) +$(eval $(call generate-ipq-wifi-package,glinet_gl-b2200,GL.iNet GL-B2200)) +$(eval $(call generate-ipq-wifi-package,glinet_gl-s1300,GL.iNet GL-S1300)) +$(eval $(call generate-ipq-wifi-package,google_wifi,Google WiFi)) +$(eval $(call generate-ipq-wifi-package,linksys_ea8300,Linksys EA8300)) +$(eval $(call generate-ipq-wifi-package,linksys_mr8300-v0,Linksys MR8300)) +$(eval $(call generate-ipq-wifi-package,luma_wrtq-329acn,Luma WRTQ-329ACN)) +$(eval $(call generate-ipq-wifi-package,mikrotik_cap-ac,Mikrotik cAP ac)) +$(eval $(call generate-ipq-wifi-package,mikrotik_hap-ac2,Mikrotik hAP ac2)) +$(eval $(call generate-ipq-wifi-package,mikrotik_hap-ac3,Mikrotik hAP ac3)) +$(eval $(call generate-ipq-wifi-package,mikrotik_sxtsq-5-ac,MikroTik SXTsq 5 ac)) +$(eval $(call generate-ipq-wifi-package,mobipromo_cm520-79f,MobiPromo CM520-79F)) +$(eval $(call generate-ipq-wifi-package,nec_wg2600hp3,NEC Platforms WG2600HP3)) +$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC)) +$(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200)) +$(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200)) +$(eval $(call generate-ipq-wifi-package,qnap_301w,QNAP 301w)) +$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c1,Qxwlan E2600AC C1)) +$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac-c2,Qxwlan E2600AC C2)) +$(eval $(call generate-ipq-wifi-package,teltonika_rutx,Teltonika RUTX)) +$(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6)) +$(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600)) +$(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000)) +$(eval $(call generate-ipq-wifi-package,zte_mf286d,ZTE MF286D)) + +$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE)))) diff --git a/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-8dev_habanero-dvk.qca4019 b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-8dev_habanero-dvk.qca4019 new file mode 100644 index 000000000000..9048239cf9f5 Binary files /dev/null and b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-8dev_habanero-dvk.qca4019 differ diff --git a/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-aruba_ap-303.qca4019 b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-aruba_ap-303.qca4019 new file mode 100644 index 000000000000..4848115cfbe3 Binary files /dev/null and b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-aruba_ap-303.qca4019 differ diff --git a/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-asus_rt-ac42u.qca4019 b/devices/qualcommax_ipq60xx/diy/package/firmware/ipq-wifi/src/board-asus_rt-ac42u.qca4019 new file mode 100644 index 000000000000..cf6b9e053899 Binary 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b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cp-cpu.dtsi new file mode 100644 index 000000000000..5303a3ca9237 --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cp-cpu.dtsi @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +&CPU0 { + operating-points-v2 = <&cpu_opp_table>; + voltage-tolerance = <1>; + cpu-supply = <&apc_vreg>; +}; + +&CPU1 { + operating-points-v2 = <&cpu_opp_table>; + voltage-tolerance = <1>; + cpu-supply = <&apc_vreg>; +}; + +&CPU2 { + operating-points-v2 = <&cpu_opp_table>; + voltage-tolerance = <1>; + cpu-supply = <&apc_vreg>; +}; + +&CPU3 { + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&apc_vreg>; +}; + +&cpus { + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp-0 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + clock-latency-ns = <200000>; + }; + opp-864000000 { + opp-hz = /bits/ 64 <864000000>; + opp-microvolt = <1>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <2>; + clock-latency-ns = <200000>; + }; + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt = <3>; + clock-latency-ns = <200000>; + }; + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-microvolt = <4>; + clock-latency-ns = <200000>; + }; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <5>; + clock-latency-ns = <200000>; + }; + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <6>; + clock-latency-ns = <200000>; + }; + }; +}; diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cp03-cpu.dtsi b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cp03-cpu.dtsi new file mode 100644 index 000000000000..d8c04a7f88f4 --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cp03-cpu.dtsi @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +&CPU0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&CPU1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&CPU2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&CPU3 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpus { + cpu_opp_table: cpu_opp_table { + compatible = "operating-points-v2"; + opp-shared; + + opp-0 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + clock-latency-ns = <200000>; + }; + opp-864000000 { + opp-hz = /bits/ 64 <864000000>; + opp-microvolt = <1>; + clock-latency-ns = <200000>; + }; + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <2>; + clock-latency-ns = <200000>; + }; + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <2>; + clock-latency-ns = <200000>; + }; + }; +}; diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cpr-regulator.dtsi b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cpr-regulator.dtsi new file mode 100644 index 000000000000..9b8ab440146b --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-cpr-regulator.dtsi @@ -0,0 +1,124 @@ +/* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +&soc { + apc_apm: apm@b111000 { + compatible = "qcom,ipq807x-apm"; + reg = <0xb111000 0x1000>; + reg-names = "pm-apcc-glb"; + qcom,apm-post-halt-delay = <0x2>; + qcom,apm-halt-clk-delay = <0x11>; + qcom,apm-resume-clk-delay = <0x10>; + qcom,apm-sel-switch-delay = <0x01>; + }; + + apc_cpr: cpr4-ctrl@b018000 { + compatible = "qcom,cpr4-ipq6018-apss-regulator"; + reg = <0xb018000 0x4000>, <0xa4000 0x1000>, <0x0193d008 0x4>; + reg-names = "cpr_ctrl", "fuse_base", "cpr_tcsr_reg"; + interrupts = ; + interrupt-names = "cpr"; + qcom,cpr-ctrl-name = "apc"; + qcom,cpr-sensor-time = <1000>; + qcom,cpr-loop-time = <5000000>; + qcom,cpr-idle-cycles = <15>; + qcom,cpr-step-quot-init-min = <0>; + qcom,cpr-step-quot-init-max = <15>; + qcom,cpr-count-mode = <0>; /* All-at-once */ + qcom,cpr-count-repeat = <1>; + qcom,cpr-down-error-step-limit = <1>; + qcom,cpr-up-error-step-limit = <1>; + qcom,apm-ctrl = <&apc_apm>; + qcom,apm-threshold-voltage = <850000>; + vdd-supply = <&ipq6018_s2>; + qcom,voltage-step = <12500>; + + thread@0 { + qcom,cpr-thread-id = <0>; + qcom,cpr-consecutive-up = <2>; + qcom,cpr-consecutive-down = <2>; + qcom,cpr-up-threshold = <2>; + qcom,cpr-down-threshold = <2>; + + apc_vreg: regulator { + regulator-name = "apc_corner"; + regulator-min-microvolt = <1>; + regulator-max-microvolt = <6>; + qcom,cpr-fuse-corners = <4>; + qcom,cpr-fuse-combos = <8>; + qcom,cpr-corners = <6>; + qcom,cpr-speed-bins = <1>; + qcom,cpr-speed-bin-corners = <6>; + qcom,cpr-corner-fmax-map = <1 3 5 6>; + qcom,allow-voltage-interpolation; + qcom,allow-quotient-interpolation; + qcom,cpr-voltage-ceiling = + <725000 787500 862500 + 925000 987500 1062500>; + qcom,cpr-voltage-floor = + <587500 650000 712500 + 750000 787500 850000>; + qcom,corner-frequencies = + <864000000 1056000000 1320000000 + 1440000000 1608000000 1800000000>; + qcom,cpr-ro-sel = + /* Speed bin 0; CPR rev 0..7 */ + < 0 0 0 0>, + < 7 7 7 7>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>; + + qcom,cpr-open-loop-voltage-fuse-adjustment = + /* Speed bin 0; CPR rev 0..7 */ + /* SVS Nominal Turbo Turbo_L1 */ + < 0 0 0 0>, + < 0 0 15000 0>, + < 0 0 15000 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>; + + qcom,cpr-closed-loop-voltage-fuse-adjustment = + /* Speed bin 0; CPR rev 0..7 */ + < 0 0 0 0>, + < 13000 0 13000 13000>, + < 13000 0 13000 13000>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>, + < 0 0 0 0>; + + qcom,cpr-ro-scaling-factor = + < 2000 1770 1900 1670 1930 1770 1910 1800 + 1870 1730 2000 1840 1800 2030 1700 1890 >, + < 2000 1770 1900 1670 1930 1770 1910 1800 + 1870 1730 2000 1840 1800 2030 1700 1890 >, + < 2000 1770 1900 1670 1930 1770 1910 1800 + 1870 1730 2000 1840 1800 2030 1700 1890 >, + < 2000 1770 1900 1670 1930 1770 1910 1800 + 1870 1730 2000 1840 1800 2030 1700 1890 >; + regulator-always-on; + }; + }; + }; +}; diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-hr6001.dts b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-hr6001.dts new file mode 100644 index 000000000000..83e0a8995a0d --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-hr6001.dts @@ -0,0 +1,527 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ6018 CP01 board device tree source + * + * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include "ipq6018.dtsi" +#include "ipq60xx-nss.dtsi" + +/ { + model = "WF HR6001"; + compatible = "wf,hr6001", "qcom,ipq6018"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + serial0 = &blsp1_uart3; + /* + * Aliases as required by u-boot + * to patch MAC addresses + */ + ethernet0 = "/soc/dp1"; + ethernet1 = "/soc/dp2"; + ethernet2 = "/soc/dp3"; + ethernet3 = "/soc/dp4"; + ethernet4 = "/soc/dp5"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1"; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&spi_0 { + cs-select = <0>; + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "n25q128a11"; + spi-max-frequency = <50000000>; + + SBL1@0 { + label = "0:SBL1"; + reg = <0x0 0xc0000>; + read-only; + }; + + MIBIB@c0000 { + label = "0:MIBIB"; + reg = <0xc0000 0x10000>; + }; + + BOOTCONFIG@d0000 { + label = "0:BOOTCONFIG"; + reg = <0xd0000 0x20000>; + read-only; + }; + + BOOTCONFIG1@f0000 { + label = "0:BOOTCONFIG1"; + reg = <0xf0000 0x20000>; + read-only; + }; + + QSEE@110000 { + label = "0:QSEE"; + reg = <0x110000 0x1a0000>; + read-only; + }; + + QSEE_1@2b0000 { + label = "0:QSEE_1"; + reg = <0x2b0000 0x1a0000>; + read-only; + }; + + DEVCFG@450000 { + label = "0:DEVCFG"; + reg = <0x450000 0x10000>; + read-only; + }; + + DEVCFG_1@460000 { + label = "0:DEVCFG_1"; + reg = <0x460000 0x10000>; + read-only; + }; + + RPM@470000 { + label = "0:RPM"; + reg = <0x4700000 0x40000>; + }; + + RPM_1@4b0000 { + label = "0:RPM_1"; + reg = <0x4b0000 0x40000>; + read-only; + }; + + CDT@4f0000 { + label = "0:CDT"; + reg = <0x4f0000 0x10000>; + }; + + CDT_1@500000 { + label = "0:CDT_1"; + reg = <0x500000 0x10000>; + }; + + APPSBLENV@510000 { + label = "0:APPSBLENV"; + reg = <0x510000 0x10000>; + }; + + APPSBL@520000 { + label = "0:APPSBL"; + reg = <0x520000 0xa0000>; + }; + + APPSBL_1@5c0000 { + label = "0:APPSBL_1"; + reg = <0x5c0000 0xa0000>; + }; + + ART: ART@660000 { + label = "0:ART"; + reg = <0x660000 0x40000>; + }; + }; +}; + +&tlmm { + spi_0_pins: spi-0-pins { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-pull-down; + }; + + sd_pins: sd-pinmux { + pins = "gpio62"; + function = "sd_card"; + drive-strength = <8>; + bias-pull-up; + }; + + i2c_1_pins: i2c_1_pins { + mux { + pins = "gpio42", "gpio43"; + function = "blsp2_i2c"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + mdio_pins: mdio_pinmux { + mux_0 { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + mux_1 { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + mux_2 { + pins = "gpio75"; + function = "gpio"; + bias-pull-up; + }; + mux_3 { + pins = "gpio77"; + function = "gpio"; + bias-pull-up; + }; + }; + + button_pins: button_pins { + reset_button { + pins = "gpio19"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + led_pins: leds_pins { + + wlan5g { + pins = "gpio35"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + wlan2g { + pins = "gpio37"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lan1 { + pins = "gpio51"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lan2 { + pins = "gpio24"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lan3 { + pins = "gpio53"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lan4 { + pins = "gpio25"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + wan { + pins = "gpio9"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + }; +}; + +&soc { + mdio: mdio@90000 { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>; + status = "ok"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + phy1: ethernet-phy@1 { + reg = <1>; + }; + phy2: ethernet-phy@2 { + reg = <2>; + }; + phy3: ethernet-phy@3 { + reg = <3>; + }; + phy4: ethernet-phy@4 { + reg = <0x18>; + }; + }; + + dp1: dp1 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <1>; + reg = <0x0 0x3a001000 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <0>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp2: dp2 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <2>; + reg = <0x0 0x3a001200 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <1>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp3: dp3 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <3>; + reg = <0x0 0x3a001400 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <2>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp4: dp4 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <4>; + reg = <0x0 0x3a001600 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <3>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp5: dp5 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <5>; + reg = <0x0 0x3a001800 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <24>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + ess-switch@3a000000 { + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x1e>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + qcom,port_phyinfo { + port@0 { + port_id = <1>; + phy_address = <0>; + }; + port@1 { + port_id = <2>; + phy_address = <1>; + }; + port@2 { + port_id = <3>; + phy_address = <2>; + }; + port@3 { + port_id = <4>; + phy_address = <3>; + }; + port@4 { + port_id = <5>; + phy_address = <0x18>; + port_mac_sel = "QGMAC_PORT"; + }; + }; + }; + + nss-macsec0 { + compatible = "qcom,nss-macsec"; + phy_addr = <0x18>; + phy_access_mode = <0>; + mdiobus = <&mdio>; + }; + + sd_pwrseq: sd-pwrseq { + compatible = "mmc-pwrseq-ipq"; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + button@1 { + label = "wps"; + linux,code = ; + gpios = <&tlmm 19 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + led@35 { + label = "green:wlan5g"; + gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; + }; + + power: led@37 { + label = "green:wlan2g"; + gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + }; + + led@51 { + label = "green:lan1"; + gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>; + }; + + led@24 { + label = "green:lan2"; + gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; + }; + + led@53 { + label = "green:lan3"; + gpios = <&tlmm 53 GPIO_ACTIVE_HIGH>; + }; + + led@25 { + label = "green:lan4"; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; + }; + + led@31 { + label = "green:wan"; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partition@0 { + label = "rootfs"; + reg = <0x0 0x3c00000>; + }; + + partition@8000000 { + label = "rootfs_1"; + reg = <0x3c00000 0x3c00000>; + }; + }; +}; + +&pcie_phy { + status = "ok"; +}; + +&pcie0 { + status = "ok"; +}; + +&qusb_phy_1 { + status = "ok"; +}; + +&usb2 { + status = "ok"; +}; + +&qusb_phy_0 { + status = "ok"; +}; + +&ssphy_0 { + status = "ok"; +}; + +&usb3 { + status = "ok"; +}; + +&nss_crypto { + status = "ok"; +}; + +&nss0 { + status = "ok"; +}; + +&i2c_1 { + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&sdhc_2 { + pinctrl-0 = <&sd_pins>; + pinctrl-names = "default"; + cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + sd-ldo-gpios = <&tlmm 66 0>; + vqmmc-supply = <&ipq6018_l2>; + status = "ok"; +}; + +&wifi { + status = "ok"; +}; diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-l6018.dts b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-l6018.dts new file mode 100644 index 000000000000..c071e6bbff7d --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-l6018.dts @@ -0,0 +1,585 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ6018 CP01 board device tree source + * + * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. + */ + +/dts-v1/; + +#include "ipq6018.dtsi" +#include "ipq60xx-nss.dtsi" + +/ { + model = "PANGU L6018"; + compatible = "pangu,l6018", "qcom,ipq6018"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + serial0 = &blsp1_uart3; + /* + * Aliases as required by u-boot + * to patch MAC addresses + */ + ethernet0 = "/soc/dp1"; + ethernet1 = "/soc/dp2"; + ethernet2 = "/soc/dp3"; + ethernet3 = "/soc/dp4"; + ethernet4 = "/soc/dp5"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1"; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&i2c_1 { + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "ok"; +}; + +&spi_0 { + cs-select = <0>; + status = "ok"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + compatible = "n25q128a11"; + spi-max-frequency = <50000000>; + + SBL1@0 { + label = "0:SBL1"; + reg = <0x0 0xc0000>; + read-only; + }; + + MIBIB@c0000 { + label = "0:MIBIB"; + reg = <0xc0000 0x10000>; + }; + + BOOTCONFIG@d0000 { + label = "0:BOOTCONFIG"; + reg = <0xd0000 0x20000>; + read-only; + }; + + BOOTCONFIG1@f0000 { + label = "0:BOOTCONFIG1"; + reg = <0xf0000 0x20000>; + read-only; + }; + + QSEE@110000 { + label = "0:QSEE"; + reg = <0x110000 0x1a0000>; + read-only; + }; + + QSEE_1@2b0000 { + label = "0:QSEE_1"; + reg = <0x2b0000 0x1a0000>; + read-only; + }; + + DEVCFG@450000 { + label = "0:DEVCFG"; + reg = <0x450000 0x10000>; + read-only; + }; + + DEVCFG_1@460000 { + label = "0:DEVCFG_1"; + reg = <0x460000 0x10000>; + read-only; + }; + + RPM@470000 { + label = "0:RPM"; + reg = <0x4700000 0x40000>; + }; + + RPM_1@4b0000 { + label = "0:RPM_1"; + reg = <0x4b0000 0x40000>; + read-only; + }; + + CDT@4f0000 { + label = "0:CDT"; + reg = <0x4f0000 0x10000>; + }; + + CDT_1@500000 { + label = "0:CDT_1"; + reg = <0x500000 0x10000>; + read-only; + }; + + APPSBLENV@510000 { + label = "0:APPSBLENV"; + reg = <0x510000 0x10000>; + }; + + APPSBL@520000 { + label = "0:APPSBL"; + reg = <0x520000 0xa0000>; + }; + + APPSBL_1@5c0000 { + label = "0:APPSBL_1"; + reg = <0x5c0000 0xa0000>; + }; + + ART: ART@660000 { + label = "0:ART"; + reg = <0x660000 0x40000>; + }; + }; +}; + +&tlmm { + spi_0_pins: spi-0-pins { + pins = "gpio38", "gpio39", "gpio40", "gpio41"; + function = "blsp0_spi"; + drive-strength = <8>; + bias-pull-down; + }; + + i2c_1_pins: i2c_1_pins { + mux { + pins = "gpio42", "gpio43"; + function = "blsp2_i2c"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + button_pins: button_pins { + wps_button { + pins = "gpio9"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + rst_usb_hub_pinmux { + mux { + pins = "gpio78"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-high; + }; + }; + + vbus_usb_hub_pinmux { + mux { + pins = "gpio79"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + output-high; + }; + }; + + mdio_pins: mdio_pinmux { + mux_0 { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + mux_1 { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + mux_2 { + pins = "gpio75"; + function = "gpio"; + bias-pull-up; + }; + mux_3 { + pins = "gpio77"; + function = "gpio"; + bias-pull-up; + }; + }; + + pcie0_pins: pcie_pins { + pcie0_rst { + pins = "gpio60"; + function = "pcie0_rst"; + drive-strength = <8>; + bias-pull-down; + }; + pcie0_wake { + pins = "gpio36"; + function = "pcie0_wake"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + leds_pins: leds_pins { + power { + pins = "gpio25"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + wlan5g { + pins = "gpio35"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + wlan2g { + pins = "gpio37"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + usb1 { + pins = "gpio24"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + usb0 { + pins = "gpio50"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte1 { + pins = "gpio34"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte2 { + pins = "gpio29"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte3 { + pins = "gpio30"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte4 { + pins = "gpio31"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte5 { + pins = "gpio32"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + lte6 { + pins = "gpio23"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + }; +}; + +&soc { + mdio: mdio@90000 { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + phy-reset-gpio = <&tlmm 75 0 &tlmm 77 1>; + status = "ok"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + phy1: ethernet-phy@1 { + reg = <1>; + }; + phy2: ethernet-phy@2 { + reg = <2>; + }; + phy3: ethernet-phy@3 { + reg = <3>; + }; + phy4: ethernet-phy@4 { + reg = <0x30>; + }; + }; + + dp1 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <1>; + reg = <0x0 0x3a001000 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <0>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp2 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <2>; + reg = <0x0 0x3a001200 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <1>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp3 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <3>; + reg = <0x0 0x3a001400 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <2>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp4 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <4>; + reg = <0x0 0x3a001600 0x0 0x200>; + qcom,mactype = <0>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <3>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + dp5 { + device_type = "network"; + compatible = "qcom,nss-dp"; + qcom,id = <5>; + reg = <0x0 0x3a003000 0x0 0x3fff>; + qcom,mactype = <1>; + local-mac-address = [000000000000]; + qcom,link-poll = <1>; + qcom,phy-mdio-addr = <30>; + phy-mode = "sgmii"; + mdio-bus = <&mdio>; + }; + + ess-switch@3a000000 { + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x1e>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/ + switch_mac_mode1 = <0xe>; /* mac mode for uniphy instance1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/ + qcom,port_phyinfo { + port@0 { + port_id = <1>; + phy_address = <0>; + }; + port@1 { + port_id = <2>; + phy_address = <1>; + }; + port@2 { + port_id = <3>; + phy_address = <2>; + }; + port@3 { + port_id = <4>; + phy_address = <3>; + }; + port@4 { + port_id = <5>; + phy_address = <30>; + phy_i2c_address = <30>; + phy-i2c-mode; /*i2c access phy */ + media-type = "sfp"; /* fiber mode */ + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + button@1 { + label = "wps"; + linux,code = ; + gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&leds_pins>; + pinctrl-names = "default"; + + led@24 { + label = "green:usb1"; + gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>; + }; + + led@50 { + label = "green:usb0"; + gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; + }; + + power: led@25 { + label = "green:power"; + gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>; + }; + + led@35 { + label = "green:wlan5g"; + gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; + }; + + led@37 { + label = "green:wlan2g"; + gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + }; + + led@34 { + label = "green:lte1"; + gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>; + }; + + led@29 { + label = "green:lte29"; + gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>; + }; + + led@30 { + label = "green:lte3"; + gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>; + }; + + led@31 { + label = "green:lte4"; + gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + led@32 { + label = "green:lte5"; + gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>; + }; + + led@23 { + label = "green:lte6"; + gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&qpic_bam { + status = "ok"; +}; + +&qpic_nand { + status = "ok"; + + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + nand-ecc-step-size = <512>; + nand-bus-width = <8>; + + partition@0 { + label = "rootfs"; + reg = <0x0 0x8000000>; + }; + + partition@8000000 { + label = "rootfs_1"; + reg = <0x8000000 0x8000000>; + }; + }; +}; + +&pcie_phy { + status = "ok"; +}; + +&pcie0 { + perst-gpio = <&tlmm 60 1>; + status = "ok"; +}; + +&qusb_phy_1 { + status = "ok"; +}; + +&usb2 { + status = "ok"; +}; + +&qusb_phy_0 { + status = "ok"; +}; + +&ssphy_0 { + status = "ok"; +}; + +&usb3 { + status = "ok"; +}; + +&nss0 { + status = "disabled"; +}; + +&nss_crypto { + status = "disabled"; +}; + +&wifi { + status = "ok"; +}; diff --git a/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq60xx-nss.dtsi b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq60xx-nss.dtsi new file mode 100644 index 000000000000..ccdff9f84c34 --- /dev/null +++ b/devices/qualcommax_ipq60xx/diy/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq60xx-nss.dtsi @@ -0,0 +1,736 @@ +// SPDX-License-Identifier: GPL-2.0-only + +&soc { + ess_switch: ess-switch@3a000000 { + compatible = "qcom,ess-switch-ipq60xx"; + reg = <0x3a000000 0x1000000>; + switch_access_mode = "local bus"; + bm_tick_mode = <0>; /* bm tick mode */ + tm_tick_mode = <0>; /* tm tick mode */ + mdio-bus = <&mdio>; + clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>, + <&gcc GCC_CMN_12GPLL_SYS_CLK>, + <&gcc GCC_UNIPHY0_AHB_CLK>, + <&gcc GCC_UNIPHY0_SYS_CLK>, + <&gcc GCC_UNIPHY1_AHB_CLK>, + <&gcc GCC_UNIPHY1_SYS_CLK>, + <&gcc GCC_PORT1_MAC_CLK>, + <&gcc GCC_PORT2_MAC_CLK>, + <&gcc GCC_PORT3_MAC_CLK>, + <&gcc GCC_PORT4_MAC_CLK>, + <&gcc GCC_PORT5_MAC_CLK>, + <&gcc GCC_NSS_PPE_CLK>, + <&gcc GCC_NSS_PPE_CFG_CLK>, + <&gcc GCC_NSSNOC_PPE_CLK>, + <&gcc GCC_NSSNOC_PPE_CFG_CLK>, + <&gcc GCC_NSS_EDMA_CLK>, + <&gcc GCC_NSS_EDMA_CFG_CLK>, + <&gcc GCC_NSS_PPE_IPE_CLK>, + <&gcc GCC_MDIO_AHB_CLK>, + <&gcc GCC_NSS_NOC_CLK>, + <&gcc GCC_NSSNOC_SNOC_CLK>, + <&gcc GCC_NSS_CRYPTO_CLK>, + <&gcc GCC_NSS_PTP_REF_CLK>, + <&gcc GCC_NSS_PORT1_RX_CLK>, + <&gcc GCC_NSS_PORT1_TX_CLK>, + <&gcc GCC_NSS_PORT2_RX_CLK>, + <&gcc GCC_NSS_PORT2_TX_CLK>, + <&gcc GCC_NSS_PORT3_RX_CLK>, + <&gcc GCC_NSS_PORT3_TX_CLK>, + <&gcc GCC_NSS_PORT4_RX_CLK>, + <&gcc GCC_NSS_PORT4_TX_CLK>, + <&gcc GCC_NSS_PORT5_RX_CLK>, + <&gcc GCC_NSS_PORT5_TX_CLK>, + <&gcc GCC_UNIPHY0_PORT1_RX_CLK>, + <&gcc GCC_UNIPHY0_PORT1_TX_CLK>, + <&gcc GCC_UNIPHY0_PORT2_RX_CLK>, + <&gcc GCC_UNIPHY0_PORT2_TX_CLK>, + <&gcc GCC_UNIPHY0_PORT3_RX_CLK>, + <&gcc GCC_UNIPHY0_PORT3_TX_CLK>, + <&gcc GCC_UNIPHY0_PORT4_RX_CLK>, + <&gcc GCC_UNIPHY0_PORT4_TX_CLK>, + <&gcc GCC_UNIPHY0_PORT5_RX_CLK>, + <&gcc GCC_UNIPHY0_PORT5_TX_CLK>, + <&gcc GCC_UNIPHY1_PORT5_RX_CLK>, + <&gcc GCC_UNIPHY1_PORT5_TX_CLK>, + <&gcc NSS_PORT5_RX_CLK_SRC>, + <&gcc NSS_PORT5_TX_CLK_SRC>, + <&gcc GCC_SNOC_NSSNOC_CLK>; + clock-names = "cmn_ahb_clk", "cmn_sys_clk", + "uniphy0_ahb_clk", "uniphy0_sys_clk", + "uniphy1_ahb_clk", "uniphy1_sys_clk", + "port1_mac_clk", "port2_mac_clk", + "port3_mac_clk", "port4_mac_clk", + "port5_mac_clk", + "nss_ppe_clk", "nss_ppe_cfg_clk", + "nssnoc_ppe_clk", "nssnoc_ppe_cfg_clk", + "nss_edma_clk", "nss_edma_cfg_clk", + "nss_ppe_ipe_clk", + "gcc_mdio_ahb_clk", "gcc_nss_noc_clk", + "gcc_nssnoc_snoc_clk", + "gcc_nss_crypto_clk", + "gcc_nss_ptp_ref_clk", + "nss_port1_rx_clk", "nss_port1_tx_clk", + "nss_port2_rx_clk", "nss_port2_tx_clk", + "nss_port3_rx_clk", "nss_port3_tx_clk", + "nss_port4_rx_clk", "nss_port4_tx_clk", + "nss_port5_rx_clk", "nss_port5_tx_clk", + "uniphy0_port1_rx_clk", + "uniphy0_port1_tx_clk", + "uniphy0_port2_rx_clk", + "uniphy0_port2_tx_clk", + "uniphy0_port3_rx_clk", + "uniphy0_port3_tx_clk", + "uniphy0_port4_rx_clk", + "uniphy0_port4_tx_clk", + "uniphy0_port5_rx_clk", + "uniphy0_port5_tx_clk", + "uniphy1_port5_rx_clk", + "uniphy1_port5_tx_clk", + "nss_port5_rx_clk_src", + "nss_port5_tx_clk_src", + "gcc_snoc_nssnoc_clk"; + resets = <&gcc GCC_PPE_FULL_RESET>, + <&gcc GCC_UNIPHY0_SOFT_RESET>, + <&gcc GCC_UNIPHY0_XPCS_RESET>, + <&gcc GCC_UNIPHY1_SOFT_RESET>, + <&gcc GCC_UNIPHY1_XPCS_RESET>, + <&gcc GCC_NSSPORT1_RESET>, + <&gcc GCC_NSSPORT2_RESET>, + <&gcc GCC_NSSPORT3_RESET>, + <&gcc GCC_NSSPORT4_RESET>, + <&gcc GCC_NSSPORT5_RESET>, + <&gcc GCC_UNIPHY0_PORT1_ARES>, + <&gcc GCC_UNIPHY0_PORT2_ARES>, + <&gcc GCC_UNIPHY0_PORT3_ARES>, + <&gcc GCC_UNIPHY0_PORT4_ARES>, + <&gcc GCC_UNIPHY0_PORT5_ARES>, + <&gcc GCC_UNIPHY0_PORT_4_5_RESET>, + <&gcc GCC_UNIPHY0_PORT_4_RESET>; + reset-names = "ppe_rst", "uniphy0_soft_rst", + "uniphy0_xpcs_rst", "uniphy1_soft_rst", + "uniphy1_xpcs_rst", "nss_port1_rst", + "nss_port2_rst", "nss_port3_rst", + "nss_port4_rst", "nss_port5_rst", + "uniphy0_port1_dis", + "uniphy0_port2_dis", + "uniphy0_port3_dis", + "uniphy0_port4_dis", + "uniphy0_port5_dis", + "uniphy0_port_4_5_rst", + "uniphy0_port_4_rst"; + port_scheduler_resource { + port@0 { + port_id = <0>; + ucast_queue = <0 143>; + mcast_queue = <256 271>; + l0sp = <0 35>; + l0cdrr = <0 47>; + l0edrr = <0 47>; + l1cdrr = <0 7>; + l1edrr = <0 7>; + }; + port@1 { + port_id = <1>; + ucast_queue = <144 159>; + mcast_queue = <272 275>; + l0sp = <36 39>; + l0cdrr = <48 63>; + l0edrr = <48 63>; + l1cdrr = <8 11>; + l1edrr = <8 11>; + }; + port@2 { + port_id = <2>; + ucast_queue = <160 175>; + mcast_queue = <276 279>; + l0sp = <40 43>; + l0cdrr = <64 79>; + l0edrr = <64 79>; + l1cdrr = <12 15>; + l1edrr = <12 15>; + }; + port@3 { + port_id = <3>; + ucast_queue = <176 191>; + mcast_queue = <280 283>; + l0sp = <44 47>; + l0cdrr = <80 95>; + l0edrr = <80 95>; + l1cdrr = <16 19>; + l1edrr = <16 19>; + }; + port@4 { + port_id = <4>; + ucast_queue = <192 207>; + mcast_queue = <284 287>; + l0sp = <48 51>; + l0cdrr = <96 111>; + l0edrr = <96 111>; + l1cdrr = <20 23>; + l1edrr = <20 23>; + }; + port@5 { + port_id = <5>; + ucast_queue = <208 223>; + mcast_queue = <288 291>; + l0sp = <52 55>; + l0cdrr = <112 127>; + l0edrr = <112 127>; + l1cdrr = <24 27>; + l1edrr = <24 27>; + }; + port@6 { + port_id = <6>; + ucast_queue = <224 239>; + mcast_queue = <292 295>; + l0sp = <56 59>; + l0cdrr = <128 143>; + l0edrr = <128 143>; + l1cdrr = <28 31>; + l1edrr = <28 31>; + }; + port@7 { + port_id = <7>; + ucast_queue = <240 255>; + mcast_queue = <296 299>; + l0sp = <60 63>; + l0cdrr = <144 159>; + l0edrr = <144 159>; + l1cdrr = <32 35>; + l1edrr = <32 35>; + }; + }; + port_scheduler_config { + port@0 { + port_id = <0>; + l1scheduler { + group@0 { + sp = <0 1>; /*L0 SPs*/ + /*cpri cdrr epri edrr*/ + cfg = <0 0 0 0>; + }; + }; + l0scheduler { + group@0 { + /*unicast queues*/ + ucast_queue = <0 4 8>; + /*multicast queues*/ + mcast_queue = <256 260>; + /*sp cpricdrrepriedrr*/ + cfg = <0 0 0 0 0>; + }; + group@1 { + ucast_queue = <1 5 9>; + mcast_queue = <257 261>; + cfg = <0 1 1 1 1>; + }; + group@2 { + ucast_queue = <2 6 10>; + mcast_queue = <258 262>; + cfg = <0 2 2 2 2>; + }; + group@3 { + ucast_queue = <3 7 11>; + mcast_queue = <259 263>; + cfg = <0 3 3 3 3>; + }; + }; + }; + port@1 { + port_id = <1>; + l1scheduler { + group@0 { + sp = <36>; + cfg = <0 8 0 8>; + }; + group@1 { + sp = <37>; + cfg = <1 9 1 9>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <144>; + ucast_loop_pri = <16>; + mcast_queue = <272>; + mcast_loop_pri = <4>; + cfg = <36 0 48 0 48>; + }; + }; + }; + port@2 { + port_id = <2>; + l1scheduler { + group@0 { + sp = <40>; + cfg = <0 12 0 12>; + }; + group@1 { + sp = <41>; + cfg = <1 13 1 13>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <160>; + ucast_loop_pri = <16>; + mcast_queue = <276>; + mcast_loop_pri = <4>; + cfg = <40 0 64 0 64>; + }; + }; + }; + port@3 { + port_id = <3>; + l1scheduler { + group@0 { + sp = <44>; + cfg = <0 16 0 16>; + }; + group@1 { + sp = <45>; + cfg = <1 17 1 17>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <176>; + ucast_loop_pri = <16>; + mcast_queue = <280>; + mcast_loop_pri = <4>; + cfg = <44 0 80 0 80>; + }; + }; + }; + port@4 { + port_id = <4>; + l1scheduler { + group@0 { + sp = <48>; + cfg = <0 20 0 20>; + }; + group@1 { + sp = <49>; + cfg = <1 21 1 21>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <192>; + ucast_loop_pri = <16>; + mcast_queue = <284>; + mcast_loop_pri = <4>; + cfg = <48 0 96 0 96>; + }; + }; + }; + port@5 { + port_id = <5>; + l1scheduler { + group@0 { + sp = <52>; + cfg = <0 24 0 24>; + }; + group@1 { + sp = <53>; + cfg = <1 25 1 25>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <208>; + ucast_loop_pri = <16>; + mcast_queue = <288>; + mcast_loop_pri = <4>; + cfg = <52 0 112 0 112>; + }; + }; + }; + port@6 { + port_id = <6>; + l1scheduler { + group@0 { + sp = <56>; + cfg = <0 28 0 28>; + }; + group@1 { + sp = <57>; + cfg = <1 29 1 29>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <224>; + ucast_loop_pri = <16>; + mcast_queue = <292>; + mcast_loop_pri = <4>; + cfg = <56 0 128 0 128>; + }; + }; + }; + port@7 { + port_id = <7>; + l1scheduler { + group@0 { + sp = <60>; + cfg = <0 32 0 32>; + }; + group@1 { + sp = <61>; + cfg = <1 33 1 33>; + }; + }; + l0scheduler { + group@0 { + ucast_queue = <240>; + ucast_loop_pri = <16>; + mcast_queue = <296>; + cfg = <60 0 144 0 144>; + }; + }; + }; + }; + }; + + edma@3ab00000 { + compatible = "qcom,edma"; + reg = <0x0 0x3ab00000 0x0 0xabe00>; + reg-names = "edma-reg-base"; + qcom,txdesc-ring-start = <23>; + qcom,txdesc-rings = <1>; + qcom,txcmpl-ring-start = <23>; + qcom,txcmpl-rings = <1>; + qcom,rxfill-ring-start = <7>; + qcom,rxfill-rings = <1>; + qcom,rxdesc-ring-start = <15>; + qcom,rxdesc-rings = <1>; + interrupts = <0 378 4>, + <0 354 4>, + <0 346 4>, + <0 379 4>; + resets = <&gcc GCC_EDMA_HW_RESET>; + reset-names = "edma_rst"; + }; + + ess-uniphy@7a00000 { + compatible = "qcom,ess-uniphy"; + reg = <0x7a00000 0x30000>; + uniphy_access_mode = "local bus"; + }; + + mdio: mdio@90000 { + compatible = "qcom,ipq4019-mdio"; + reg = <0x0 0x00090000 0x0 0x64>; + #address-cells = <1>; + #size-cells = <0>; + + clocks = <&gcc GCC_MDIO_AHB_CLK>; + clock-names = "mdio_ahb"; + + status = "disabled"; + }; + + + nss-common { + compatible = "qcom,nss-common"; + reg = <0x0 0x01868010 0x0 0x1000>, <0x0 0x40000000 0x0 0x1000>; + reg-names = "nss-misc-reset", "nss-misc-reset-flag"; + }; + + nss0: nss@40000000 { + compatible = "qcom,nss"; + interrupts = <0 402 0x1>, <0 401 0x1>, <0 400 0x1>, + <0 399 0x1>, <0 398 0x1>, <0 397 0x1>, + <0 396 0x1>, <0 395 0x1>, <0 394 0x1>, + <0 393 0x1>; + reg = <0x0 0x39000000 0x0 0x1000>, <0x0 0x0b111000 0x0 0x1000>; + reg-names = "nphys", "qgic-phys"; + clocks = <&gcc GCC_NSS_NOC_CLK>, + <&gcc GCC_NSS_PTP_REF_CLK>, + <&gcc GCC_NSS_CSR_CLK>, <&gcc GCC_NSS_CFG_CLK>, + <&gcc GCC_NSSNOC_QOSGEN_REF_CLK>, + <&gcc GCC_NSSNOC_SNOC_CLK>, + <&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>, + <&gcc GCC_MEM_NOC_UBI32_CLK>, + <&gcc GCC_NSS_CE_AXI_CLK>, + <&gcc GCC_NSS_CE_APB_CLK>, + <&gcc GCC_NSSNOC_CE_AXI_CLK>, + <&gcc GCC_NSSNOC_CE_APB_CLK>, + <&gcc GCC_NSSNOC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_CORE_CLK>, + <&gcc GCC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_AXI_CLK>, + <&gcc GCC_UBI0_NC_AXI_CLK>, + <&gcc GCC_UBI0_UTCM_CLK>, + <&gcc GCC_SNOC_NSSNOC_CLK>; + clock-names = "nss-noc-clk", "nss-ptp-ref-clk", + "nss-csr-clk", "nss-cfg-clk", + "nss-nssnoc-qosgen-ref-clk", + "nss-nssnoc-snoc-clk", + "nss-nssnoc-timeout-ref-clk", + "nss-mem-noc-ubi32-clk", + "nss-ce-axi-clk", "nss-ce-apb-clk", + "nss-nssnoc-ce-axi-clk", + "nss-nssnoc-ce-apb-clk", + "nss-nssnoc-ahb-clk", + "nss-core-clk", "nss-ahb-clk", + "nss-axi-clk", "nss-nc-axi-clk", + "nss-utcm-clk", "nss-snoc-nssnoc-clk"; + qcom,id = <0>; + qcom,num-queue = <4>; + qcom,num-irq = <10>; + qcom,num-pri = <4>; + qcom,load-addr = <0x40000000>; + qcom,low-frequency = <187200000>; + qcom,mid-frequency = <748800000>; + qcom,max-frequency = <1497600000>; + qcom,bridge-enabled; + qcom,ipv4-enabled; + qcom,ipv4-reasm-enabled; + qcom,ipv6-enabled; + qcom,ipv6-reasm-enabled; + qcom,wlanredirect-enabled; + qcom,tun6rd-enabled; + qcom,l2tpv2-enabled; + qcom,gre-enabled; + qcom,gre-redir-enabled; + qcom,gre-redir-mark-enabled; + qcom,map-t-enabled; + qcom,portid-enabled; + qcom,ppe-enabled; + qcom,pppoe-enabled; + qcom,pptp-enabled; + qcom,tunipip6-enabled; + qcom,shaping-enabled; + qcom,wlan-dataplane-offload-enabled; + qcom,vlan-enabled; + qcom,capwap-enabled; + qcom,dtls-enabled; + qcom,tls-enabled; + qcom,crypto-enabled; + qcom,ipsec-enabled; + qcom,qvpn-enabled; + qcom,pvxlan-enabled; + qcom,clmap-enabled; + qcom,vxlan-enabled; + qcom,match-enabled; + qcom,mirror-enabled; + }; + + nss_crypto: qcom,nss_crypto { + compatible = "qcom,nss-crypto"; + #address-cells = <1>; + #size-cells = <1>; + qcom,max-contexts = <64>; + qcom,max-context-size = <32>; + ranges; + + eip197_node { + compatible = "qcom,eip197"; + reg-names = "crypto_pbase"; + reg = <0x0 0x39800000 0x0 0x7ffff>; + clocks = <&gcc GCC_NSS_CRYPTO_CLK>, + <&gcc GCC_NSSNOC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_PPE_CLK>; + clock-names = "crypto_clk", "crypto_nocclk", + "crypto_ppeclk"; + clock-frequency = /bits/ 64 <300000000 300000000 300000000>; + qcom,dma-mask = <0xff>; + qcom,transform-enabled; + qcom,aes128-cbc; + qcom,aes192-cbc; + qcom,aes256-cbc; + qcom,aes128-ctr; + qcom,aes192-ctr; + qcom,aes256-ctr; + qcom,aes128-ecb; + qcom,aes192-ecb; + qcom,aes256-ecb; + qcom,3des-cbc; + qcom,md5-hash; + qcom,sha160-hash; + qcom,sha224-hash; + qcom,sha256-hash; + qcom,sha384-hash; + qcom,sha512-hash; + qcom,md5-hmac; + qcom,sha160-hmac; + qcom,sha224-hmac; + qcom,sha256-hmac; + qcom,sha384-hmac; + qcom,sha512-hmac; + qcom,aes128-gcm-gmac; + qcom,aes192-gcm-gmac; + qcom,aes256-gcm-gmac; + qcom,aes128-cbc-md5-hmac; + qcom,aes128-cbc-sha160-hmac; + qcom,aes192-cbc-md5-hmac; + qcom,aes192-cbc-sha160-hmac; + qcom,aes256-cbc-md5-hmac; + qcom,aes256-cbc-sha160-hmac; + qcom,aes128-ctr-sha160-hmac; + qcom,aes192-ctr-sha160-hmac; + qcom,aes256-ctr-sha160-hmac; + qcom,aes128-ctr-md5-hmac; + qcom,aes192-ctr-md5-hmac; + qcom,aes256-ctr-md5-hmac; + qcom,3des-cbc-md5-hmac; + qcom,3des-cbc-sha160-hmac; + qcom,aes128-cbc-sha256-hmac; + qcom,aes192-cbc-sha256-hmac; + qcom,aes256-cbc-sha256-hmac; + qcom,aes128-ctr-sha256-hmac; + qcom,aes192-ctr-sha256-hmac; + qcom,aes256-ctr-sha256-hmac; + qcom,3des-cbc-sha256-hmac; + qcom,aes128-cbc-sha384-hmac; + qcom,aes192-cbc-sha384-hmac; + qcom,aes256-cbc-sha384-hmac; + qcom,aes128-ctr-sha384-hmac; + qcom,aes192-ctr-sha384-hmac; + qcom,aes256-ctr-sha384-hmac; + qcom,aes128-cbc-sha512-hmac; + qcom,aes192-cbc-sha512-hmac; + qcom,aes256-cbc-sha512-hmac; + qcom,aes128-ctr-sha512-hmac; + qcom,aes192-ctr-sha512-hmac; + qcom,aes256-ctr-sha512-hmac; + + engine0 { + reg_offset = <0x80000>; + qcom,ifpp-enabled; + qcom,ipue-enabled; + qcom,ofpp-enabled; + qcom,opue-enabled; + }; + }; + }; + + wifi: wifi@c000000 { + compatible = "qcom,cnss-qca6018", "qcom,ipq6018-wifi"; + reg = <0x0 0xc000000 0x0 0x1000000>; + qcom,hw-mode-id = <1>; + qcom,tgt-mem-mode = <0>; + mem-region = <&q6_region>; + qcom,bdf-addr = <0x4ABC0000 0x4ABC0000 0x4ABC0000 0x0 0x0>; + qcom,caldb-addr = <0x4B500000 0x4B500000 0x4B500000 0x0 0x0>; + qcom,caldb-size = <0x480000>; + + qcom,rproc = <&q6v5_wcss>; + interrupts = <0 320 1>, /* o_wcss_apps_intr[0] = */ + <0 319 1>, + <0 318 1>, + <0 316 1>, + <0 315 1>, + <0 314 1>, + <0 311 1>, + <0 310 1>, + <0 411 1>, + <0 410 1>, + <0 40 1>, + <0 39 1>, + <0 302 1>, + <0 301 1>, + <0 37 1>, + <0 36 1>, + <0 296 1>, + <0 295 1>, + <0 294 1>, + <0 293 1>, + <0 292 1>, + <0 291 1>, + <0 290 1>, + <0 289 1>, + <0 288 1>, /* o_wcss_apps_intr[25] */ + + <0 239 1>, + <0 236 1>, + <0 235 1>, + <0 234 1>, + <0 233 1>, + <0 232 1>, + <0 231 1>, + <0 230 1>, + <0 229 1>, + <0 228 1>, + <0 224 1>, + <0 223 1>, + + <0 203 1>, + + <0 183 1>, + <0 180 1>, + <0 179 1>, + <0 178 1>, + <0 177 1>, + <0 176 1>, + + <0 163 1>, + <0 162 1>, + <0 160 1>, + <0 159 1>, + <0 158 1>, + <0 157 1>, + <0 156 1>; /* o_wcss_apps_intr[51] */ + + interrupt-names = "misc-pulse1", + "misc-latch", + "sw-exception", + "ce0", + "ce1", + "ce2", + "ce3", + "ce4", + "ce5", + "ce6", + "ce7", + "ce8", + "ce9", + "ce10", + "ce11", + "host2wbm-desc-feed", + "host2reo-re-injection", + "host2reo-command", + "host2rxdma-monitor-ring3", + "host2rxdma-monitor-ring2", + "host2rxdma-monitor-ring1", + "reo2ost-exception", + "wbm2host-rx-release", + "reo2host-status", + "reo2host-destination-ring4", + "reo2host-destination-ring3", + "reo2host-destination-ring2", + "reo2host-destination-ring1", + "rxdma2host-monitor-destination-mac3", + "rxdma2host-monitor-destination-mac2", + "rxdma2host-monitor-destination-mac1", + "ppdu-end-interrupts-mac3", + "ppdu-end-interrupts-mac2", + "ppdu-end-interrupts-mac1", + "rxdma2host-monitor-status-ring-mac3", + "rxdma2host-monitor-status-ring-mac2", + "rxdma2host-monitor-status-ring-mac1", + "host2rxdma-host-buf-ring-mac3", + "host2rxdma-host-buf-ring-mac2", + "host2rxdma-host-buf-ring-mac1", + "rxdma2host-destination-ring-mac3", + "rxdma2host-destination-ring-mac2", + "rxdma2host-destination-ring-mac1", + "host2tcl-input-ring4", + "host2tcl-input-ring3", + "host2tcl-input-ring2", + "host2tcl-input-ring1", + "wbm2host-tx-completions-ring3", + "wbm2host-tx-completions-ring2", + "wbm2host-tx-completions-ring1", + "tcl2host-status-ring"; + status = "ok"; + qcom,pta-num = <0>; + qcom,coex-mode = <0x2>; + qcom,bt-active-time = <0x18>; + qcom,bt-priority-time = <0x12>; + qcom,coex-algo = <0x2>; + qcom,pta-priority = <0x80800505>; + }; +}; diff --git a/devices/ramips_mt7621/.config b/devices/ramips_mt7621/.config index 744070ef00da..aa95d41f19c2 100644 --- a/devices/ramips_mt7621/.config +++ b/devices/ramips_mt7621/.config @@ -54,6 +54,8 @@ CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_h3c_tx1800-plus=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_h3c_tx1801-plus=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_h3c_tx1806=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_zbtlink_zbt-wg3526-32m=y +CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_huasifei_ws7915=y +CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_huasifei_ws7915-32=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_ht-jsh_0211=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_c-life_xg1=y CONFIG_TARGET_DEVICE_ramips_mt7621_DEVICE_hatlab_gateboard-one=y