snippets: sdp: mspi: Code size

Increased partition size for flipper code.

Signed-off-by: Michal Frankiewicz <michal.frankiewicz@nordicsemi.no>

Author: mif1-nordic

snippets/sdp/mspi/soc/nrf54l15_cpuapp.overlay

@@ -10,29 +10,29 @@
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			cpuflpr_code_partition: image@17a000 {
-				reg = <0x17a000 DT_SIZE_K(12)>;
+			cpuflpr_code_partition: image@179400 {
+				reg = <0x179400 DT_SIZE_K(15)>;
 			};
 
-			sram_rx: memory@2003c000 {
-				reg = <0x2003c000 0x07f0>;
+			sram_rx: memory@2003b400 {
+				reg = <0x2003b400 0x07f0>;
 			};
 
-			sram_tx: memory@2003c7f0 {
-				reg = <0x2003c7f0 0x07f0>;
+			sram_tx: memory@2003bbf0 {
+				reg = <0x2003bbf0 0x07f0>;
 			};
 
-			cpuflpr_error_code: memory@2003cfe0 {
-				reg = <0x2003cfe0 0x0020>; /* 32bytes */
+			cpuflpr_error_code: memory@2003c3e0 {
+				reg = <0x2003c3e0 0x0020>; /* 32bytes */
 			};
 		};
 
-		cpuflpr_sram_code_data: memory@2003d000 {
+		cpuflpr_sram_code_data: memory@2003c400 {
 			compatible = "mmio-sram";
-			reg = <0x2003d000 DT_SIZE_K(12)>;
+			reg = <0x2003c400 DT_SIZE_K(15)>;
 			#address-cells = <1>;
 			#size-cells = <1>;
-			ranges = <0x0 0x2003d000 0x3000>;
+			ranges = <0x0 0x2003c400 0x3c00>;
 		};
 	};
 
@@ -49,12 +49,12 @@
 };
 
 &cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(1512)>;
+	reg = <0x0 DT_SIZE_K(1509)>;
 };
 
 &cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(240)>;
-	ranges = <0x0 0x20000000 0x3c000>;
+	reg = <0x20000000 DT_SIZE_K(237)>;
+	ranges = <0x0 0x20000000 0x3b400>;
 };
 
 &cpuflpr_vpr {