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tests: drivers: uart: uart_baudrate_test: keep high freq
Prevent enabled clock control to scale down freq, as this affects gpio polling time. Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no>
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tests/drivers/uart/uart_baudrate_test/testcase.yaml

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@@ -16,6 +16,8 @@ tests:
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extra_configs:
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- CONFIG_PM_DEVICE=y
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- CONFIG_PM_DEVICE_RUNTIME=y
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- CONFIG_CLOCK_CONTROL_NRF2_GLOBAL_HSFLL_REQ_LOW_FREQ=n
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- CONFIG_NRFS_LOCAL_DOMAIN_DVFS_SCALE_DOWN_AFTER_INIT=n
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drivers.uart.baudrate_test.uart135:
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platform_allow:
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- nrf54h20dk/nrf54h20/cpuapp

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