applications: sdp: mspi: extend MSPI API with reset functions

magp-nordic · magp-nordic · commit 98eb5fcf6df7 · 2025-03-26T13:02:18.000+01:00
Extend MSPI API with custom functions handling reset pins.

Signed-off-by: Magdalena Pastula &lt;magdalena.pastula@nordicsemi.no&gt;
diff --git a/applications/sdp/mspi/src/main.c b/applications/sdp/mspi/src/main.c
@@ -84,6 +84,7 @@ static volatile uint8_t ce_vios[DEVICES_MAX];
 static volatile uint8_t data_vios_count;
 static volatile uint8_t data_vios[DATA_PINS_MAX];
 static volatile uint8_t clk_vio;
+static volatile nrfe_mspi_reset_config_t reset_configs[DEVICES_MAX];
 static volatile nrfe_mspi_dev_config_t nrfe_mspi_devices[DEVICES_MAX];
 static volatile nrfe_mspi_xfer_config_t nrfe_mspi_xfer_config;
 static volatile nrfe_mspi_xfer_config_t *nrfe_mspi_xfer_config_ptr = &nrfe_mspi_xfer_config;
@@ -394,6 +395,21 @@ static void config_pins(nrfe_mspi_pinctrl_soc_pin_msg_t *pins_cfg)
 	}
 }
 
+static void reset_set(uint8_t device_index, int value)
+{
+	if (reset_configs[device_index].inversed) {
+		value = (value != 0) ? 0 : 1;
+	}
+
+	if (value == 0) {
+		nrf_vpr_csr_vio_out_clear_set(
+			BIT(pin_to_vio_map[reset_configs[device_index].pin_number]));
+	} else {
+		nrf_vpr_csr_vio_out_or_set(
+			BIT(pin_to_vio_map[reset_configs[device_index].pin_number]));
+	}
+}
+
 static void ep_bound(void *priv)
 {
 	atomic_set_bit(&ipc_atomic_sem, NRFE_MSPI_EP_BOUNDED);
@@ -432,6 +448,18 @@ static void ep_recv(const void *data, size_t len, void *priv)
 		config_pins(pins_cfg);
 		break;
 	}
+	case NRFE_MSPI_CONFIG_RESET: {
+		nrfe_mspi_reset_config_msg_t *reset_cfg = (nrfe_mspi_reset_config_msg_t *)data;
+
+		reset_configs[reset_cfg->device_index] = reset_cfg->reset_config;
+		break;
+	}
+	case NRFE_MSPI_SET_RESET: {
+		nrfe_mspi_reset_set_msg_t *reset_cfg = (nrfe_mspi_reset_set_msg_t *)data;
+
+		reset_set(reset_cfg->device_index, reset_cfg->value);
+		break;
+	}
 	case NRFE_MSPI_CONFIG_DEV: {
 		nrfe_mspi_dev_config_msg_t *dev_config = (nrfe_mspi_dev_config_msg_t *)data;
 
diff --git a/drivers/mspi/mspi_nrfe.c b/drivers/mspi/mspi_nrfe.c
@@ -10,6 +10,7 @@
 #include <zephyr/drivers/mspi.h>
 #include <zephyr/drivers/pinctrl.h>
 #include <zephyr/drivers/counter.h>
+#include <zephyr/drivers/gpio.h>
 #include <zephyr/ipc/ipc_service.h>
 #include <zephyr/pm/device.h>
 #if !defined(CONFIG_MULTITHREADING)
@@ -26,10 +27,12 @@ LOG_MODULE_REGISTER(mspi_nrfe, CONFIG_MSPI_LOG_LEVEL);
 #define MAX_RX_MSG_SIZE		     (DT_REG_SIZE(DT_NODELABEL(sram_rx)))
 #define IPC_TIMEOUT_MS		     100
 #define EP_SEND_TIMEOUT_MS	     10
+
 #define EXTREME_DRIVE_FREQ_THRESHOLD 32000000
 #define CNT0_TOP_CALCULATE(freq)     (NRFX_CEIL_DIV(SystemCoreClock, freq * 2) - 1)
 #define DATA_LINE_INDEX(pinctr_fun)  (pinctr_fun - NRF_FUN_SDP_MSPI_DQ0)
 #define DATA_PIN_UNUSED              UINT8_MAX
+#define DEVICES_MAX                  5
 
 #ifdef CONFIG_SOC_NRF54L15
 
@@ -40,7 +43,6 @@ LOG_MODULE_REGISTER(mspi_nrfe, CONFIG_MSPI_LOG_LEVEL);
 #else
 #error "Unsupported SoC for SDP MSPI"
 #endif
-
 #define SDP_MPSI_PINCTRL_DEV_CONFIG_INIT(node_id)                                                  \
 	{                                                                                          \
 		.reg = PINCTRL_REG_NONE,                                                           \
@@ -97,6 +99,7 @@ static const struct mspi_nrfe_config dev_config = {
 };
 
 static struct mspi_nrfe_data dev_data;
+static bool is_reset_sent[DEVICES_MAX];
 
 static void ep_recv(const void *data, size_t len, void *priv);
 
@@ -821,6 +824,77 @@ static int api_transceive(const struct device *dev, const struct mspi_dev_id *de
 	return 0;
 }
 
+static int api_reset_config(const struct device *dev, const struct mspi_dev_id *dev_id,
+			    const struct gpio_dt_spec *spec, uint8_t gpio_port_num,
+			    gpio_flags_t extra_flags)
+{
+	const struct mspi_nrfe_config *drv_cfg = dev->config;
+	const struct pinctrl_state *state = &drv_cfg->pcfg->states[PINCTRL_STATE_DEFAULT];
+	gpio_flags_t flags = spec->dt_flags | extra_flags;
+	uint8_t pin_number = spec->pin;
+	nrfe_mspi_reset_config_msg_t mspi_reset_config;
+
+	/*
+	 * Check if reset pin is not the same as any pin declared for MSPI device.
+	 * If it is and it is valid, send the information to FLPR, otherwise treat it as a regular
+	 * GPIO pin.
+	 */
+	if (gpio_port_num == NRFE_MSPI_PORT_NUMBER) {
+		for (uint8_t i = 0; i < state->pin_cnt; i++) {
+			if (pin_number == NRF_PIN_NUMBER_TO_PIN(NRF_GET_PIN(state->pins[i]))) {
+				switch (NRF_GET_FUN(state->pins[i])) {
+				case NRF_FUN_SDP_MSPI_DQ0:
+				case NRF_FUN_SDP_MSPI_DQ1:
+					LOG_ERR("Reset pin cannot be the same as D0 or "
+						"D1.");
+					return -EINVAL;
+				case NRF_FUN_SDP_MSPI_SCK:
+					LOG_ERR("Reset pin cannot be the same as CLK.");
+					return -EINVAL;
+				case NRF_FUN_SDP_MSPI_CS0:
+				case NRF_FUN_SDP_MSPI_CS1:
+				case NRF_FUN_SDP_MSPI_CS2:
+				case NRF_FUN_SDP_MSPI_CS3:
+					LOG_ERR("Reset pin cannot be the same as any CS.");
+					return -EINVAL;
+				case NRF_FUN_SDP_MSPI_DQ2:
+				case NRF_FUN_SDP_MSPI_DQ3:
+					is_reset_sent[dev_id->dev_idx] = true;
+					mspi_reset_config.device_index = dev_id->dev_idx;
+					mspi_reset_config.reset_config.pin_number = pin_number;
+					mspi_reset_config.reset_config.inversed =
+						((flags & GPIO_ACTIVE_LOW) != 0);
+					/* Send reset configuration to FLPR */
+					return send_data(NRFE_MSPI_CONFIG_RESET,
+							 (const void *)&mspi_reset_config,
+							 sizeof(nrfe_mspi_reset_config_msg_t));
+				default:
+					break;
+				}
+			}
+		}
+	}
+
+	return gpio_pin_configure_dt(spec, flags);
+}
+
+static int api_reset_set(const struct device *dev, const struct gpio_dt_spec *spec,
+			 const struct mspi_dev_id *dev_id, int value)
+{
+	nrfe_mspi_reset_set_msg_t mspi_reset_set;
+
+	if (is_reset_sent[dev_id->dev_idx]) {
+		mspi_reset_set.device_index = dev_id->dev_idx;
+		mspi_reset_set.value = value;
+		return send_data(NRFE_MSPI_SET_RESET, (const void *)&mspi_reset_set,
+				 sizeof(nrfe_mspi_reset_set_msg_t));
+	} else {
+		return gpio_pin_set_dt(spec, value);
+	}
+
+	return 0;
+}
+
 #if CONFIG_PM_DEVICE
 /**
  * @brief Callback function to handle power management actions.
@@ -968,11 +1042,16 @@ static int nrfe_mspi_init(const struct device *dev)
 	return ret;
 }
 
-static const struct mspi_driver_api drv_api = {
-	.config = api_config,
-	.dev_config = api_dev_config,
-	.get_channel_status = api_get_channel_status,
-	.transceive = api_transceive,
+static const struct nrf_mspi_driver_api drv_api = {
+	.std_api =
+		{
+			.config = api_config,
+			.dev_config = api_dev_config,
+			.get_channel_status = api_get_channel_status,
+			.transceive = api_transceive,
+		},
+	.reset_pin_config = api_reset_config,
+	.reset_pin_set = api_reset_set,
 };
 
 PM_DEVICE_DT_INST_DEFINE(0, dev_pm_action_cb);
diff --git a/include/drivers/mspi/nrf_mspi.h b/include/drivers/mspi/nrf_mspi.h
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+#ifndef ZEPHYR_INCLUDE_DRIVERS_MSPI_NRF_MSPI_H_
+#define ZEPHYR_INCLUDE_DRIVERS_MSPI_NRF_MSPI_H_
+
+#include <zephyr/device.h>
+#include <zephyr/drivers/mspi.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef int (*mspi_api_reset_pin_config)(const struct device *dev, const struct mspi_dev_id *dev_id,
+					 const struct gpio_dt_spec *spec, uint8_t gpio_port_num,
+					 gpio_flags_t extra_flags);
+typedef int (*mspi_api_reset_pin_set)(const struct device *dev, const struct gpio_dt_spec *spec,
+				      const struct mspi_dev_id *dev_id, int value);
+
+__subsystem struct nrf_mspi_driver_api {
+	struct mspi_driver_api std_api;
+
+	mspi_api_reset_pin_config reset_pin_config;
+	mspi_api_reset_pin_set reset_pin_set;
+};
+
+/**
+ * @brief Configure reset pin. It is mandatory when reset pin overlaps with any data pin.
+ *
+ * @param dev pointer to the mspi device structure.
+ * @param psel pin number
+ *
+ * @retval non-negative the observed state of the on-off service associated
+ *                      with the clock machine at the time the request was
+ *                      processed (see onoff_release()), if successful.
+ * @retval -EIO if service has recorded an error.
+ * @retval -ENOTSUP if the service is not in a state that permits release.
+ */
+static inline int nrf_mspi_reset_pin_config(const struct device *dev,
+					    const struct mspi_dev_id *dev_id,
+					    const struct gpio_dt_spec *spec, uint8_t gpio_port_num,
+					    gpio_flags_t extra_flags)
+{
+	const struct nrf_mspi_driver_api *api = (const struct nrf_mspi_driver_api *)dev->api;
+
+	return api->reset_pin_config(dev, dev_id, spec, gpio_port_num, extra_flags);
+}
+
+/**
+ * @brief Set reset pin state.
+ *
+ * @param dev pointer to the mspi device structure.
+ * @param psel pin number
+ *
+ * @retval non-negative the observed state of the on-off service associated
+ *                      with the clock machine at the time the request was
+ *                      processed (see onoff_release()), if successful.
+ * @retval -EIO if service has recorded an error.
+ * @retval -ENOTSUP if the service is not in a state that permits release.
+ */
+static inline int nrf_mspi_reset_pin_set(const struct device *dev, const struct gpio_dt_spec *spec,
+					 const struct mspi_dev_id *dev_id, int value)
+{
+	const struct nrf_mspi_driver_api *api = (const struct nrf_mspi_driver_api *)dev->api;
+
+	return api->reset_pin_set(dev, spec, dev_id, value);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ZEPHYR_INCLUDE_DRIVERS_MSPI_NRF_MSPI_H_ */
diff --git a/include/drivers/mspi/nrfe_mspi.h b/include/drivers/mspi/nrfe_mspi.h
@@ -7,8 +7,8 @@
 #ifndef DRIVERS_MSPI_NRFE_MSPI_H
 #define DRIVERS_MSPI_NRFE_MSPI_H
 
+#include <drivers/mspi/nrf_mspi.h>
 #include <zephyr/drivers/pinctrl.h>
-#include <zephyr/drivers/mspi.h>
 #include <hal/nrf_timer.h>
 
 #ifdef __cplusplus
@@ -25,10 +25,12 @@ extern "C" {
 typedef enum {
 	NRFE_MSPI_EP_BOUNDED = 0,
 	NRFE_MSPI_CONFIG_TIMER_PTR, /* nrfe_mspi_flpr_timer_msg_t */
-	NRFE_MSPI_CONFIG_PINS,      /* nrfe_mspi_pinctrl_soc_pin_msg_t */
-	NRFE_MSPI_CONFIG_DEV,       /* nrfe_mspi_dev_config_msg_t */
-	NRFE_MSPI_CONFIG_XFER,      /* nrfe_mspi_xfer_config_msg_t */
-	NRFE_MSPI_TX,	            /* nrfe_mspi_xfer_packet_msg_t + data buffer at the end */
+	NRFE_MSPI_CONFIG_PINS,	    /* nrfe_mspi_pinctrl_soc_pin_msg_t */
+	NRFE_MSPI_CONFIG_RESET,	    /* nrfe_mspi_reset_config_msg_t */
+	NRFE_MSPI_SET_RESET,	    /* nrfe_mspi_reset_set_msg_t */
+	NRFE_MSPI_CONFIG_DEV,	    /* nrfe_mspi_dev_config_msg_t */
+	NRFE_MSPI_CONFIG_XFER,	    /* nrfe_mspi_xfer_config_msg_t */
+	NRFE_MSPI_TX,		    /* nrfe_mspi_xfer_packet_msg_t + data buffer at the end */
 	NRFE_MSPI_TXRX,
 	NRFE_MSPI_SDP_APP_HARD_FAULT,
 	NRFE_MSPI_WRONG_OPCODE,
@@ -37,6 +39,11 @@ typedef enum {
 	NREE_MSPI_OPCODES_MAX = 0xFFFFFFFFU,
 } nrfe_mspi_opcode_t;
 
+typedef struct {
+	uint8_t pin_number;
+	bool inversed;
+} nrfe_mspi_reset_config_t;
+
 typedef struct {
 	enum mspi_io_mode io_mode;
 	enum mspi_cpp_mode cpp;
@@ -65,6 +72,18 @@ typedef struct {
 	pinctrl_soc_pin_t pin[NRFE_MSPI_PINS_MAX];
 } nrfe_mspi_pinctrl_soc_pin_msg_t;
 
+typedef struct {
+	nrfe_mspi_opcode_t opcode; /* NRFE_MSPI_CONFIG_RESET */
+	uint8_t device_index;
+	nrfe_mspi_reset_config_t reset_config;
+} nrfe_mspi_reset_config_msg_t;
+
+typedef struct {
+	nrfe_mspi_opcode_t opcode; /* NRFE_MSPI_SET_RESET */
+	uint8_t device_index;
+	int value;
+} nrfe_mspi_reset_set_msg_t;
+
 typedef struct {
 	nrfe_mspi_opcode_t opcode; /* NRFE_MSPI_CONFIG_DEV */
 	uint8_t device_index;
