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snippets: sdp: mspi: move definition of nRF54L15 DK flash
Move definition of external flash on nRF54L15 DK to board overlay. Signed-off-by: Magdalena Pastula <magdalena.pastula@nordicsemi.no>
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3 files changed

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-27
lines changed

3 files changed

+39
-27
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,36 @@
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/delete-node/ &mx25r64;
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&sdp_mspi {
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mx25r64: mx25r6435f@0 {
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compatible = "jedec,mspi-nor";
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status = "okay";
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reg = <0>;
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jedec-id = [c2 28 17];
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sfdp-bfp = [
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e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04 bb
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ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
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10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44 83 48 44
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30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff
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];
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size = <67108864>;
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has-dpd;
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t-enter-dpd = <10000>;
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t-exit-dpd = <35000>;
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reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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mspi-max-frequency = <DT_FREQ_M(1)>;
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mspi-io-mode = "MSPI_IO_MODE_SINGLE";
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mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
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mspi-hardware-ce-num = <0>;
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mspi-cpp-mode = "MSPI_CPP_MODE_0";
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mspi-endian = "MSPI_BIG_ENDIAN";
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mspi-ce-polarity = "MSPI_CE_ACTIVE_LOW";
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};
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};

snippets/sdp/mspi/snippet.yml

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Original file line numberDiff line numberDiff line change
@@ -14,3 +14,6 @@ boards:
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/.*/nrf54l15/cpuapp/:
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append:
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EXTRA_DTC_OVERLAY_FILE: soc/nrf54l15_cpuapp.overlay
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/nrf54l15dk/nrf54l15/cpuapp/:
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append:
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EXTRA_DTC_OVERLAY_FILE: board/nrf54l15dk_nrf54l15_cpuapp.overlay

snippets/sdp/mspi/soc/nrf54l15_cpuapp.overlay

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Original file line numberDiff line numberDiff line change
@@ -96,37 +96,10 @@
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};
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};
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/delete-node/ &mx25r64;
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&sdp_mspi {
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clock-frequency = <DT_FREQ_M(64)>;
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pinctrl-0 = <&sdp_mspi_default>;
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pinctrl-1 = <&sdp_mspi_sleep>;
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pinctrl-names = "default", "sleep";
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status = "okay";
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mx25r64: mx25r6435f@0 {
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compatible = "jedec,mspi-nor", "zephyr,mspi-emul-device";
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status = "okay";
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reg = <0>;
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jedec-id = [c2 28 17];
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sfdp-bfp = [
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e5 20 f1 ff ff ff ff 03 44 eb 08 6b 08 3b 04 bb
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ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
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10 d8 00 ff 23 72 f5 00 82 ed 04 cc 44 83 48 44
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30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff
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];
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size = <67108864>;
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has-dpd;
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t-enter-dpd = <10000>;
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t-exit-dpd = <35000>;
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reset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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mspi-max-frequency = <DT_FREQ_M(1)>;
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mspi-io-mode = "MSPI_IO_MODE_SINGLE";
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mspi-data-rate = "MSPI_DATA_RATE_SINGLE";
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mspi-hardware-ce-num = <0>;
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mspi-cpp-mode = "MSPI_CPP_MODE_0";
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mspi-endian = "MSPI_BIG_ENDIAN";
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mspi-ce-polarity = "MSPI_CE_ACTIVE_LOW";
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};
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};

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