@@ -21,12 +21,13 @@ LOG_MODULE_REGISTER(mspi_nrfe, CONFIG_MSPI_LOG_LEVEL);
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#include <hal/nrf_gpio.h>
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#include <drivers/mspi/nrfe_mspi.h>
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- #define MSPI_NRFE_NODE DT_DRV_INST(0)
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- #define MAX_TX_MSG_SIZE (DT_REG_SIZE(DT_NODELABEL(sram_tx)))
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- #define MAX_RX_MSG_SIZE (DT_REG_SIZE(DT_NODELABEL(sram_rx)))
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- #define IPC_TIMEOUT_MS 100
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- #define EP_SEND_TIMEOUT_MS 10
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- #define CNT0_TOP_CALCULATE (freq ) (NRFX_CEIL_DIV(SystemCoreClock, freq * 2) - 1)
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+ #define MSPI_NRFE_NODE DT_DRV_INST(0)
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+ #define MAX_TX_MSG_SIZE (DT_REG_SIZE(DT_NODELABEL(sram_tx)))
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+ #define MAX_RX_MSG_SIZE (DT_REG_SIZE(DT_NODELABEL(sram_rx)))
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+ #define IPC_TIMEOUT_MS 100
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+ #define EP_SEND_TIMEOUT_MS 10
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+ #define EXTREME_DRIVE_FREQ_THRESHOLD 32000000
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+ #define CNT0_TOP_CALCULATE (freq ) (NRFX_CEIL_DIV(SystemCoreClock, freq * 2) - 1)
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#define SDP_MPSI_PINCTRL_DEV_CONFIG_INIT (node_id ) \
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{ \
@@ -439,6 +440,23 @@ static int api_dev_config(const struct device *dev, const struct mspi_dev_id *de
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}
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if (param_mask & MSPI_DEVICE_CONFIG_FREQUENCY ) {
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+
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+ uint8_t state_id ;
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+
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+ for (state_id = 0 ; state_id < drv_cfg -> pcfg -> state_cnt ; state_id ++ ) {
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+ if (drv_cfg -> pcfg -> states [state_id ].id == PINCTRL_STATE_DEFAULT ) {
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+ break ;
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+ }
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+ }
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+
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+ if ((cfg -> freq >= EXTREME_DRIVE_FREQ_THRESHOLD ) &&
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+ (NRF_GET_DRIVE (drv_cfg -> pcfg -> states [state_id ].pins [0 ]) != NRF_DRIVE_E0E1 )) {
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+ LOG_ERR ("Invalid pin drive for this frequency: %u, expected: %u" ,
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+ NRF_GET_DRIVE (drv_cfg -> pcfg -> states [state_id ].pins [0 ]),
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+ NRF_DRIVE_E0E1 );
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+ return - EINVAL ;
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+ }
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+
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if (cfg -> freq > drv_cfg -> mspicfg .max_freq ) {
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LOG_ERR ("Invalid frequency: %u, MAX: %u" , cfg -> freq ,
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drv_cfg -> mspicfg .max_freq );
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