From 761519562cbeb9cd0638ec13a1798230034a2878 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Mon, 17 Mar 2025 14:11:41 +0100 Subject: [PATCH 1/2] applications: sdp: mspi: improve setting and clearing DQ2 and DQ3 Improve setting initial state of DQ2 and DQ3 and clearing when changing mode to QUAD. Signed-off-by: Magdalena Pastula --- applications/sdp/mspi/src/main.c | 33 ++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/applications/sdp/mspi/src/main.c b/applications/sdp/mspi/src/main.c index b18848412083..a52e895ffc6a 100644 --- a/applications/sdp/mspi/src/main.c +++ b/applications/sdp/mspi/src/main.c @@ -35,7 +35,8 @@ #define MAX_SHIFT_COUNT 63 -#define CE_PIN_UNUSED UINT8_MAX +#define DATA_PIN_UNUSED UINT8_MAX +#define CE_PIN_UNUSED UINT8_MAX #define HRT_IRQ_PRIORITY 2 #define HRT_VEVIF_IDX_READ 17 @@ -50,6 +51,8 @@ #error "Unsupported SoC for SDP MSPI" #endif +#define DATA_LINE_INDEX(pinctr_fun) (pinctr_fun - NRF_FUN_SDP_MSPI_DQ0) + BUILD_ASSERT(CONFIG_SDP_MSPI_MAX_RESPONSE_SIZE > 0, "Response max size should be greater that 0"); static const uint8_t pin_to_vio_map[NRFE_MSPI_PINS_MAX] = { @@ -341,6 +344,10 @@ static void config_pins(nrfe_mspi_pinctrl_soc_pin_msg_t *pins_cfg) xfer_params.tx_direction_mask = 0; xfer_params.rx_direction_mask = 0; + for (uint8_t i = 0; i < DATA_PINS_MAX; i++) { + data_vios[i] = DATA_PIN_UNUSED; + } + for (uint8_t i = 0; i < pins_cfg->pins_count; i++) { uint32_t psel = NRF_GET_PIN(pins_cfg->pin[i]); uint32_t fun = NRF_GET_FUN(pins_cfg->pin[i]); @@ -364,10 +371,13 @@ static void config_pins(nrfe_mspi_pinctrl_soc_pin_msg_t *pins_cfg) } else if ((fun >= NRF_FUN_SDP_MSPI_DQ0) && (fun <= NRF_FUN_SDP_MSPI_DQ7)) { - data_vios[data_vios_count] = pin_to_vio_map[pin_number]; - WRITE_BIT(xfer_params.tx_direction_mask, data_vios[data_vios_count], + NRFX_ASSERT(DATA_LINE_INDEX(fun) < DATA_PINS_MAX); + NRFX_ASSERT(data_vios[DATA_LINE_INDEX(fun)] == DATA_PIN_UNUSED); + + data_vios[DATA_LINE_INDEX(fun)] = pin_to_vio_map[pin_number]; + WRITE_BIT(xfer_params.tx_direction_mask, data_vios[DATA_LINE_INDEX(fun)], VPRCSR_NORDIC_DIR_OUTPUT); - WRITE_BIT(xfer_params.rx_direction_mask, data_vios[data_vios_count], + WRITE_BIT(xfer_params.rx_direction_mask, data_vios[DATA_LINE_INDEX(fun)], VPRCSR_NORDIC_DIR_INPUT); data_vios_count++; } else if (fun == NRF_FUN_SDP_MSPI_SCK) { @@ -443,11 +453,18 @@ static void ep_recv(const void *data, size_t len, void *priv) } if (dev_config->dev_config.io_mode == MSPI_IO_MODE_SINGLE) { - nrf_vpr_csr_vio_out_or_set(BIT(3)); - nrf_vpr_csr_vio_out_or_set(BIT(4)); + if (data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)] != DATA_PIN_UNUSED && + data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)] != DATA_PIN_UNUSED) { + nrf_vpr_csr_vio_out_or_set( + BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)])); + nrf_vpr_csr_vio_out_or_set( + BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)])); + } } else { - nrf_vpr_csr_vio_out_clear_set(BIT(3)); - nrf_vpr_csr_vio_out_clear_set(BIT(4)); + nrf_vpr_csr_vio_out_clear_set( + BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)])); + nrf_vpr_csr_vio_out_clear_set( + BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)])); } break; From 263007e8cfd01fa0a657d4af48e814c244fa2992 Mon Sep 17 00:00:00 2001 From: Magdalena Pastula Date: Mon, 17 Mar 2025 17:20:33 +0100 Subject: [PATCH 2/2] drivers: mspi: add checking if data pins are not overlapping Add checking if one data line is not assigned to more than one GPIO pin. Signed-off-by: Magdalena Pastula --- drivers/mspi/mspi_nrfe.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/mspi/mspi_nrfe.c b/drivers/mspi/mspi_nrfe.c index 8b8ce8494cff..b335445939b5 100644 --- a/drivers/mspi/mspi_nrfe.c +++ b/drivers/mspi/mspi_nrfe.c @@ -28,6 +28,8 @@ LOG_MODULE_REGISTER(mspi_nrfe, CONFIG_MSPI_LOG_LEVEL); #define EP_SEND_TIMEOUT_MS 10 #define EXTREME_DRIVE_FREQ_THRESHOLD 32000000 #define CNT0_TOP_CALCULATE(freq) (NRFX_CEIL_DIV(SystemCoreClock, freq * 2) - 1) +#define DATA_LINE_INDEX(pinctr_fun) (pinctr_fun - NRF_FUN_SDP_MSPI_DQ0) +#define DATA_PIN_UNUSED UINT8_MAX #ifdef CONFIG_SOC_NRF54L15 @@ -327,6 +329,11 @@ static int check_pin_assignments(const struct pinctrl_state *state) uint8_t cs_pins[NRFE_MSPI_PINS_MAX]; uint8_t cs_pins_cnt = 0; uint32_t psel = 0; + uint32_t pin_fun = 0; + + for (uint8_t i = 0; i < NRFE_MSPI_DATA_LINE_CNT_MAX; i++) { + data_pins[i] = DATA_PIN_UNUSED; + } for (uint8_t i = 0; i < state->pin_cnt; i++) { psel = NRF_GET_PIN(state->pins[i]); @@ -335,7 +342,8 @@ static int check_pin_assignments(const struct pinctrl_state *state) NRFE_MSPI_PORT_NUMBER); return -ENOTSUP; } - switch (NRF_GET_FUN(state->pins[i])) { + pin_fun = NRF_GET_FUN(state->pins[i]); + switch (pin_fun) { case NRF_FUN_SDP_MSPI_DQ0: case NRF_FUN_SDP_MSPI_DQ1: case NRF_FUN_SDP_MSPI_DQ2: @@ -344,7 +352,13 @@ static int check_pin_assignments(const struct pinctrl_state *state) case NRF_FUN_SDP_MSPI_DQ5: case NRF_FUN_SDP_MSPI_DQ6: case NRF_FUN_SDP_MSPI_DQ7: - data_pins[data_pins_cnt] = NRF_PIN_NUMBER_TO_PIN(psel); + if (data_pins[DATA_LINE_INDEX(pin_fun)] != DATA_PIN_UNUSED) { + LOG_ERR("This pin is assigned to an already taken data line: " + "%d.%d.", + NRF_PIN_NUMBER_TO_PORT(psel), NRF_PIN_NUMBER_TO_PIN(psel)); + return -EINVAL; + } + data_pins[DATA_LINE_INDEX(pin_fun)] = NRF_PIN_NUMBER_TO_PIN(psel); data_pins_cnt++; break; case NRF_FUN_SDP_MSPI_CS0: @@ -363,7 +377,7 @@ static int check_pin_assignments(const struct pinctrl_state *state) } break; default: - LOG_ERR("Not supported pin function: %d", NRF_GET_FUN(state->pins[i])); + LOG_ERR("Not supported pin function: %d", pin_fun); return -ENOTSUP; } }