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jit_avx512_common_conv_kernel.cpp
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/*******************************************************************************
* Copyright 2016-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#include "common/c_types_map.hpp"
#include "common/math_utils.hpp"
#include "common/nstl.hpp"
#include "common/type_helpers.hpp"
#include "common/utils.hpp"
#include "cpu/cpu_convolution_pd.hpp"
#include "cpu/platform.hpp"
#include "cpu/x64/cpu_barrier.hpp"
#include "cpu/x64/injectors/injector_utils.hpp"
#include "cpu/x64/injectors/jit_uni_binary_injector.hpp"
#include "cpu/x64/injectors/jit_uni_eltwise_injector.hpp"
#include "cpu/x64/jit_avx512_common_conv_kernel.hpp"
#define GET_OFF(field) offsetof(jit_conv_call_s, field)
#define KNx_L2_EFFECTIVE_CAPACITY ((512 - 64) * 1024)
namespace dnnl {
namespace impl {
namespace cpu {
namespace x64 {
using namespace dnnl::impl::format_tag;
using namespace dnnl::impl::memory_tracking::names;
using namespace dnnl::impl::utils;
using namespace Xbyak;
namespace {
constexpr auto small_spatial = 14;
inline void pick_loop_order(jit_conv_conf_t &jcp) {
using namespace prop_kind;
assert(one_of(
jcp.prop_kind, forward_training, forward_inference, backward_data));
auto w = (jcp.prop_kind == backward_data) ? jcp.iw : jcp.ow;
auto h = (jcp.prop_kind == backward_data) ? jcp.ih : jcp.oh;
// The w in the loop order is currently ignored by 3D BWD_D
jcp.loop_order = (w <= small_spatial && h <= small_spatial) ? loop_cwgn
: loop_gncw;
if (utils::one_of(jcp.src_tag, format_tag::ndhwc, format_tag::nhwc,
format_tag::nwc)
&& jcp.ngroups > 1 && jcp.oc < 16)
jcp.loop_order = loop_nhwcg;
}
inline status_t init_tag(format_tag_t &tag, memory_desc_t &md,
const memory_desc_wrapper &mdw, const format_tag_t tag_value) {
if (mdw.format_kind() == format_kind::any) {
CHECK(memory_desc_init_by_tag(md, tag_value));
tag = tag_value;
} else {
tag = mdw.matches_one_of_tag(tag_value);
}
if (tag != tag_value) return status::unimplemented;
return status::success;
}
inline bool is_1stconv(const jit_conv_conf_t &jcp) {
return one_of(jcp.ic, 1, 2, 3);
}
inline bool is_ow_threading_on(const jit_conv_conf_t &jcp) {
return (jcp.nb_ow > 1);
}
inline bool is_iw_threading_on(const jit_conv_conf_t &jcp) {
return (jcp.nb_iw > 1);
}
} // namespace
template <typename Vmm>
_jit_avx512_common_conv_fwd_kernel<Vmm>::_jit_avx512_common_conv_fwd_kernel(
const jit_conv_conf_t &ajcp, const primitive_attr_t &attr,
const memory_desc_t &dst_md)
: jit_generator(jit_name()), jcp(ajcp), attr_(attr) {
if (jcp.with_eltwise || jcp.with_binary || jcp.with_depthwise || jcp.with_quantization) {
using namespace binary_injector;
static constexpr bool preserve_gpr = true;
static constexpr bool preserve_vmm = false;
static constexpr size_t helper_vmm_idx = 31;
const size_t tail_size = jcp.oc_without_padding % isa_simd_width_;
static constexpr bool use_exact_tail_scalar_bcast = false;
const binary_injector::rhs_arg_static_params_t rhs_args_static_params {
helper_vmm_idx, reg_tmp, r15, r14, preserve_gpr, preserve_vmm,
GET_OFF(post_ops_binary_rhs_arg_vec), GET_OFF(dst_orig),
memory_desc_wrapper(dst_md), tail_size, postops_mask,
use_exact_tail_scalar_bcast};
const binary_injector::static_params_t static_params {
this->param1, rhs_args_static_params};
quantization_injector::static_params_t quantization_static_params
{zmm_d_weights.getIdx(), zmm_d_bias.getIdx(), reg_d_weights, reg_d_bias};
postops_injector_ = utils::make_unique<
injector::jit_uni_postops_injector_t<avx512_core>>(
this, jcp.post_ops, static_params, quantization_static_params);
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::prepare_output(int ur_w) {
for (int k = 0; k < jcp.nb_oc_blocking; k++)
for (int j = 0; j < ur_w; j++) {
Vmm vmm = vmm_out(j, k);
vpxord(vmm, vmm, vmm);
}
}
template <typename F>
static void iterate(const int nb_oc_blocking, const int ur_w,
const bool oc_tail, const bool force_masking, const F &fun) {
for (int i_load = 0; i_load < nb_oc_blocking; i_load++) {
const auto mask_flag
= force_masking || (oc_tail && i_load + 1 == nb_oc_blocking);
for (int i_ur = 0; i_ur < ur_w; i_ur++)
fun(mask_flag, i_load, i_ur);
}
}
template <typename F>
static void iterate(const int nb_oc_blocking, const int ur_w, const F &fun) {
iterate(nb_oc_blocking, ur_w, false, false, fun);
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::apply_postops(int ur_w) {
std::map<size_t, int> vmm_idx_off;
iterate(jcp.nb_oc_blocking, ur_w,
[&](const bool, const int i_load, const int i_ur) {
vmm_idx_off.insert({vmm_out_idx(i_ur, i_load), i_load * jcp.oc_block * sizeof(float)});
});
depthwise_injector::dynamic_params_t ddp {zmm_d_weights.getIdx(), zmm_d_bias.getIdx(), reg_d_weights, reg_d_bias,
ptr[this->param1 + GET_OFF(oc_off)], vmm_idx_off,
this->rsp, base_post_ops_data_offset};
quantization_injector::dynamic_params_t qdp {ptr[this->param1 + GET_OFF(oc_off)], vmm_idx_off, jcp.dst_dt,
this->rsp, base_post_ops_data_offset};
injector_utils::vmm_index_set_t vmm_idxs;
if (jcp.with_binary) {
binary_injector::rhs_arg_dynamic_params_t rhs_arg_params;
const bool mask_tail = jcp.oc_without_padding % jcp.simd_w;
const bool oc_blk_is_smaller_than_vmm = jcp.oc_block < isa_simd_width_;
iterate(jcp.nb_oc_blocking, ur_w, mask_tail, oc_blk_is_smaller_than_vmm,
[&](const bool mask_flag, const int i_load, const int i_ur) {
const size_t aux_output_l_off
= get_output_offset(i_ur, i_load);
const auto vmm_idx = vmm_out_idx(i_ur, i_load);
vmm_idxs.emplace(vmm_idx);
rhs_arg_params.vmm_idx_to_out_reg.emplace(vmm_idx, reg_out);
rhs_arg_params.vmm_idx_to_out_elem_off_val.emplace(
vmm_idx, aux_output_l_off);
if (mask_flag) {
rhs_arg_params.vmm_tail_idx_.emplace(vmm_idx);
}
});
postops_injector_->compute_vector_range(vmm_idxs, rhs_arg_params, ddp, qdp);
} else {
iterate(jcp.nb_oc_blocking, ur_w,
[&](const bool, const int i_load, const int i_ur) {
vmm_idxs.emplace(vmm_out_idx(i_ur, i_load));
});
postops_injector_->compute_vector_range(vmm_idxs, binary_injector::rhs_arg_dynamic_params_t(), ddp, qdp);
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::store_output(int ur_w) {
Label no_update_label, store_label, post_ops_label;
mov(reg_channel, ptr[param1 + GET_OFF(flags)]);
if (jcp.with_bias) { mov(reg_bias, ptr[param1 + GET_OFF(bias)]); }
const int oc_tail = jcp.oc_tail;
if (!jcp.with_sum) {
test(reg_channel, FLAG_IC_FIRST);
jnz(no_update_label, T_NEAR);
}
for (int k = 0; k < jcp.nb_oc_blocking; k++)
for (int j = 0; j < ur_w; j++) {
Vmm vmm = vmm_out(j, k);
// mask only needed for last oc_block
if (oc_tail && k + 1 == jcp.nb_oc_blocking)
vmm = vmm | k_oc_tail_mask | T_z;
size_t aux_output_offset = get_output_offset(j, k);
vaddps(vmm,
make_safe_addr(
reg_out, aux_output_offset, reg_out_long_offt));
}
if (!jcp.with_sum) {
jmp(post_ops_label, T_NEAR);
} else {
test(reg_channel, FLAG_IC_FIRST);
jz(post_ops_label, T_NEAR);
}
L(no_update_label);
if (jcp.with_bias) {
for (int k = 0; k < jcp.nb_oc_blocking; k++) {
int bias_offset = jcp.typesize_out * k * jcp.oc_block;
for (int j = 0; j < ur_w; j++) {
Vmm vmm = vmm_out(j, k);
// mask only needed for last oc_block
if (oc_tail && k + 1 == jcp.nb_oc_blocking)
vmm = vmm | k_oc_tail_mask | T_z;
vaddps(vmm, EVEX_compress_addr(reg_bias, bias_offset));
}
}
}
L(post_ops_label);
if (jcp.with_eltwise || jcp.with_binary || jcp.with_depthwise || jcp.with_quantization) {
test(reg_channel, FLAG_IC_LAST);
jz(store_label, T_NEAR);
apply_postops(ur_w);
}
L(store_label);
const auto is_padding = jcp.oc_without_padding != jcp.oc;
for (int k = 0; k < jcp.nb_oc_blocking; k++)
for (int j = 0; j < ur_w; j++) {
Vmm vmm = vmm_out(j, k);
// mask only needed for last oc_block
if (oc_tail && k + 1 == jcp.nb_oc_blocking) {
if (is_padding)
vmovups(vmm | k_oc_tail_mask | T_z, vmm);
else
vmm = vmm | k_oc_tail_mask;
}
size_t aux_output_offset = get_output_offset(j, k);
vmovups(EVEX_compress_addr_safe(
reg_out, aux_output_offset, reg_out_long_offt),
vmm);
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::compute_loop_fma(
int ur_w, int pad_l, int pad_r) {
const bool is_source_layout_nxc = is_src_layout_nxc();
const bool icb_loop_in_compute_function = is_source_layout_nxc;
const int ic_tail = jcp.ic_tail;
const int oc_tail = jcp.oc == jcp.oc_without_padding ? jcp.oc_tail : 0;
int iw = jcp.iw;
int kw = jcp.kw;
int ic_block = jcp.ic_block;
int oc_block = jcp.oc_block;
int nb_oc_block = jcp.nb_oc_blocking;
Label kh_label, kd_label;
std::vector<Label> ic_tail_jmp(kw);
// It seems that this compute_loop currently only handles one block of oc.
// assert if it is extended in future to catch unpadded_oc_tail.
assert(IMPLICATION(oc_tail, nb_oc_block == 1));
int num_ker_loads = ic_block * nb_oc_block * kw;
int ker_pipeline_depth
= oc_tail || ic_tail ? 1 : nstl::min(4, num_ker_loads);
assert(ker_reg_base_idx + ker_pipeline_depth <= 32);
assert(oc_block >= ker_pipeline_depth);
int inp_mul = is_source_layout_nxc ? jcp.ngroups * jcp.ic
: (!jcp.is_1stconv ? ic_block : 1);
if (one_of(jcp.ndims, 3, 4)) {
mov(aux_reg_inp, reg_inp);
mov(aux_reg_ker, reg_ker);
}
if (jcp.ndims == 5) {
push(reg_out);
mov(reg_ki, ptr[param1 + GET_OFF(kd_padding)]);
if (icb_loop_in_compute_function) {
// need to continue with the same kernel pointer, but as
// aux_reg_ker_d == reg_ker we need to save its value and restore
// it after kd loop
assert(aux_reg_ker_d == reg_ker);
push(aux_reg_ker_d);
} else
mov(aux_reg_ker_d, ptr[param1 + GET_OFF(filt)]);
mov(aux_reg_inp_d, reg_inp);
L(kd_label);
mov(reg_kj, ptr[param1 + GET_OFF(kh_padding)]);
} else {
mov(reg_kj, reg_kh);
}
if (jcp.ndims == 5) {
mov(aux_reg_inp, aux_reg_inp_d);
mov(aux_reg_ker, aux_reg_ker_d);
}
align(16);
L(kh_label);
{
int step = 0;
for (int ki = 0; ki < kw; ki++) {
for (int ic = 0; ic < ic_block; ic++) {
if (ic_tail && ic >= ic_tail) {
// if src has only tails to compute, skip early
if (jcp.ic == ic_tail)
break;
else if (ic == ic_tail) {
cmp(reg_channel, ic_tail);
je(ic_tail_jmp[ki], T_NEAR);
}
}
int aux_kernel_offset = 0;
if (step == 0) {
for (int i = 0; i < ker_pipeline_depth; i++) {
aux_kernel_offset = get_kernel_offset(ki, ic, 0, i);
vmovups(vmm_ker(i),
EVEX_compress_addr(
aux_reg_ker, aux_kernel_offset));
}
} else if (step < num_ker_loads - ker_pipeline_depth + 1) {
int load_offset = ker_pipeline_depth - 1;
int ker_load_reg_idx
= (step + load_offset) % ker_pipeline_depth;
aux_kernel_offset
= get_kernel_offset(ki, ic, 0, load_offset);
vmovups(vmm_ker(ker_load_reg_idx),
EVEX_compress_addr(aux_reg_ker, aux_kernel_offset));
}
Vmm vmm_kernel = vmm_ker(step % ker_pipeline_depth);
int j_start = get_ow_start(ki, pad_l);
int j_end = get_ow_end(ur_w, ki, pad_r);
for (int j = j_start; j < j_end; j++) {
size_t aux_input_offset
= get_input_offset(ki, ic, j, pad_l);
auto addr = EVEX_compress_addr_safe(
aux_reg_inp, aux_input_offset, reg_long_offt, true);
vfmadd231ps(vmm_out(j, 0), vmm_kernel, addr);
}
step++;
}
L(ic_tail_jmp[ki]);
}
int ker_shift = jcp.typesize_in * kw * oc_block * ic_block;
add(aux_reg_ker, ker_shift);
int inp_shift = jcp.typesize_in * (jcp.dilate_h + 1) * iw * inp_mul;
add(aux_reg_inp, inp_shift);
dec(reg_kj);
cmp(reg_kj, 0);
jg(kh_label, T_NEAR);
}
if (jcp.ndims == 5) {
int inp_shift
= typesize * (jcp.dilate_d + 1) * jcp.ih * jcp.iw * inp_mul;
add(aux_reg_inp_d, inp_shift);
int ker_shift
= typesize * jcp.kw * jcp.kh * jcp.oc_block * jcp.ic_block;
add(aux_reg_ker_d, ker_shift);
dec(reg_ki);
cmp(reg_ki, 0);
jg(kd_label, T_NEAR);
if (icb_loop_in_compute_function) pop(aux_reg_ker_d);
pop(reg_out);
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::compute_loop_fma_core(
int ur_w, int pad_l, int pad_r) {
int kw = jcp.kw;
int ic_block = jcp.ic_block;
int oc_block = jcp.oc_block;
int nb_oc_block = jcp.nb_oc_blocking;
const bool is_source_layout_nxc = is_src_layout_nxc();
const bool icb_loop_in_compute_function = is_source_layout_nxc;
const int ic_tail = jcp.ic_tail;
Label kh_label, kd_label;
std::vector<Label> ic_tail_jmp(kw);
int shift_kernel_ptr
= jcp.typesize_in * jcp.kw * jcp.oc_block * jcp.ic_block;
int inp_mul = is_source_layout_nxc ? jcp.ngroups * jcp.ic
: (!jcp.is_1stconv ? ic_block : 1);
int shift_input_ptr
= jcp.typesize_in * (jcp.dilate_h + 1) * jcp.iw * inp_mul;
if (one_of(jcp.ndims, 3, 4)) {
mov(aux_reg_inp, reg_inp);
mov(aux_reg_ker, reg_ker);
}
if (jcp.ndims == 5) {
push(reg_out);
mov(reg_ki, ptr[param1 + GET_OFF(kd_padding)]);
if (icb_loop_in_compute_function) {
// need to continue with the same kernel pointer, but as
// aux_reg_ker_d == reg_ker we need to save its value and restore
// it after kd loop
assert(aux_reg_ker_d == reg_ker);
push(aux_reg_ker_d);
} else
mov(aux_reg_ker_d, ptr[param1 + GET_OFF(filt)]);
mov(aux_reg_inp_d, reg_inp);
L(kd_label);
mov(reg_kj, ptr[param1 + GET_OFF(kh_padding)]);
} else {
mov(reg_kj, reg_kh);
}
if (jcp.ndims == 5) {
mov(aux_reg_inp, aux_reg_inp_d);
mov(aux_reg_ker, aux_reg_ker_d);
}
L(kh_label);
{
for (int ki = 0; ki < kw; ki++) {
int jj_start = get_ow_start(ki, pad_l);
int jj_end = get_ow_end(ur_w, ki, pad_r);
for (int ic = 0; ic < ic_block; ic++) {
if (ic_tail && ic >= ic_tail) {
// if src has only tails to compute, skip early
if (jcp.ic == ic_tail)
break;
else if (ic == ic_tail) {
cmp(reg_channel, ic_tail);
je(ic_tail_jmp[ki], T_NEAR);
}
}
if (jcp.kernel_kind == expl_bcast) {
for (int jj = jj_start; jj < jj_end; jj++) {
size_t aux_input_offset
= get_input_offset(ki, ic, jj, pad_l);
vbroadcastss(vmm_inp(jj, nb_oc_block),
EVEX_compress_addr_safe(aux_reg_inp,
aux_input_offset, reg_long_offt));
}
}
for (int ii = 0; ii < nb_oc_block; ii++) {
int aux_kernel_offset = jcp.typesize_in
* (ii * jcp.nb_ic * jcp.kh * jcp.kw * jcp.kd
* ic_block * oc_block
+ ki * ic_block * oc_block + ic * oc_block);
if (jj_end - jj_start > 0)
vmovups(vmm_wei,
EVEX_compress_addr(
aux_reg_ker, aux_kernel_offset));
for (int jj = jj_start; jj < jj_end; jj++)
if (jcp.kernel_kind == expl_bcast)
vfmadd231ps(vmm_out(jj, ii),
vmm_inp(jj, nb_oc_block), vmm_wei);
else {
size_t aux_input_offset
= get_input_offset(ki, ic, jj, pad_l);
vfmadd231ps(vmm_out(jj, ii), vmm_wei,
EVEX_compress_addr_safe(aux_reg_inp,
aux_input_offset, reg_long_offt,
true));
}
}
}
L(ic_tail_jmp[ki]);
}
add(aux_reg_ker, shift_kernel_ptr);
add(aux_reg_inp, shift_input_ptr);
dec(reg_kj);
cmp(reg_kj, 0);
jg(kh_label, T_NEAR);
}
if (jcp.ndims == 5) {
add(aux_reg_inp_d,
typesize * (jcp.dilate_d + 1) * jcp.ih * jcp.iw * inp_mul);
const int ker_shift
= typesize * jcp.kw * jcp.kh * jcp.oc_block * jcp.ic_block;
add(aux_reg_ker_d, ker_shift);
dec(reg_ki);
cmp(reg_ki, 0);
jg(kd_label, T_NEAR);
if (icb_loop_in_compute_function) pop(aux_reg_ker_d);
pop(reg_out);
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::compute_loop(
int ur_w, int pad_l, int pad_r) {
if (jcp.ndims == 5) {
push(reg_oi);
base_post_ops_data_offset += reg64_size;
}
prepare_output(ur_w);
Label skip_compute_loop;
if (jcp.ndims == 5) {
if ((jcp.dilate_d >= jcp.id)
|| (jcp.kd - 1) * (jcp.dilate_d + 1)
< nstl::max(jcp.f_pad, jcp.back_pad)) {
mov(reg_kj, ptr[param1 + GET_OFF(kd_padding)]);
cmp(reg_kj, 0);
jle(skip_compute_loop, T_NEAR);
}
}
if ((jcp.dilate_h >= jcp.ih)
|| (jcp.kh - 1) * (jcp.dilate_h + 1)
< nstl::max(jcp.t_pad, jcp.b_pad)) {
mov(reg_kj, ptr[param1 + GET_OFF(kh_padding)]);
cmp(reg_kj, 0);
jle(skip_compute_loop, T_NEAR);
}
Label ic_loop;
const bool generate_icb_loop = jcp.nb_ic > 1 && is_src_layout_nxc();
if (generate_icb_loop) {
push(reg_inp);
push(reg_ker);
mov(reg_channel, ptr[param1 + GET_OFF(reduce_work)]);
L(ic_loop);
}
if (jcp.is_1stconv && jcp.kernel_kind != expl_bcast)
compute_loop_fma(ur_w, pad_l, pad_r);
else if (jcp.kernel_kind == embd_bcast && jcp.nb_oc_blocking == 1)
compute_loop_fma(ur_w, pad_l, pad_r);
else
compute_loop_fma_core(ur_w, pad_l, pad_r);
if (generate_icb_loop) {
assert(is_src_layout_nxc());
const int inp_shift = jcp.ic_block * jcp.typesize_in;
add(reg_inp, inp_shift);
const size_t ker_shift = (size_t)jcp.kd * jcp.kh * jcp.kw * jcp.ic_block
* jcp.oc_block * jcp.typesize_in;
safe_add(reg_ker, ker_shift, reg_ker_long_offt);
sub(reg_channel, jcp.ic_block);
jg(ic_loop, T_NEAR);
pop(reg_ker);
pop(reg_inp);
}
L(skip_compute_loop);
store_output(ur_w);
if (jcp.ndims == 5) {
pop(reg_oi);
base_post_ops_data_offset -= reg64_size;
}
}
template <typename Vmm>
void _jit_avx512_common_conv_fwd_kernel<Vmm>::generate() {
int iw = jcp.iw;
int ow = jcp.ow;
int ow_block = jcp.ow_block;
int nb_ow = jcp.nb_ow;
int kw = jcp.kw;
int l_pad = jcp.l_pad;
int ur_w = jcp.ur_w;
int ur_w_tail = jcp.ur_w_tail;
int stride_w = jcp.stride_w;
int inp_mult = is_src_layout_nxc() ? jcp.ngroups * jcp.ic
: (jcp.is_1stconv ? 1 : jcp.ic_block);
int inp_shift_pad = jcp.typesize_in * (ur_w * stride_w - l_pad) * inp_mult;
int inp_shift = jcp.typesize_in * ur_w * stride_w * inp_mult;
int inp_shift_pad_second_block = -1 * jcp.typesize_in * l_pad * inp_mult;
int out_shift = jcp.typesize_out * ur_w
* (is_dst_layout_nxc() ? jcp.ngroups * jcp.oc : jcp.oc_block);
preamble();
if (postops_injector_)
postops_injector_->push_post_ops_data_on_stack(this->param1, GET_OFF(post_ops_binary_rhs_arg_vec), reg_inp, reg_out);
mov(reg_inp, ptr[param1 + GET_OFF(src)]);
mov(reg_out, ptr[param1 + GET_OFF(dst)]);
mov(reg_ker, ptr[param1 + GET_OFF(filt)]);
mov(reg_kh, ptr[param1 + GET_OFF(kh_padding)]);
const int oc_tail = jcp.oc_tail;
if (oc_tail) {
Label done;
// dummy mask all 1's
kxnorw(k_oc_tail_mask, k_oc_tail_mask, k_oc_tail_mask);
mov(reg_load_work, ptr[param1 + GET_OFF(load_work)]);
cmp(reg_load_work, jcp.nb_oc_blocking * jcp.oc_block);
je(done, T_NEAR);
Reg32 reg_tail_32 = reg_tail.cvt32();
mov(reg_tail_32, (1 << oc_tail) - 1);
kmovw(k_oc_tail_mask, reg_tail_32);
L(done);
kmovw(postops_mask, k_oc_tail_mask);
} else if (jcp.with_binary)
if (jcp.oc_block != isa_simd_width_) {
const int mask = (1 << jcp.oc_block) - 1;
const Reg32 reg_tail_32 = reg_tail.cvt32();
mov(reg_tail_32, mask);
kmovw(postops_mask, reg_tail_32);
}
int r_pad = nstl::max(0, jcp.r_pad);
int n_oi = ow / ur_w;
int r_pad1 = calculate_end_padding(l_pad, ur_w * n_oi, iw, stride_w,
calculate_extended_filter_size(kw, jcp.dilate_w));
if (!is_ow_threading_on(jcp)) {
// ow is being processed as a whole - with left and right paddings
if (r_pad1 > 0) n_oi--;
if (ow == ur_w) {
compute_loop(ur_w, l_pad, r_pad);
} else {
if (n_oi == 0) {
compute_loop(ur_w, l_pad, r_pad1);
add(reg_inp, inp_shift_pad);
add(reg_out, out_shift);
if (ur_w_tail != 0) { compute_loop(ur_w_tail, 0, r_pad); }
} else {
xor_(reg_oi, reg_oi);
if (l_pad > 0) {
compute_loop(ur_w, l_pad, 0);
add(reg_inp, inp_shift_pad);
add(reg_out, out_shift);
inc(reg_oi);
}
if ((l_pad <= 0 && n_oi > 0) || (l_pad > 0 && n_oi > 1)) {
Label ow_loop_label;
L(ow_loop_label);
{
compute_loop(ur_w, 0, 0);
add(reg_inp, inp_shift);
add(reg_out, out_shift);
inc(reg_oi);
cmp(reg_oi, n_oi);
jl(ow_loop_label, T_NEAR);
}
}
if (r_pad1 > 0) {
compute_loop(ur_w, 0, r_pad1);
add(reg_inp, inp_shift);
add(reg_out, out_shift);
}
if (ur_w_tail != 0) { compute_loop(ur_w_tail, 0, r_pad); }
}
}
} else {
// ow block is only processed.
// Number of block is passed as parameter owb,
// and padding processing depends on this number.
Label end_label, last_oi_label, middle_ow_blocks_label, tail_label;
Label oi_loop_label, oi_loop_start_label, oi_loop_end_label;
assert(ow_block % ur_w == 0);
int n_oi_not_last_ow_block = ow_block / ur_w;
// to simplify code (and general regs usage),
// size of ow block must be >= 2 * ur_w
assert(n_oi_not_last_ow_block > 1);
int n_oi_next_last_ow_block = n_oi_not_last_ow_block;
int n_oi_first_ow_block = n_oi_not_last_ow_block;
int n_oi_last_ow_block = (ow - ow_block * (nb_ow - 1)) / ur_w;
// prepare right padding
bool next_last_ow_block_padded = r_pad1 > 0 && n_oi_last_ow_block == 0;
bool first_ow_block_padded
= next_last_ow_block_padded && jcp.nb_ow == 2;
bool last_ow_block_padded = r_pad1 > 0 && n_oi_last_ow_block > 0;
if (last_ow_block_padded)
n_oi_last_ow_block--;
else if (first_ow_block_padded)
n_oi_first_ow_block--;
else if (next_last_ow_block_padded)
n_oi_next_last_ow_block--;
mov(reg_owb, ptr[param1 + GET_OFF(owb)]);
cmp(reg_owb, 0); // is that the first ow-block ?
jg(middle_ow_blocks_label, T_NEAR);
// the first ow block, compute left padding
mov(reg_oi, n_oi_first_ow_block);
if (l_pad > 0) {
compute_loop(ur_w, l_pad, 0);
add(reg_inp, inp_shift_pad);
add(reg_out, out_shift);
dec(reg_oi);
}
jmp(oi_loop_label, T_NEAR);
// middle or last ow block entry
L(middle_ow_blocks_label);
if (l_pad > 0) {
// just to consider left padding, not compute
add(reg_inp, inp_shift_pad_second_block);
}
// set number of iteration for oi-loop
cmp(reg_owb, jcp.nb_ow - 1); // last ow-block ?
mov(reg_oi, n_oi_last_ow_block);
je(oi_loop_label, T_NEAR);
cmp(reg_owb, jcp.nb_ow - 2); // next to last ow-block ?
mov(reg_oi, n_oi_next_last_ow_block);
je(oi_loop_label, T_NEAR);
mov(reg_oi, n_oi_not_last_ow_block); // other middle ow-blocks
// oi loop w/o padding
L(oi_loop_label);
L(oi_loop_start_label);
cmp(reg_oi, 0);
jle(oi_loop_end_label, T_NEAR);
compute_loop(ur_w, 0, 0);
add(reg_inp, inp_shift);
add(reg_out, out_shift);
dec(reg_oi);
jmp(oi_loop_start_label, T_NEAR);
L(oi_loop_end_label);
mov(reg_owb, ptr[param1 + GET_OFF(owb)]);
cmp(reg_owb, 0); // first ow-block ?
if (first_ow_block_padded) {
je(last_oi_label, T_NEAR);
} else {
je(end_label, T_NEAR);
}
cmp(reg_owb, jcp.nb_ow - 2); // next to last ow-block ?
jl(end_label, T_NEAR);
if (next_last_ow_block_padded) {
je(last_oi_label, T_NEAR);
} else {
je(end_label, T_NEAR);
}
// that is last block
if (!last_ow_block_padded) { jmp(tail_label, T_NEAR); }
// last oi block with right padding
L(last_oi_label);
compute_loop(ur_w, 0, r_pad1);
add(reg_inp, inp_shift);
add(reg_out, out_shift);
mov(reg_owb, ptr[param1 + GET_OFF(owb)]);
cmp(reg_owb, jcp.nb_ow - 1); // last ow_block?
jl(end_label, T_NEAR);
L(tail_label);
if (ur_w_tail != 0) { compute_loop(ur_w_tail, 0, r_pad); }
L(end_label);
}
if (postops_injector_)
postops_injector_->reset_stack_pointer();
postamble();
if (jcp.with_eltwise)
postops_injector_->prepare_table(/* generate = */ true);
}
status_t jit_avx512_common_conv_fwd_kernel::init_conf(jit_conv_conf_t &jcp,
const convolution_desc_t &cd, memory_desc_t &src_md,
memory_desc_t &weights_md, memory_desc_t &dst_md,
memory_desc_t &bias_md, primitive_attr_t &attr, int nthreads) {
using namespace prop_kind;
if (!mayiuse(avx512_core)) return status::unimplemented;
const memory_desc_wrapper src_d(&src_md);
const memory_desc_wrapper weights_d(&weights_md);
const memory_desc_wrapper dst_d(&dst_md);
const memory_desc_wrapper bias_d(&bias_md);
if (!everyone_is(data_type::f32, src_d.data_type(), weights_d.data_type(),
dst_d.data_type()))
return status::unimplemented;
const int regs = 28;
const bool with_groups = weights_d.ndims() == src_d.ndims() + 1;
int ndims = src_d.ndims();
jcp = zero<decltype(jcp)>();
jcp.nthr = jcp.aligned_threads = nthreads;
jcp.ndims = ndims;
jcp.prop_kind = cd.prop_kind;
jcp.ngroups = with_groups ? weights_d.dims()[0] : 1;
jcp.mb = src_d.dims()[0];
jcp.oc = dst_d.dims()[1] / jcp.ngroups;
jcp.oc_without_padding = jcp.oc;
jcp.ic = src_d.dims()[1] / jcp.ngroups;
jcp.ic_without_padding = jcp.ic;
jcp.id = (ndims == 5) ? src_d.dims()[2] : 1;
jcp.ih = (ndims == 3) ? 1 : src_d.dims()[ndims - 2];
jcp.iw = src_d.dims()[ndims - 1];
jcp.od = (ndims == 5) ? dst_d.dims()[2] : 1;
jcp.oh = (ndims == 3) ? 1 : dst_d.dims()[ndims - 2];
jcp.ow = dst_d.dims()[ndims - 1];
jcp.kd = (ndims == 5) ? weights_d.dims()[with_groups + 2] : 1;
jcp.kh = (ndims == 3) ? 1 : weights_d.dims()[with_groups + ndims - 2];
jcp.kw = weights_d.dims()[with_groups + ndims - 1];
jcp.f_pad = (ndims == 5) ? cd.padding[0][0] : 0;
jcp.t_pad = (ndims == 3) ? 0 : cd.padding[0][ndims - 4];
jcp.l_pad = cd.padding[0][ndims - 3];
jcp.stride_d = (ndims == 5) ? cd.strides[0] : 1;
jcp.stride_h = (ndims == 3) ? 1 : cd.strides[ndims - 4];
jcp.stride_w = cd.strides[ndims - 3];
// Big int (> INT_MAX) values are unsupported and jcp fields may overflow
// TODO: change data type of jcp fields to size_t
VDISPATCH_CONV_IC(!((ndims == 5 && cd.dilates[ndims - 5] > INT_MAX)
|| (ndims >= 4 && cd.dilates[ndims - 4] > INT_MAX)
|| (cd.dilates[ndims - 3] > INT_MAX)),
VERBOSE_BAD_PARAM, "dilates");
jcp.dilate_d = (ndims == 5) ? cd.dilates[0] : 0;
jcp.dilate_h = (ndims == 3) ? 0 : cd.dilates[ndims - 4];
jcp.dilate_w = cd.dilates[ndims - 3];
int ext_kw = calculate_extended_filter_size(jcp.kw, jcp.dilate_w);
int ext_kh = calculate_extended_filter_size(jcp.kh, jcp.dilate_h);
int ext_kd = calculate_extended_filter_size(jcp.kd, jcp.dilate_d);
jcp.r_pad = calculate_end_padding(
jcp.l_pad, jcp.ow, jcp.iw, jcp.stride_w, ext_kw);
jcp.b_pad = calculate_end_padding(
jcp.t_pad, jcp.oh, jcp.ih, jcp.stride_h, ext_kh);
jcp.back_pad = calculate_end_padding(
jcp.f_pad, jcp.od, jcp.id, jcp.stride_d, ext_kd);
// bool kernel_outside_src = false || ext_kw <= jcp.l_pad
// || ext_kw <= jcp.r_pad || ext_kh <= jcp.t_pad || ext_kh <= jcp.b_pad
// || ext_kd <= jcp.f_pad || ext_kd <= jcp.back_pad;
// if (kernel_outside_src) return status::unimplemented;
const auto dat_tag_nxc = pick(ndims - 3, nwc, nhwc, ndhwc);
const auto dat_tag_ncx = pick(ndims - 3, ncw, nchw, ncdhw);
const auto dat_tag_nCx4c = pick(ndims - 3, nCw4c, nChw4c, nCdhw4c);
const auto dat_tag_nCx8c = pick(ndims - 3, nCw8c, nChw8c, nCdhw8c);
const auto dat_tag_nCx16c = pick(ndims - 3, nCw16c, nChw16c, nCdhw16c);
auto curr_src_tag = src_d.mb_stride_relaxed_match(dat_tag_nxc, dat_tag_nCx16c,
dat_tag_nCx8c, dat_tag_nCx4c, dat_tag_ncx);
auto curr_dst_tag = dst_d.mb_stride_relaxed_match(
dat_tag_nxc, dat_tag_nCx16c, dat_tag_nCx8c, dat_tag_nCx4c);
bool is_data_layout_nxc = IMPLICATION(curr_src_tag != dat_tag_nxc,
src_d.format_kind() == format_kind::any)
&& IMPLICATION(curr_dst_tag != dat_tag_nxc,
dst_d.format_kind() == format_kind::any)
&& utils::one_of(dat_tag_nxc, curr_src_tag, curr_dst_tag);
jcp.is_1stconv = is_1stconv(jcp);
bool ok_to_pad_channels = true && !is_data_layout_nxc && jcp.ngroups == 1
&& src_d.data_type() == data_type::f32;
const int full_simd_w = cpu_isa_traits<avx512_core>::vlen / typesize;
jcp.simd_w = full_simd_w;
bool ok_to_try_lower_zmm = true
&& IMPLICATION(is_data_layout_nxc,
jcp.oc < full_simd_w && jcp.ic < full_simd_w
&& jcp.ngroups > 1)
&& mayiuse(avx512_core) && src_d.data_type() == data_type::f32
&& !jcp.is_1stconv && !ok_to_pad_channels
&& (jcp.ic % jcp.simd_w != 0 || jcp.oc % jcp.simd_w != 0);
if (ok_to_try_lower_zmm) {
for (auto simd : {8, 4}) {
if (jcp.ic % simd == 0 && jcp.oc % simd == 0) {
jcp.simd_w = simd;
break;
}
}
}
jcp.oc_block = jcp.simd_w;
jcp.ic_block = jcp.is_1stconv ? jcp.ic : jcp.simd_w;
if (ok_to_pad_channels) {
jcp.oc = rnd_up(jcp.oc, jcp.oc_block);
jcp.ic = rnd_up(jcp.ic, jcp.ic_block);
}
if (!IMPLICATION(!is_data_layout_nxc,
jcp.oc % jcp.oc_block == 0 && jcp.ic % jcp.ic_block == 0))
return status::unimplemented;
jcp.ic_tail = is_data_layout_nxc ? jcp.ic % jcp.simd_w : 0;
jcp.oc_tail = jcp.oc_without_padding % jcp.simd_w;
format_tag_t src_tag, dst_tag, wei_tag;
if (jcp.simd_w == 8) {
assert(with_groups);
src_tag = is_data_layout_nxc ? dat_tag_nxc : dat_tag_nCx8c;
dst_tag = src_tag;
wei_tag = pick(ndims - 3, gOIw8i8o, gOIhw8i8o, gOIdhw8i8o);
} else if (jcp.simd_w == 4) {
assert(with_groups);
src_tag = is_data_layout_nxc ? dat_tag_nxc : dat_tag_nCx4c;
dst_tag = src_tag;
wei_tag = pick(ndims - 3, gOIw4i4o, gOIhw4i4o, gOIdhw4i4o);
} else {
dst_tag = is_data_layout_nxc ? dat_tag_nxc : dat_tag_nCx16c;
src_tag = is_data_layout_nxc
? dat_tag_nxc
: (jcp.is_1stconv ? dat_tag_ncx : dat_tag_nCx16c);
wei_tag = pick(2 * ndims - 6 + with_groups, OIw16i16o, gOIw16i16o,
OIhw16i16o, gOIhw16i16o, OIdhw16i16o, gOIdhw16i16o);
}
if (jcp.is_1stconv) {
wei_tag = with_groups
? ((jcp.simd_w == 4)
? pick(ndims - 3, gOwi4o, gOhwi4o, gOdhwi4o)
: pick(ndims - 3, gOwi16o, gOhwi16o, gOdhwi16o))
: pick(ndims - 3, Owi16o, Ohwi16o, Odhwi16o);
}
if (src_md.format_kind == format_kind::any)
CHECK(memory_desc_init_by_tag(src_md, src_tag));
else if (curr_src_tag != src_tag)
return status::unimplemented;
jcp.src_tag = src_tag;
if (dst_md.format_kind == format_kind::any)
CHECK(memory_desc_init_by_tag(dst_md, dst_tag));
else if (curr_dst_tag != dst_tag)
return status::unimplemented;
jcp.dst_tag = dst_tag;
if (init_tag(jcp.wei_tag, weights_md, weights_d, wei_tag)
!= status::success)
return status::unimplemented;
jcp.with_bias = cd.bias_desc.format_kind != format_kind::undef;
if (jcp.with_bias) {
if (bias_d.format_kind() == format_kind::any)
CHECK(memory_desc_init_by_tag(bias_md, x));
}
CHECK(attr.set_default_formats(&dst_md));
const auto &post_ops = attr.post_ops_;
jcp.with_sum = post_ops.find(primitive_kind::sum) != -1;
const int eltwise_ind = post_ops.find(primitive_kind::eltwise);
jcp.with_eltwise = eltwise_ind != -1;
if (jcp.with_eltwise) {
if (dst_d.data_type() == data_type::s32) return status::unimplemented;
}
const int binary_ind = post_ops.find(primitive_kind::binary);
const int prelu_ind = post_ops.find(primitive_kind::prelu);
jcp.with_binary = !everyone_is(-1, binary_ind, prelu_ind);
jcp.with_depthwise = post_ops.find(primitive_kind::depthwise) != -1;
jcp.with_quantization = post_ops.find(primitive_kind::quantization) != -1;
jcp.post_ops = post_ops;
using namespace injector;
static constexpr bool sum_at_pos_0_only = true;
static constexpr bool sum_requires_scale_one = true;
static constexpr bool sum_requires_zp_zero = true;
const bool post_ops_ok_ = post_ops_ok(post_ops_ok_args_t(avx512_core,