From df38ed5864536bebd878b1299d3b1e19304f0c64 Mon Sep 17 00:00:00 2001
From: Praveen Babu Chandran <PraveenBabu.Chandran@infineon.com>
Date: Wed, 17 Jul 2024 15:49:30 -0700
Subject: [PATCH] [Infineon] Update PSoC6 assets to latest release
---
.gitmodules | 41 +-
docs/guides/infineon_psoc6_software_update.md | 13 +-
.../all-clusters-app/infineon/psoc6/BUILD.gn | 46 +-
.../infineon/psoc6/include/AppConfig.h | 6 +-
.../infineon/psoc6/include/AppTask.h | 4 +
.../psoc6/include/CHIPProjectConfig.h | 4 +-
.../infineon/psoc6/src/AppTask.cpp | 37 +-
.../infineon/psoc6/src/ButtonHandler.cpp | 2 +-
.../infineon/psoc6/src/ClusterManager.cpp | 16 +-
.../infineon/psoc6/src/ZclCallbacks.cpp | 8 +-
.../infineon/psoc6/src/main.cpp | 26 +-
.../infineon/psoc6/BUILD.gn | 46 +-
.../infineon/psoc6/include/AppConfig.h | 6 +-
.../infineon/psoc6/include/AppTask.h | 4 +
.../psoc6/include/CHIPProjectConfig.h | 4 +-
.../infineon/psoc6/src/AppTask.cpp | 37 +-
.../infineon/psoc6/src/ButtonHandler.cpp | 2 +-
.../infineon/psoc6/src/ClusterManager.cpp | 16 +-
.../infineon/psoc6/src/ZclCallbacks.cpp | 8 +-
.../infineon/psoc6/src/main.cpp | 26 +-
examples/lighting-app/infineon/psoc6/BUILD.gn | 46 +-
.../infineon/psoc6/include/AppConfig.h | 6 +-
.../infineon/psoc6/include/AppTask.h | 4 +
.../psoc6/include/CHIPProjectConfig.h | 4 +-
.../infineon/psoc6/src/AppTask.cpp | 49 +-
.../infineon/psoc6/src/LightingManager.cpp | 12 +-
.../lighting-app/infineon/psoc6/src/main.cpp | 26 +-
examples/lock-app/infineon/psoc6/BUILD.gn | 46 +-
.../infineon/psoc6/include/AppConfig.h | 6 +-
.../lock-app/infineon/psoc6/include/AppTask.h | 4 +
.../psoc6/include/CHIPProjectConfig.h | 4 +-
.../lock-app/infineon/psoc6/src/AppTask.cpp | 51 +-
.../infineon/psoc6/src/LockManager.cpp | 87 +-
examples/lock-app/infineon/psoc6/src/main.cpp | 26 +-
.../infineon/psoc6/BUILD.gn | 2 +-
.../infineon/psoc6/include/AppConfig.h | 6 +-
.../infineon/psoc6/main.cpp | 16 +-
.../infineon/psoc6/init_psoc6Platform.cpp | 2 +-
.../infineon/psoc6/init_psoc6Platform.h | 2 +-
scripts/examples/gn_psoc6_example.sh | 2 +-
scripts/flashing/psoc6_firmware_utils.py | 138 +-
.../memory/platform/{p6.cfg => psoc6.cfg} | 24 +-
src/platform/Infineon/PSOC6/BUILD.gn | 8 +-
.../PSOC6/ConfigurationManagerImpl.cpp | 48 +-
.../Infineon/PSOC6/ConfigurationManagerImpl.h | 4 +-
.../PSOC6/ConnectivityManagerImpl.cpp | 61 +-
.../PSOC6/DiagnosticDataProviderImpl.cpp | 35 +-
.../PSOC6/DiagnosticDataProviderImpl.h | 2 +-
.../PSOC6/KeyValueStoreManagerImpl.cpp | 2 +-
.../Infineon/PSOC6/KeyValueStoreManagerImpl.h | 4 +-
src/platform/Infineon/PSOC6/Logging.cpp | 6 +-
.../PSOC6/NetworkCommissioningWiFiDriver.cpp | 14 +-
.../Infineon/PSOC6/OTAImageProcessorImpl.cpp | 5 +-
.../Infineon/PSOC6/OTAImageProcessorImpl.h | 5 +-
.../PSOC6/{P6Config.cpp => PSOC6Config.cpp} | 116 +-
.../PSOC6/{P6Config.h => PSOC6Config.h} | 14 +-
.../PSOC6/{P6Utils.cpp => PSOC6Utils.cpp} | 105 +-
.../PSOC6/{P6Utils.h => PSOC6Utils.h} | 2 +-
third_party/infineon/psoc6/BUILD.gn | 29 +-
third_party/infineon/psoc6/psoc6_board.gni | 2 +-
third_party/infineon/psoc6/psoc6_sdk.gni | 33 +-
third_party/infineon/psoc6/psoc6_sdk/Makefile | 236 -
.../{Debug => }/GCC_ARM.json | 212 +-
.../CY8CKIT-062S2-43012/Release/GCC_ARM.json | 642 --
.../psoc6_sdk/configs/GeneratedSource/cycfg.c | 50 +
.../psoc6_sdk/configs/GeneratedSource/cycfg.h | 52 +
.../configs/GeneratedSource/cycfg.timestamp | 28 +
.../configs/GeneratedSource/cycfg_capsense.c | 920 ++
.../configs/GeneratedSource/cycfg_capsense.h | 2334 ++++
.../GeneratedSource/cycfg_capsense.timestamp | 26 +
.../GeneratedSource/cycfg_capsense_defines.h | 159 +
.../cycfg_capsense_tuner_regmap.h | 972 ++
.../configs/GeneratedSource/cycfg_clocks.c | 69 +
.../configs/GeneratedSource/cycfg_clocks.h | 69 +
.../GeneratedSource/cycfg_connectivity_bt.c | 29 +
.../GeneratedSource/cycfg_connectivity_bt.h | 52 +
.../configs/GeneratedSource/cycfg_notices.h | 51 +
.../GeneratedSource/cycfg_peripherals.c | 38 +
.../GeneratedSource/cycfg_peripherals.h | 85 +
.../configs/GeneratedSource/cycfg_pins.c | 411 +
.../configs/GeneratedSource/cycfg_pins.h | 674 ++
.../GeneratedSource/cycfg_qspi_memslot.c | 472 +
.../GeneratedSource/cycfg_qspi_memslot.h | 68 +
.../cycfg_qspi_memslot.timestamp | 26 +
.../configs/GeneratedSource/cycfg_routing.c | 40 +
.../configs/GeneratedSource/cycfg_routing.h | 61 +
.../configs/GeneratedSource/cycfg_system.c | 1160 ++
.../configs/GeneratedSource/cycfg_system.h | 105 +
.../configs/GeneratedSource/qspi_config.cfg | 29 +
.../psoc6/psoc6_sdk/configs/cy_flash_map.h | 22 +
.../psoc6/psoc6_sdk/configs/lwipopts.h | 4 +-
.../psoc6_sdk/libs/TARGET_CY8CKIT-062S2-43012 | 2 +-
.../psoc6/psoc6_sdk/libs/abstraction-rtos | 2 +-
.../psoc6/psoc6_sdk/libs/anycloud-ota | 1 -
.../psoc6/psoc6_sdk/libs/bluetooth-freertos | 1 -
.../infineon/psoc6/psoc6_sdk/libs/btstack | 2 +-
.../psoc6/psoc6_sdk/libs/btstack-integration | 1 +
.../infineon/psoc6/psoc6_sdk/libs/cat1cm0p | 1 +
.../psoc6/psoc6_sdk/libs/clib-support | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/cmsis | 1 +
.../psoc6_sdk/libs/connectivity-utilities | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/core-lib | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/core-make | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/freertos | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/kv-store | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/lwip | 2 +-
.../libs/lwip-network-interface-integration | 2 +-
.../psoc6/psoc6_sdk/libs/mtb-hal-cat1 | 2 +-
.../psoc6/psoc6_sdk/libs/mtb-pdl-cat1 | 2 +-
.../psoc6_sdk/libs/ota-bootloader-abstraction | 1 +
.../infineon/psoc6/psoc6_sdk/libs/ota-update | 1 +
.../infineon/psoc6/psoc6_sdk/libs/psoc6cm0p | 1 -
.../psoc6/psoc6_sdk/libs/recipe-make-cat1a | 2 +-
.../infineon/psoc6/psoc6_sdk/libs/retarget-io | 2 +-
.../psoc6/psoc6_sdk/libs/secure-sockets | 2 +-
.../psoc6/psoc6_sdk/libs/serial-flash | 2 +-
.../psoc6/psoc6_sdk/libs/whd-bsp-integration | 2 +-
.../psoc6_sdk/libs/wifi-connection-manager | 2 +-
.../psoc6/psoc6_sdk/libs/wifi-host-driver | 2 +-
.../psoc6/psoc6_sdk/ota/bootutil/bootutil.h | 79 +
.../psoc6_sdk/ota/bootutil/bootutil_log.h | 49 +
.../psoc6/psoc6_sdk/ota/bootutil/ignore.h | 101 +
.../config/mcuboot_config/mcuboot_assert.h | 20 -
.../config/mcuboot_config/mcuboot_config.h | 151 -
.../config/mcuboot_config/mcuboot_logging.h | 107 -
.../ota/config/mcuboot_crypto_acc_config.h | 52 -
.../ota/config/mcuboot_crypto_config.h | 3606 ------
.../ota/cy8c6xxa_cm4_dual_ota_int.ld | 21 +-
.../ota/matter-psoc6-mcuboot-bootloader.hex | 9868 ++++++++++-------
.../psoc6/psoc6_sdk/ota/ota_base_build.sh | 25 +-
.../psoc6/psoc6_sdk/ota/ota_update_build.sh | 29 +-
131 files changed, 14959 insertions(+), 9703 deletions(-)
rename scripts/tools/memory/platform/{p6.cfg => psoc6.cfg} (76%)
rename src/platform/Infineon/PSOC6/{P6Config.cpp => PSOC6Config.cpp} (52%)
rename src/platform/Infineon/PSOC6/{P6Config.h => PSOC6Config.h} (93%)
rename src/platform/Infineon/PSOC6/{P6Utils.cpp => PSOC6Utils.cpp} (85%)
rename src/platform/Infineon/PSOC6/{P6Utils.h => PSOC6Utils.h} (99%)
delete mode 100755 third_party/infineon/psoc6/psoc6_sdk/Makefile
rename third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/{Debug => }/GCC_ARM.json (83%)
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Release/GCC_ARM.json
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.timestamp
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.timestamp
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_defines.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_tuner_regmap.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_notices.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.timestamp
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.c
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/qspi_config.cfg
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/configs/cy_flash_map.h
delete mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota
delete mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/bluetooth-freertos
create mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration
create mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p
create mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/cmsis
create mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction
create mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/ota-update
delete mode 160000 third_party/infineon/psoc6/psoc6_sdk/libs/psoc6cm0p
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil_log.h
create mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/ignore.h
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_assert.h
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_config.h
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_logging.h
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_acc_config.h
delete mode 100644 third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_config.h
diff --git a/.gitmodules b/.gitmodules
index d23157baea4481..1f4129f9f2df9d 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -97,11 +97,6 @@
path = third_party/infineon/psoc6/psoc6_sdk/libs/abstraction-rtos
url = https://github.com/Infineon/abstraction-rtos
platforms = infineon
-[submodule "p6/bluetooth-freertos"]
- path = third_party/infineon/psoc6/psoc6_sdk/libs/bluetooth-freertos
- url = https://github.com/Infineon/bluetooth-freertos
- branch = v2.X
- platforms = infineon
[submodule "p6/btstack"]
path = third_party/infineon/psoc6/psoc6_sdk/libs/btstack
url = https://github.com/Infineon/btstack
@@ -134,10 +129,6 @@
path = third_party/infineon/psoc6/psoc6_sdk/libs/mtb-pdl-cat1
url = https://github.com/Infineon/mtb-pdl-cat1
platforms = infineon
-[submodule "p6/psoc6cm0p"]
- path = third_party/infineon/psoc6/psoc6_sdk/libs/psoc6cm0p
- url = https://github.com/Infineon/psoc6cm0p
- platforms = infineon
[submodule "p6/whd-bsp-integration"]
path = third_party/infineon/psoc6/psoc6_sdk/libs/whd-bsp-integration
url = https://github.com/Infineon/whd-bsp-integration
@@ -185,10 +176,6 @@
[submodule "third_party/jsoncpp/repo"]
path = third_party/jsoncpp/repo
url = https://github.com/open-source-parsers/jsoncpp.git
-[submodule "third_party/p6/p6_sdk/libs/anycloud-ota"]
- path = third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota
- url = https://github.com/Infineon/anycloud-ota
- platforms = infineon
[submodule "third_party/mbed-mcu-boot/repo"]
path = third_party/mbed-mcu-boot/repo
url = https://github.com/ATmobica/mcuboot.git
@@ -312,10 +299,6 @@
url = https://github.com/STMicroelectronics/STM32CubeWB.git
branch = v1.18.0
platforms = stm32
-[submodule "p6/lwip-network-interface-integration"]
- path = third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration
- url = https://github.com/Infineon/lwip-network-interface-integration.git
- platforms = infineon
[submodule "third_party/infineon/trustm/optiga-trust-m"]
path = third_party/infineon/trustm/optiga-trust-m
url = https://github.com/Infineon/optiga-trust-m.git
@@ -326,3 +309,27 @@
url = https://github.com/NXP/nxp_matter_support.git
branch = master
platforms = nxp
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration
+ url = https://github.com/Infineon/btstack-integration.git
+ platforms = infineon
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p
+ url = https://github.com/Infineon/cat1cm0p.git
+ platforms = infineon
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/cmsis"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/cmsis
+ url = https://github.com/Infineon/cmsis.git
+ platforms = infineon
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction
+ url = https://github.com/Infineon/ota-bootloader-abstraction.git
+ platforms = infineon
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/ota-update"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/ota-update
+ url = https://github.com/Infineon/ota-update.git
+ platforms = infineon
+[submodule "third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration"]
+ path = third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration
+ url = https://github.com/Infineon/lwip-network-interface-integration.git
+ platforms = infineon
diff --git a/docs/guides/infineon_psoc6_software_update.md b/docs/guides/infineon_psoc6_software_update.md
index 4367142b79e4d8..e7e4f535be4d6a 100644
--- a/docs/guides/infineon_psoc6_software_update.md
+++ b/docs/guides/infineon_psoc6_software_update.md
@@ -25,7 +25,7 @@ Infineon PSoC6 example applications by passing the
```
$ scripts/build/build_examples.py --enable-flashbundle --target infineon-psoc6-lock-ota build
- $ third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh out/infineon-psoc6-lock-ota chip-psoc6-lock-example
+ $ third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh psoc6-lock chip-psoc6-lock-example
```
- Build the PSoC6 OTA Update application from the chip root dir and create OTA
@@ -33,15 +33,22 @@ Infineon PSoC6 example applications by passing the
```
$ scripts/build/build_examples.py --enable-flashbundle --no-log-timestamps --target infineon-psoc6-lock-ota-updateimage build
- $ third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh out/infineon-psoc6-lock-ota-updateimage chip-psoc6-lock-example
+ $ third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh psoc6-lock chip-psoc6-lock-example
```
-* Additionally a pre-compiled bootloader must be flashed to the board using
+* Additionally a pre-compiled bootloader must be flashed to the board before
+ flashing the application using
[Cypress Programmer](https://softwaretools.infineon.com/tools/com.ifx.tb.tool.cypressprogrammer).
This image can be found at:
$ ./third_party/infineon/psoc6/psoc6_sdk/ota/matter-psoc6-mcuboot-bootloader.hex
+* Flash the application after putting the CY8CKIT-062S2-43012 board on
+ KitProg3 CMSIS-DAP Mode by pressing the `MODE SELECT` button.
+
+ $ cd ~/connectedhomeip
+ $ python3 out/infineon-psoc6-lock-ota/chip-psoc6-lock-example.flash.py
+
* In a terminal start the Provider app passing to it the path to the Matter
OTA file created in the previous step:(output of ota_update_build step)
diff --git a/examples/all-clusters-app/infineon/psoc6/BUILD.gn b/examples/all-clusters-app/infineon/psoc6/BUILD.gn
index 64930593383bfe..aab6fdfd275986 100644
--- a/examples/all-clusters-app/infineon/psoc6/BUILD.gn
+++ b/examples/all-clusters-app/infineon/psoc6/BUILD.gn
@@ -45,32 +45,38 @@ config("psoc6_ota_config") {
ldflags = [ "-T" + rebase_path(linker_script, root_build_dir) ]
- ldflags += [ "-Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,MCUBOOT_BOOTLOADER_SIZE=0x18000,--defsym,CY_BOOT_PRIMARY_1_SIZE=0x1C0000" ]
+ ldflags += [ "-Wl,--undefined=uxTopUsedPriority -Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,FLASH_AREA_IMG_1_PRIMARY_START=0x028000,--defsym,FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000" ]
defines = [
"P6_OTA",
- "OTA_SUPPORT ",
- "OTA_USE_EXTERNAL_FLASH",
- "CY_BOOT_USE_EXTERNAL_FLASH",
- "MCUBOOT_HEADER_SIZE=0x400",
- "MCUBOOT_MAX_IMG_SECTORS=3584",
- "CY_BOOT_SCRATCH_SIZE=0x00004000",
- "MCUBOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_PRIMARY_1_START=0x00018000",
- "CY_BOOT_PRIMARY_1_SIZE=0x1C0000",
- "CY_BOOT_SECONDARY_1_START=0x00000000",
- "CY_BOOT_SECONDARY_1_SIZE=0x001C0000",
- "CY_FLASH_ERASE_VALUE=0xFF",
+ "COMPONENT_MCUBOOT",
+ "CY_BOOTLOADER=MCUBOOT",
+ "OTA_SUPPORT=1",
+ "COMPONENT_OTA_PSOC_062",
+ "PSOC_062_2M",
+ "OTA_USE_EXTERNAL_FLASH=1",
+ "ENABLE_OTA_LOGS",
+ "ENABLE_OTA_BOOTLOADER_ABSTRACTION_LOGS",
"MCUBOOT_IMAGE_NUMBER=1",
- "MCUBOOT_SLOT_SIZE=0x1C0000",
- "MCUBOOT_SCRATCH_SIZE=0x4000",
- "MCUBOOT_SECTOR_SIZE = 512",
+ "MCUBOOT_MAX_IMG_SECTORS=3584",
+ "FLASH_AREA_BOOTLOADER_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_BOOTLOADER_SIZE=0x028000",
+ "FLASH_AREA_BOOTLOADER_START=0x000000",
+ "FLASH_AREA_IMAGE_SCRATCH_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMAGE_SCRATCH_SIZE=0x080000",
+ "FLASH_AREA_IMAGE_SCRATCH_START=0x440000",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_SIZE=0x006c00",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_START=0x1e8000",
+ "FLASH_AREA_IMG_1_PRIMARY_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_PRIMARY_START=0x028000",
+ "FLASH_AREA_IMG_1_SECONDARY_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMG_1_SECONDARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_SECONDARY_START=0x000200",
"APP_VERSION_MAJOR=1",
"APP_VERSION_MINOR=0",
"APP_VERSION_BUILD=0",
- "MCUBOOT_OVERWRITE_ONLY",
- "CY_ENABLE_XIP_PROGRAM",
]
if (build_update_image) {
@@ -87,7 +93,7 @@ psoc6_sdk_sources("all_clusters_app_sdk_sources") {
defines = [
"BOARD_ID=${psoc6_board}",
- "P6_LOG_ENABLED=1",
+ "PSOC6_LOG_ENABLED=1",
"CHIP_DEVICE_CONFIG_USE_TEST_SETUP_PIN_CODE=${setup_pin_code}",
]
diff --git a/examples/all-clusters-app/infineon/psoc6/include/AppConfig.h b/examples/all-clusters-app/infineon/psoc6/include/AppConfig.h
index 35e45a8aef4223..cad1a523bfa188 100644
--- a/examples/all-clusters-app/infineon/psoc6/include/AppConfig.h
+++ b/examples/all-clusters-app/infineon/psoc6/include/AppConfig.h
@@ -48,14 +48,14 @@
#define THREAD_ACTIVE_POLLING_INTERVAL_MS 100
#define THREAD_INACTIVE_POLLING_INTERVAL_MS 1000
-// P6 Logging
+// PSOC6 Logging
#ifdef __cplusplus
extern "C" {
#endif
void appError(int err);
-void P6Log(const char * aFormat, ...);
-#define P6_LOG(...) P6Log(__VA_ARGS__)
+void PSOC6Log(const char * aFormat, ...);
+#define PSOC6_LOG(...) PSOC6Log(__VA_ARGS__)
#ifdef __cplusplus
}
diff --git a/examples/all-clusters-app/infineon/psoc6/include/AppTask.h b/examples/all-clusters-app/infineon/psoc6/include/AppTask.h
index aa031fe3ba4b52..a80d8db688fc2d 100644
--- a/examples/all-clusters-app/infineon/psoc6/include/AppTask.h
+++ b/examples/all-clusters-app/infineon/psoc6/include/AppTask.h
@@ -29,6 +29,10 @@
#include <ble/Ble.h>
#include <platform/CHIPDeviceLayer.h>
+extern "C" {
+#include "flash_map_backend.h"
+}
+
// Application-defined error codes in the CHIP_ERROR space.
#define APP_ERROR_EVENT_QUEUE_FAILED CHIP_APPLICATION_ERROR(0x01)
#define APP_ERROR_CREATE_TASK_FAILED CHIP_APPLICATION_ERROR(0x02)
diff --git a/examples/all-clusters-app/infineon/psoc6/include/CHIPProjectConfig.h b/examples/all-clusters-app/infineon/psoc6/include/CHIPProjectConfig.h
index f7bb585960ec3c..1b6f96ee03405f 100644
--- a/examples/all-clusters-app/infineon/psoc6/include/CHIPProjectConfig.h
+++ b/examples/all-clusters-app/infineon/psoc6/include/CHIPProjectConfig.h
@@ -42,10 +42,10 @@
#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_ID 0x8003
/* The ProductName attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "P6-CYW43012 All Clusters"
+#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "PSOC6-CYW43012 All Clusters"
/* The HardwareVersionString attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "P6-43012"
+#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "PSOC6-43012"
/* The HardwareVersion attribute of the Basic cluster. */
#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION 43012
diff --git a/examples/all-clusters-app/infineon/psoc6/src/AppTask.cpp b/examples/all-clusters-app/infineon/psoc6/src/AppTask.cpp
index 0d0ba0f5b25663..143e25e87e0114 100644
--- a/examples/all-clusters-app/infineon/psoc6/src/AppTask.cpp
+++ b/examples/all-clusters-app/infineon/psoc6/src/AppTask.cpp
@@ -148,7 +148,7 @@ CHIP_ERROR AppTask::StartAppTask()
sAppEventQueue = xQueueCreateStatic(APP_EVENT_QUEUE_SIZE, sizeof(AppEvent), sAppEventQueueBuffer, &sAppEventQueueStruct);
if (sAppEventQueue == NULL)
{
- P6_LOG("Failed to allocate app event queue");
+ PSOC6_LOG("Failed to allocate app event queue");
appError(APP_ERROR_EVENT_QUEUE_FAILED);
}
// Start App task.
@@ -160,10 +160,10 @@ CHIP_ERROR AppTask::Init()
{
CHIP_ERROR err = CHIP_NO_ERROR;
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
- int rc = boot_set_confirmed();
+ int rc = flash_area_boot_set_confirmed();
if (rc != 0)
{
- P6_LOG("boot_set_confirmed failed");
+ PSOC6_LOG("flash_area_boot_set_confirmed failed");
appError(CHIP_ERROR_UNINITIALIZED);
}
#endif
@@ -196,11 +196,11 @@ CHIP_ERROR AppTask::Init()
);
if (sFunctionTimer == NULL)
{
- P6_LOG("funct timer create failed");
+ PSOC6_LOG("funct timer create failed");
appError(APP_ERROR_CREATE_TIMER_FAILED);
}
NetWorkCommissioningInstInit();
- P6_LOG("Current Software Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
// Initialize LEDs
sStatusLED.Init(SYSTEM_STATE_LED);
@@ -221,11 +221,11 @@ void AppTask::AppTaskMain(void * pvParameter)
CHIP_ERROR err = sAppTask.Init();
if (err != CHIP_NO_ERROR)
{
- P6_LOG("AppTask.Init() failed");
+ PSOC6_LOG("AppTask.Init() failed");
appError(err);
}
- P6_LOG("App Task started");
+ PSOC6_LOG("App Task started");
while (true)
{
@@ -301,7 +301,8 @@ void AppTask::FunctionHandler(AppEvent * event)
{
if (!sAppTask.mFunctionTimerActive && sAppTask.mFunction == Function::kNoneSelected)
{
- P6_LOG("Factory Reset Triggered. Press button again within %us to cancel.", FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
+ PSOC6_LOG("Factory Reset Triggered. Press button again within %us to cancel.",
+ FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
// Start timer for FACTORY_RESET_CANCEL_WINDOW_TIMEOUT to allow user to
// cancel, if required.
sAppTask.StartTimer(FACTORY_RESET_CANCEL_WINDOW_TIMEOUT);
@@ -325,7 +326,7 @@ void AppTask::FunctionHandler(AppEvent * event)
// canceled.
sAppTask.mFunction = Function::kNoneSelected;
- P6_LOG("Factory Reset has been Canceled");
+ PSOC6_LOG("Factory Reset has been Canceled");
}
}
}
@@ -334,7 +335,7 @@ void AppTask::CancelTimer()
{
if (xTimerStop(sFunctionTimer, 0) == pdFAIL)
{
- P6_LOG("app timer stop() failed");
+ PSOC6_LOG("app timer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
@@ -345,7 +346,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
{
if (xTimerIsTimerActive(sFunctionTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -354,7 +355,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sFunctionTimer, aTimeoutInMs / portTICK_PERIOD_MS, 100) != pdPASS)
{
- P6_LOG("app timer start() failed");
+ PSOC6_LOG("app timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
@@ -385,11 +386,11 @@ void AppTask::PostEvent(const AppEvent * event)
}
if (!status)
- P6_LOG("Failed to post event to app task event queue");
+ PSOC6_LOG("Failed to post event to app task event queue");
}
else
{
- P6_LOG("Event Queue is NULL should never happen");
+ PSOC6_LOG("Event Queue is NULL should never happen");
}
}
@@ -401,7 +402,7 @@ void AppTask::DispatchEvent(AppEvent * event)
}
else
{
- P6_LOG("Event received with no handler. Dropping event.");
+ PSOC6_LOG("Event received with no handler. Dropping event.");
}
}
@@ -414,7 +415,7 @@ void AppTask::OnOffUpdateClusterState(intptr_t context)
if (status != Protocols::InteractionModel::Status::Success)
{
- P6_LOG("ERR: updating on/off %x", to_underlying(status));
+ PSOC6_LOG("ERR: updating on/off %x", to_underlying(status));
}
}
@@ -435,7 +436,7 @@ void AppTask::InitOTARequestor()
gRequestorUser.Init(&gRequestorCore, &gImageProcessor);
- P6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
}
#endif
diff --git a/examples/all-clusters-app/infineon/psoc6/src/ButtonHandler.cpp b/examples/all-clusters-app/infineon/psoc6/src/ButtonHandler.cpp
index 7d65fc4134625e..3fbd1c13796fd1 100644
--- a/examples/all-clusters-app/infineon/psoc6/src/ButtonHandler.cpp
+++ b/examples/all-clusters-app/infineon/psoc6/src/ButtonHandler.cpp
@@ -102,7 +102,7 @@ void ButtonHandler::TimerCallback(TimerHandle_t xTimer)
buttonevent = cyhal_gpio_read(APP_FUNCTION_BUTTON);
break;
default:
- P6_LOG("Unhandled TimerID: %d", timerId);
+ PSOC6_LOG("Unhandled TimerID: %d", timerId);
break;
}
diff --git a/examples/all-clusters-app/infineon/psoc6/src/ClusterManager.cpp b/examples/all-clusters-app/infineon/psoc6/src/ClusterManager.cpp
index 6659131ea8b9ab..caf1ac85dabc9e 100644
--- a/examples/all-clusters-app/infineon/psoc6/src/ClusterManager.cpp
+++ b/examples/all-clusters-app/infineon/psoc6/src/ClusterManager.cpp
@@ -50,9 +50,9 @@ ClusterManager ClusterManager::sCluster;
void ClusterManager::OnOnOffPostAttributeChangeCallback(EndpointId endpointId, AttributeId attributeId, uint8_t * value)
{
VerifyOrExit(attributeId == OnOff::Attributes::OnOff::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
// At this point we can assume that value points to a bool value.
mEndpointOnOffState[endpointId - 1] = *value;
@@ -70,9 +70,9 @@ void ClusterManager::OnLevelControlAttributeChangeCallback(EndpointId endpointId
uint8_t brightness = onOffState ? *value : 0;
VerifyOrExit(attributeId == LevelControl::Attributes::CurrentLevel::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
endpointId == ENDPOINT_FIRST_IDX ? sClusterLED.SetBrightness(brightness) : sLightLED.SetBrightness(brightness);
@@ -84,9 +84,9 @@ void ClusterManager::OnColorControlAttributeChangeCallback(EndpointId endpointId
{
VerifyOrExit(attributeId == ColorControl::Attributes::CurrentHue::Id ||
attributeId == ColorControl::Attributes::CurrentSaturation::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
if (endpointId == 1)
{
uint8_t hue, saturation;
@@ -136,8 +136,8 @@ void IdentifyTimerHandler(Layer * systemLayer, void * appState)
void ClusterManager::OnIdentifyPostAttributeChangeCallback(EndpointId endpointId, AttributeId attributeId, uint8_t * value)
{
VerifyOrExit(attributeId == Identify::Attributes::IdentifyTime::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
- VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX, P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX, PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
/* IdentifyTime Attribute Spec mentions "flashing a light with a period of 0.5 seconds" */
sStatusLED.Blink(kIdentifyTimerDelayMS * 2);
diff --git a/examples/all-clusters-app/infineon/psoc6/src/ZclCallbacks.cpp b/examples/all-clusters-app/infineon/psoc6/src/ZclCallbacks.cpp
index 9a439771026736..2e805ac61367ee 100644
--- a/examples/all-clusters-app/infineon/psoc6/src/ZclCallbacks.cpp
+++ b/examples/all-clusters-app/infineon/psoc6/src/ZclCallbacks.cpp
@@ -39,9 +39,9 @@ void MatterPostAttributeChangeCallback(const chip::app::ConcreteAttributePath &
EndpointId endpoint = attributePath.mEndpointId;
ClusterId clusterId = attributePath.mClusterId;
AttributeId attributeId = attributePath.mAttributeId;
- P6_LOG("MatterPostAttributeChangeCallback - Cluster ID: " ChipLogFormatMEI
- ", EndPoint ID: '0x%02x', Attribute ID: " ChipLogFormatMEI,
- ChipLogValueMEI(clusterId), endpoint, ChipLogValueMEI(attributeId));
+ PSOC6_LOG("MatterPostAttributeChangeCallback - Cluster ID: " ChipLogFormatMEI
+ ", EndPoint ID: '0x%02x', Attribute ID: " ChipLogFormatMEI,
+ ChipLogValueMEI(clusterId), endpoint, ChipLogValueMEI(attributeId));
switch (clusterId)
{
@@ -61,7 +61,7 @@ void MatterPostAttributeChangeCallback(const chip::app::ConcreteAttributePath &
ClusterMgr().OnColorControlAttributeChangeCallback(endpoint, attributeId, value);
break;
default:
- P6_LOG("Unhandled cluster ID: " ChipLogFormatMEI, ChipLogValueMEI(clusterId));
+ PSOC6_LOG("Unhandled cluster ID: " ChipLogFormatMEI, ChipLogValueMEI(clusterId));
break;
}
}
diff --git a/examples/all-clusters-app/infineon/psoc6/src/main.cpp b/examples/all-clusters-app/infineon/psoc6/src/main.cpp
index 2dc8d6353cc62c..2344f380f802fc 100644
--- a/examples/all-clusters-app/infineon/psoc6/src/main.cpp
+++ b/examples/all-clusters-app/infineon/psoc6/src/main.cpp
@@ -57,7 +57,7 @@ static void main_task(void * pvParameters);
//=================================================================================
void appError(int err)
{
- P6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
+ PSOC6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
portDISABLE_INTERRUPTS();
while (true)
;
@@ -90,35 +90,35 @@ static void main_task(void * pvParameters)
CHIP_ERROR ret = chip::DeviceLayer::PersistedStorage::KeyValueStoreMgrImpl().Init();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
+ PSOC6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
appError(ret);
}
ret = PlatformMgr().InitChipStack();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().InitChipStack() failed");
+ PSOC6_LOG("PlatformMgr().InitChipStack() failed");
appError(ret);
}
- ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("P6_CLUSTERS");
+ ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("PSOC6_CLUSTERS");
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
+ PSOC6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
appError(ret);
}
- P6_LOG("Starting Platform Manager Event Loop");
+ PSOC6_LOG("Starting Platform Manager Event Loop");
ret = PlatformMgr().StartEventLoopTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().StartEventLoopTask() failed");
+ PSOC6_LOG("PlatformMgr().StartEventLoopTask() failed");
appError(ret);
}
ret = GetAppTask().StartAppTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("GetAppTask().Init() failed");
+ PSOC6_LOG("GetAppTask().Init() failed");
appError(ret);
}
@@ -131,7 +131,7 @@ static void main_task(void * pvParameters)
// ================================================================================
int main(void)
{
- init_p6Platform();
+ init_psoc6Platform();
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
// Clear watchdog timer (started by bootloader) so that it doesn't trigger a reset
cyhal_wdt_t wdt_obj;
@@ -142,9 +142,9 @@ int main(void)
MemMonitoring::startHeapMonitoring();
#endif
- P6_LOG("==================================================\r\n");
- P6_LOG("chip-p6-all-clusters-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("==================================================\r\n");
+ PSOC6_LOG("==================================================\r\n");
+ PSOC6_LOG("chip-psoc6-all-clusters-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("==================================================\r\n");
/* Start the FreeRTOS scheduler */
vTaskStartScheduler();
@@ -154,5 +154,5 @@ int main(void)
PlatformMgr().Shutdown();
// Should never get here.
- P6_LOG("vTaskStartScheduler() failed");
+ PSOC6_LOG("vTaskStartScheduler() failed");
}
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/BUILD.gn b/examples/all-clusters-minimal-app/infineon/psoc6/BUILD.gn
index c70c282db2ac17..c1bbd2b34aa130 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/BUILD.gn
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/BUILD.gn
@@ -46,32 +46,38 @@ config("psoc6_ota_config") {
ldflags = [ "-T" + rebase_path(linker_script, root_build_dir) ]
- ldflags += [ "-Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,MCUBOOT_BOOTLOADER_SIZE=0x18000,--defsym,CY_BOOT_PRIMARY_1_SIZE=0x1C0000" ]
+ ldflags += [ "-Wl,--undefined=uxTopUsedPriority -Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,FLASH_AREA_IMG_1_PRIMARY_START=0x028000,--defsym,FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000" ]
defines = [
"P6_OTA",
- "OTA_SUPPORT ",
- "OTA_USE_EXTERNAL_FLASH",
- "CY_BOOT_USE_EXTERNAL_FLASH",
- "MCUBOOT_HEADER_SIZE=0x400",
- "MCUBOOT_MAX_IMG_SECTORS=3584",
- "CY_BOOT_SCRATCH_SIZE=0x00004000",
- "MCUBOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_PRIMARY_1_START=0x00018000",
- "CY_BOOT_PRIMARY_1_SIZE=0x1C0000",
- "CY_BOOT_SECONDARY_1_START=0x00000000",
- "CY_BOOT_SECONDARY_1_SIZE=0x001C0000",
- "CY_FLASH_ERASE_VALUE=0xFF",
+ "COMPONENT_MCUBOOT",
+ "CY_BOOTLOADER=MCUBOOT",
+ "OTA_SUPPORT=1",
+ "COMPONENT_OTA_PSOC_062",
+ "PSOC_062_2M",
+ "OTA_USE_EXTERNAL_FLASH=1",
+ "ENABLE_OTA_LOGS",
+ "ENABLE_OTA_BOOTLOADER_ABSTRACTION_LOGS",
"MCUBOOT_IMAGE_NUMBER=1",
- "MCUBOOT_SLOT_SIZE=0x1C0000",
- "MCUBOOT_SCRATCH_SIZE=0x4000",
- "MCUBOOT_SECTOR_SIZE = 512",
+ "MCUBOOT_MAX_IMG_SECTORS=3584",
+ "FLASH_AREA_BOOTLOADER_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_BOOTLOADER_SIZE=0x028000",
+ "FLASH_AREA_BOOTLOADER_START=0x000000",
+ "FLASH_AREA_IMAGE_SCRATCH_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMAGE_SCRATCH_SIZE=0x080000",
+ "FLASH_AREA_IMAGE_SCRATCH_START=0x440000",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_SIZE=0x006c00",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_START=0x1e8000",
+ "FLASH_AREA_IMG_1_PRIMARY_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_PRIMARY_START=0x028000",
+ "FLASH_AREA_IMG_1_SECONDARY_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMG_1_SECONDARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_SECONDARY_START=0x000200",
"APP_VERSION_MAJOR=1",
"APP_VERSION_MINOR=0",
"APP_VERSION_BUILD=0",
- "MCUBOOT_OVERWRITE_ONLY",
- "CY_ENABLE_XIP_PROGRAM",
]
if (build_update_image) {
@@ -88,7 +94,7 @@ psoc6_sdk_sources("all_clusters_app_sdk_sources") {
defines = [
"BOARD_ID=${psoc6_board}",
- "P6_LOG_ENABLED=1",
+ "PSOC6_LOG_ENABLED=1",
"CHIP_DEVICE_CONFIG_USE_TEST_SETUP_PIN_CODE=${setup_pin_code}",
]
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/include/AppConfig.h b/examples/all-clusters-minimal-app/infineon/psoc6/include/AppConfig.h
index 35e45a8aef4223..cad1a523bfa188 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/include/AppConfig.h
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/include/AppConfig.h
@@ -48,14 +48,14 @@
#define THREAD_ACTIVE_POLLING_INTERVAL_MS 100
#define THREAD_INACTIVE_POLLING_INTERVAL_MS 1000
-// P6 Logging
+// PSOC6 Logging
#ifdef __cplusplus
extern "C" {
#endif
void appError(int err);
-void P6Log(const char * aFormat, ...);
-#define P6_LOG(...) P6Log(__VA_ARGS__)
+void PSOC6Log(const char * aFormat, ...);
+#define PSOC6_LOG(...) PSOC6Log(__VA_ARGS__)
#ifdef __cplusplus
}
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/include/AppTask.h b/examples/all-clusters-minimal-app/infineon/psoc6/include/AppTask.h
index b5102a153e25e1..82a9537df4b6cc 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/include/AppTask.h
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/include/AppTask.h
@@ -29,6 +29,10 @@
#include <ble/Ble.h>
#include <platform/CHIPDeviceLayer.h>
+extern "C" {
+#include "flash_map_backend.h"
+}
+
// Application-defined error codes in the CHIP_ERROR space.
#define APP_ERROR_EVENT_QUEUE_FAILED CHIP_APPLICATION_ERROR(0x01)
#define APP_ERROR_CREATE_TASK_FAILED CHIP_APPLICATION_ERROR(0x02)
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/include/CHIPProjectConfig.h b/examples/all-clusters-minimal-app/infineon/psoc6/include/CHIPProjectConfig.h
index a371e16de2d7c0..e072cc6f2c4c0f 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/include/CHIPProjectConfig.h
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/include/CHIPProjectConfig.h
@@ -42,10 +42,10 @@
#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_ID 0x8004
/* The ProductName attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "P6-CYW43012 Clusters Minimal"
+#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "PSOC6-CYW43012 Clusters Minimal"
/* The HardwareVersionString attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "P6-43012"
+#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "PSOC6-43012"
/* The HardwareVersion attribute of the Basic cluster. */
#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION 43012
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/src/AppTask.cpp b/examples/all-clusters-minimal-app/infineon/psoc6/src/AppTask.cpp
index ccc271dd7a2d06..169b2f88acb7ab 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/src/AppTask.cpp
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/src/AppTask.cpp
@@ -145,7 +145,7 @@ CHIP_ERROR AppTask::StartAppTask()
sAppEventQueue = xQueueCreateStatic(APP_EVENT_QUEUE_SIZE, sizeof(AppEvent), sAppEventQueueBuffer, &sAppEventQueueStruct);
if (sAppEventQueue == NULL)
{
- P6_LOG("Failed to allocate app event queue");
+ PSOC6_LOG("Failed to allocate app event queue");
appError(APP_ERROR_EVENT_QUEUE_FAILED);
}
// Start App task.
@@ -157,10 +157,10 @@ CHIP_ERROR AppTask::Init()
{
CHIP_ERROR err = CHIP_NO_ERROR;
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
- int rc = boot_set_confirmed();
+ int rc = flash_area_boot_set_confirmed();
if (rc != 0)
{
- P6_LOG("boot_set_confirmed failed");
+ PSOC6_LOG("flash_area_boot_set_confirmed failed");
appError(CHIP_ERROR_UNINITIALIZED);
}
#endif
@@ -193,11 +193,11 @@ CHIP_ERROR AppTask::Init()
);
if (sFunctionTimer == NULL)
{
- P6_LOG("funct timer create failed");
+ PSOC6_LOG("funct timer create failed");
appError(APP_ERROR_CREATE_TIMER_FAILED);
}
NetWorkCommissioningInstInit();
- P6_LOG("Current Software Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
// Initialize LEDs
sStatusLED.Init(SYSTEM_STATE_LED);
@@ -218,11 +218,11 @@ void AppTask::AppTaskMain(void * pvParameter)
CHIP_ERROR err = sAppTask.Init();
if (err != CHIP_NO_ERROR)
{
- P6_LOG("AppTask.Init() failed");
+ PSOC6_LOG("AppTask.Init() failed");
appError(err);
}
- P6_LOG("App Task started");
+ PSOC6_LOG("App Task started");
while (true)
{
@@ -298,7 +298,8 @@ void AppTask::FunctionHandler(AppEvent * event)
{
if (!sAppTask.mFunctionTimerActive && sAppTask.mFunction == Function::kNoneSelected)
{
- P6_LOG("Factory Reset Triggered. Press button again within %us to cancel.", FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
+ PSOC6_LOG("Factory Reset Triggered. Press button again within %us to cancel.",
+ FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
// Start timer for FACTORY_RESET_CANCEL_WINDOW_TIMEOUT to allow user to
// cancel, if required.
sAppTask.StartTimer(FACTORY_RESET_CANCEL_WINDOW_TIMEOUT);
@@ -322,7 +323,7 @@ void AppTask::FunctionHandler(AppEvent * event)
// canceled.
sAppTask.mFunction = Function::kNoneSelected;
- P6_LOG("Factory Reset has been Canceled");
+ PSOC6_LOG("Factory Reset has been Canceled");
}
}
}
@@ -331,7 +332,7 @@ void AppTask::CancelTimer()
{
if (xTimerStop(sFunctionTimer, 0) == pdFAIL)
{
- P6_LOG("app timer stop() failed");
+ PSOC6_LOG("app timer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
@@ -342,7 +343,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
{
if (xTimerIsTimerActive(sFunctionTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -351,7 +352,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sFunctionTimer, aTimeoutInMs / portTICK_PERIOD_MS, 100) != pdPASS)
{
- P6_LOG("app timer start() failed");
+ PSOC6_LOG("app timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
@@ -382,11 +383,11 @@ void AppTask::PostEvent(const AppEvent * aEvent)
}
if (!status)
- P6_LOG("Failed to post event to app task event queue");
+ PSOC6_LOG("Failed to post event to app task event queue");
}
else
{
- P6_LOG("Event Queue is NULL should never happen");
+ PSOC6_LOG("Event Queue is NULL should never happen");
}
}
@@ -398,7 +399,7 @@ void AppTask::DispatchEvent(AppEvent * aEvent)
}
else
{
- P6_LOG("Event received with no handler. Dropping event.");
+ PSOC6_LOG("Event received with no handler. Dropping event.");
}
}
@@ -411,7 +412,7 @@ void AppTask::OnOffUpdateClusterState(intptr_t context)
if (status != Protocols::InteractionModel::Status::Success)
{
- P6_LOG("ERR: updating on/off %x", to_underlying(status));
+ PSOC6_LOG("ERR: updating on/off %x", to_underlying(status));
}
}
@@ -432,7 +433,7 @@ void AppTask::InitOTARequestor()
gRequestorUser.Init(&gRequestorCore, &gImageProcessor);
- P6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
}
#endif
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/src/ButtonHandler.cpp b/examples/all-clusters-minimal-app/infineon/psoc6/src/ButtonHandler.cpp
index 7d65fc4134625e..3fbd1c13796fd1 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/src/ButtonHandler.cpp
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/src/ButtonHandler.cpp
@@ -102,7 +102,7 @@ void ButtonHandler::TimerCallback(TimerHandle_t xTimer)
buttonevent = cyhal_gpio_read(APP_FUNCTION_BUTTON);
break;
default:
- P6_LOG("Unhandled TimerID: %d", timerId);
+ PSOC6_LOG("Unhandled TimerID: %d", timerId);
break;
}
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/src/ClusterManager.cpp b/examples/all-clusters-minimal-app/infineon/psoc6/src/ClusterManager.cpp
index 38d009a53f8fc7..32428177bbd247 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/src/ClusterManager.cpp
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/src/ClusterManager.cpp
@@ -50,9 +50,9 @@ ClusterManager ClusterManager::sCluster;
void ClusterManager::OnOnOffPostAttributeChangeCallback(EndpointId endpointId, AttributeId attributeId, uint8_t * value)
{
VerifyOrExit(attributeId == OnOff::Attributes::OnOff::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
// At this point we can assume that value points to a bool value.
mEndpointOnOffState[endpointId - 1] = *value;
@@ -70,9 +70,9 @@ void ClusterManager::OnLevelControlAttributeChangeCallback(EndpointId endpointId
uint8_t brightness = onOffState ? *value : 0;
VerifyOrExit(attributeId == LevelControl::Attributes::CurrentLevel::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
endpointId == ENDPOINT_FIRST_IDX ? sClusterLED.SetBrightness(brightness) : sLightLED.SetBrightness(brightness);
@@ -85,9 +85,9 @@ void ClusterManager::OnColorControlAttributeChangeCallback(EndpointId endpointId
using namespace ColorControl::Attributes;
VerifyOrExit(attributeId == CurrentHue::Id || attributeId == CurrentSaturation::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX || endpointId == ENDPOINT_SECOND_IDX,
- P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
if (endpointId == 1)
{
uint8_t hue, saturation;
@@ -137,8 +137,8 @@ void IdentifyTimerHandler(Layer * systemLayer, void * appState)
void ClusterManager::OnIdentifyPostAttributeChangeCallback(EndpointId endpointId, AttributeId attributeId, uint8_t * value)
{
VerifyOrExit(attributeId == Identify::Attributes::IdentifyTime::Id,
- P6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
- VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX, P6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
+ PSOC6_LOG("Unhandled Attribute ID: '" ChipLogFormatMEI "'", ChipLogValueMEI(attributeId)));
+ VerifyOrExit(endpointId == ENDPOINT_FIRST_IDX, PSOC6_LOG("Unexpected EndPoint ID: `0x%02x'", endpointId));
/* IdentifyTime Attribute Spec mentions "flashing a light with a period of 0.5 seconds" */
sStatusLED.Blink(kIdentifyTimerDelayMS * 2);
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/src/ZclCallbacks.cpp b/examples/all-clusters-minimal-app/infineon/psoc6/src/ZclCallbacks.cpp
index 9a439771026736..2e805ac61367ee 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/src/ZclCallbacks.cpp
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/src/ZclCallbacks.cpp
@@ -39,9 +39,9 @@ void MatterPostAttributeChangeCallback(const chip::app::ConcreteAttributePath &
EndpointId endpoint = attributePath.mEndpointId;
ClusterId clusterId = attributePath.mClusterId;
AttributeId attributeId = attributePath.mAttributeId;
- P6_LOG("MatterPostAttributeChangeCallback - Cluster ID: " ChipLogFormatMEI
- ", EndPoint ID: '0x%02x', Attribute ID: " ChipLogFormatMEI,
- ChipLogValueMEI(clusterId), endpoint, ChipLogValueMEI(attributeId));
+ PSOC6_LOG("MatterPostAttributeChangeCallback - Cluster ID: " ChipLogFormatMEI
+ ", EndPoint ID: '0x%02x', Attribute ID: " ChipLogFormatMEI,
+ ChipLogValueMEI(clusterId), endpoint, ChipLogValueMEI(attributeId));
switch (clusterId)
{
@@ -61,7 +61,7 @@ void MatterPostAttributeChangeCallback(const chip::app::ConcreteAttributePath &
ClusterMgr().OnColorControlAttributeChangeCallback(endpoint, attributeId, value);
break;
default:
- P6_LOG("Unhandled cluster ID: " ChipLogFormatMEI, ChipLogValueMEI(clusterId));
+ PSOC6_LOG("Unhandled cluster ID: " ChipLogFormatMEI, ChipLogValueMEI(clusterId));
break;
}
}
diff --git a/examples/all-clusters-minimal-app/infineon/psoc6/src/main.cpp b/examples/all-clusters-minimal-app/infineon/psoc6/src/main.cpp
index 5ac891ae1816f2..72a10004f39a3a 100644
--- a/examples/all-clusters-minimal-app/infineon/psoc6/src/main.cpp
+++ b/examples/all-clusters-minimal-app/infineon/psoc6/src/main.cpp
@@ -57,7 +57,7 @@ static void main_task(void * pvParameters);
//=================================================================================
void appError(int err)
{
- P6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
+ PSOC6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
portDISABLE_INTERRUPTS();
while (true)
;
@@ -90,35 +90,35 @@ static void main_task(void * pvParameters)
CHIP_ERROR ret = chip::DeviceLayer::PersistedStorage::KeyValueStoreMgrImpl().Init();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
+ PSOC6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
appError(ret);
}
ret = PlatformMgr().InitChipStack();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().InitChipStack() failed");
+ PSOC6_LOG("PlatformMgr().InitChipStack() failed");
appError(ret);
}
- ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("P6_CLUSTERS");
+ ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("PSOC6_CLUSTERS");
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
+ PSOC6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
appError(ret);
}
- P6_LOG("Starting Platform Manager Event Loop");
+ PSOC6_LOG("Starting Platform Manager Event Loop");
ret = PlatformMgr().StartEventLoopTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().StartEventLoopTask() failed");
+ PSOC6_LOG("PlatformMgr().StartEventLoopTask() failed");
appError(ret);
}
ret = GetAppTask().StartAppTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("GetAppTask().Init() failed");
+ PSOC6_LOG("GetAppTask().Init() failed");
appError(ret);
}
@@ -131,7 +131,7 @@ static void main_task(void * pvParameters)
// ================================================================================
int main(void)
{
- init_p6Platform();
+ init_psoc6Platform();
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
// Clear watchdog timer (started by bootloader) so that it doesn't trigger a reset
cyhal_wdt_t wdt_obj;
@@ -142,9 +142,9 @@ int main(void)
MemMonitoring::startHeapMonitoring();
#endif
- P6_LOG("==================================================\r\n");
- P6_LOG("chip-p6-all-clusters-minimal-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("==================================================\r\n");
+ PSOC6_LOG("==================================================\r\n");
+ PSOC6_LOG("chip-psoc6-all-clusters-minimal-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("==================================================\r\n");
/* Start the FreeRTOS scheduler */
vTaskStartScheduler();
@@ -154,5 +154,5 @@ int main(void)
PlatformMgr().Shutdown();
// Should never get here.
- P6_LOG("vTaskStartScheduler() failed");
+ PSOC6_LOG("vTaskStartScheduler() failed");
}
diff --git a/examples/lighting-app/infineon/psoc6/BUILD.gn b/examples/lighting-app/infineon/psoc6/BUILD.gn
index 3bd75cc14d9e2c..8460cfef6dfec4 100644
--- a/examples/lighting-app/infineon/psoc6/BUILD.gn
+++ b/examples/lighting-app/infineon/psoc6/BUILD.gn
@@ -45,32 +45,38 @@ config("psoc6_ota_config") {
ldflags = [ "-T" + rebase_path(linker_script, root_build_dir) ]
- ldflags += [ "-Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,MCUBOOT_BOOTLOADER_SIZE=0x18000,--defsym,CY_BOOT_PRIMARY_1_SIZE=0x1C0000" ]
+ ldflags += [ "-Wl,--undefined=uxTopUsedPriority -Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,FLASH_AREA_IMG_1_PRIMARY_START=0x028000,--defsym,FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000" ]
defines = [
"P6_OTA",
- "OTA_SUPPORT ",
- "OTA_USE_EXTERNAL_FLASH",
- "CY_BOOT_USE_EXTERNAL_FLASH",
- "MCUBOOT_HEADER_SIZE=0x400",
- "MCUBOOT_MAX_IMG_SECTORS=3584",
- "CY_BOOT_SCRATCH_SIZE=0x00004000",
- "MCUBOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_PRIMARY_1_START=0x00018000",
- "CY_BOOT_PRIMARY_1_SIZE=0x1C0000",
- "CY_BOOT_SECONDARY_1_START=0x00000000",
- "CY_BOOT_SECONDARY_1_SIZE=0x001C0000",
- "CY_FLASH_ERASE_VALUE=0xFF",
+ "COMPONENT_MCUBOOT",
+ "CY_BOOTLOADER=MCUBOOT",
+ "OTA_SUPPORT=1",
+ "COMPONENT_OTA_PSOC_062",
+ "PSOC_062_2M",
+ "OTA_USE_EXTERNAL_FLASH=1",
+ "ENABLE_OTA_LOGS",
+ "ENABLE_OTA_BOOTLOADER_ABSTRACTION_LOGS",
"MCUBOOT_IMAGE_NUMBER=1",
- "MCUBOOT_SLOT_SIZE=0x1C0000",
- "MCUBOOT_SCRATCH_SIZE=0x4000",
- "MCUBOOT_SECTOR_SIZE = 512",
+ "MCUBOOT_MAX_IMG_SECTORS=3584",
+ "FLASH_AREA_BOOTLOADER_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_BOOTLOADER_SIZE=0x028000",
+ "FLASH_AREA_BOOTLOADER_START=0x000000",
+ "FLASH_AREA_IMAGE_SCRATCH_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMAGE_SCRATCH_SIZE=0x080000",
+ "FLASH_AREA_IMAGE_SCRATCH_START=0x440000",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_SIZE=0x006c00",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_START=0x1e8000",
+ "FLASH_AREA_IMG_1_PRIMARY_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_PRIMARY_START=0x028000",
+ "FLASH_AREA_IMG_1_SECONDARY_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMG_1_SECONDARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_SECONDARY_START=0x000200",
"APP_VERSION_MAJOR=1",
"APP_VERSION_MINOR=0",
"APP_VERSION_BUILD=0",
- "MCUBOOT_OVERWRITE_ONLY",
- "CY_ENABLE_XIP_PROGRAM",
]
if (build_update_image) {
@@ -87,7 +93,7 @@ psoc6_sdk_sources("lighting_app_sdk_sources") {
defines = [
"BOARD_ID=${psoc6_board}",
- "P6_LOG_ENABLED=1",
+ "PSOC6_LOG_ENABLED=1",
"CHIP_DEVICE_CONFIG_USE_TEST_SETUP_PIN_CODE=${setup_pin_code}",
]
diff --git a/examples/lighting-app/infineon/psoc6/include/AppConfig.h b/examples/lighting-app/infineon/psoc6/include/AppConfig.h
index 21b9e9467263fa..2fbc01038c0941 100644
--- a/examples/lighting-app/infineon/psoc6/include/AppConfig.h
+++ b/examples/lighting-app/infineon/psoc6/include/AppConfig.h
@@ -47,14 +47,14 @@
#define THREAD_ACTIVE_POLLING_INTERVAL_MS 100
#define THREAD_INACTIVE_POLLING_INTERVAL_MS 1000
-// P6 Logging
+// PSOC6 Logging
#ifdef __cplusplus
extern "C" {
#endif
void appError(int err);
-void P6Log(const char * aFormat, ...);
-#define P6_LOG(...) P6Log(__VA_ARGS__)
+void PSOC6Log(const char * aFormat, ...);
+#define PSOC6_LOG(...) PSOC6Log(__VA_ARGS__)
#ifdef __cplusplus
}
diff --git a/examples/lighting-app/infineon/psoc6/include/AppTask.h b/examples/lighting-app/infineon/psoc6/include/AppTask.h
index 4f6f77663d18a4..2259880efb5726 100644
--- a/examples/lighting-app/infineon/psoc6/include/AppTask.h
+++ b/examples/lighting-app/infineon/psoc6/include/AppTask.h
@@ -30,6 +30,10 @@
#include <ble/Ble.h>
#include <platform/CHIPDeviceLayer.h>
+extern "C" {
+#include "flash_map_backend.h"
+}
+
// Application-defined error codes in the CHIP_ERROR space.
#define APP_ERROR_EVENT_QUEUE_FAILED CHIP_APPLICATION_ERROR(0x01)
#define APP_ERROR_CREATE_TASK_FAILED CHIP_APPLICATION_ERROR(0x02)
diff --git a/examples/lighting-app/infineon/psoc6/include/CHIPProjectConfig.h b/examples/lighting-app/infineon/psoc6/include/CHIPProjectConfig.h
index ab00f26adecb76..15143de90103ca 100644
--- a/examples/lighting-app/infineon/psoc6/include/CHIPProjectConfig.h
+++ b/examples/lighting-app/infineon/psoc6/include/CHIPProjectConfig.h
@@ -41,10 +41,10 @@
#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_ID 0x8005
/* The ProductName attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "P6-CYW43012 Light"
+#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "PSOC6-CYW43012 Light"
/* The HardwareVersionString attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "P6-43012"
+#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "PSOC6-43012"
/* The HardwareVersion attribute of the Basic cluster. */
#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION 43012
diff --git a/examples/lighting-app/infineon/psoc6/src/AppTask.cpp b/examples/lighting-app/infineon/psoc6/src/AppTask.cpp
index 49e6278ab032c9..43a501ad7edb5c 100644
--- a/examples/lighting-app/infineon/psoc6/src/AppTask.cpp
+++ b/examples/lighting-app/infineon/psoc6/src/AppTask.cpp
@@ -160,7 +160,7 @@ CHIP_ERROR AppTask::StartAppTask()
sAppEventQueue = xQueueCreateStatic(APP_EVENT_QUEUE_SIZE, sizeof(AppEvent), sAppEventQueueBuffer, &sAppEventQueueStruct);
if (sAppEventQueue == NULL)
{
- P6_LOG("Failed to allocate app event queue");
+ PSOC6_LOG("Failed to allocate app event queue");
appError(APP_ERROR_EVENT_QUEUE_FAILED);
}
@@ -173,10 +173,10 @@ CHIP_ERROR AppTask::Init()
{
CHIP_ERROR err = CHIP_NO_ERROR;
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
- int rc = boot_set_confirmed();
+ int rc = flash_area_boot_set_confirmed();
if (rc != 0)
{
- P6_LOG("boot_set_confirmed failed");
+ PSOC6_LOG("flash_area_boot_set_confirmed failed");
appError(CHIP_ERROR_UNINITIALIZED);
}
#endif
@@ -209,15 +209,15 @@ CHIP_ERROR AppTask::Init()
);
if (sFunctionTimer == NULL)
{
- P6_LOG("funct timer create failed");
+ PSOC6_LOG("funct timer create failed");
appError(APP_ERROR_CREATE_TIMER_FAILED);
}
NetWorkCommissioningInstInit();
- P6_LOG("Current Firmware Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Firmware Version: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
err = LightMgr().Init();
if (err != CHIP_NO_ERROR)
{
- P6_LOG("LightMgr().Init() failed");
+ PSOC6_LOG("LightMgr().Init() failed");
appError(err);
}
@@ -243,11 +243,11 @@ void AppTask::AppTaskMain(void * pvParameter)
CHIP_ERROR err = sAppTask.Init();
if (err != CHIP_NO_ERROR)
{
- P6_LOG("AppTask.Init() failed");
+ PSOC6_LOG("AppTask.Init() failed");
appError(err);
}
- P6_LOG("App Task started");
+ PSOC6_LOG("App Task started");
while (true)
{
@@ -337,7 +337,7 @@ void AppTask::LightActionEventHandler(AppEvent * event)
if (!LightMgr().InitiateAction(actor, action))
{
- P6_LOG("Action is already in progress or active.");
+ PSOC6_LOG("Action is already in progress or active.");
}
}
@@ -395,7 +395,8 @@ void AppTask::FunctionHandler(AppEvent * event)
{
if (!sAppTask.mFunctionTimerActive && sAppTask.mFunction == Function::kNoneSelected)
{
- P6_LOG("Factory Reset Triggered. Press button again within %us to cancel.", FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
+ PSOC6_LOG("Factory Reset Triggered. Press button again within %us to cancel.",
+ FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
// Start timer for FACTORY_RESET_CANCEL_WINDOW_TIMEOUT to allow user to
// cancel, if required.
sAppTask.StartTimer(FACTORY_RESET_CANCEL_WINDOW_TIMEOUT);
@@ -421,7 +422,7 @@ void AppTask::FunctionHandler(AppEvent * event)
// canceled.
sAppTask.mFunction = Function::kNoneSelected;
- P6_LOG("Factory Reset has been Canceled");
+ PSOC6_LOG("Factory Reset has been Canceled");
}
}
}
@@ -430,7 +431,7 @@ void AppTask::CancelTimer()
{
if (xTimerStop(sFunctionTimer, 0) == pdFAIL)
{
- P6_LOG("app timer stop() failed");
+ PSOC6_LOG("app timer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
@@ -441,7 +442,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
{
if (xTimerIsTimerActive(sFunctionTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -450,7 +451,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sFunctionTimer, aTimeoutInMs / portTICK_PERIOD_MS, 100) != pdPASS)
{
- P6_LOG("app timer start() failed");
+ PSOC6_LOG("app timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
@@ -462,12 +463,12 @@ void AppTask::ActionInitiated(LightingManager::Action_t action, int32_t actor)
// Action initiated, update the light led
if (action == LightingManager::ON_ACTION)
{
- P6_LOG("Turning light ON");
+ PSOC6_LOG("Turning light ON");
sLightLED.Set(true);
}
else if (action == LightingManager::OFF_ACTION)
{
- P6_LOG("Turning light OFF");
+ PSOC6_LOG("Turning light OFF");
sLightLED.Set(false);
}
@@ -482,11 +483,11 @@ void AppTask::ActionCompleted(LightingManager::Action_t action)
// action has been completed bon the light
if (action == LightingManager::ON_ACTION)
{
- P6_LOG("Light ON");
+ PSOC6_LOG("Light ON");
}
else if (action == LightingManager::OFF_ACTION)
{
- P6_LOG("Light OFF");
+ PSOC6_LOG("Light OFF");
}
if (sAppTask.mSyncClusterToButtonAction)
@@ -530,11 +531,11 @@ void AppTask::PostEvent(const AppEvent * event)
}
if (!status)
- P6_LOG("Failed to post event to app task event queue");
+ PSOC6_LOG("Failed to post event to app task event queue");
}
else
{
- P6_LOG("Event Queue is NULL should never happen");
+ PSOC6_LOG("Event Queue is NULL should never happen");
}
}
@@ -546,7 +547,7 @@ void AppTask::DispatchEvent(AppEvent * event)
}
else
{
- P6_LOG("Event received with no handler. Dropping event.");
+ PSOC6_LOG("Event received with no handler. Dropping event.");
}
}
@@ -558,7 +559,7 @@ void AppTask::UpdateClusterState(intptr_t context)
Protocols::InteractionModel::Status status = app::Clusters::OnOff::Attributes::OnOff::Set(1, newValue);
if (status != Protocols::InteractionModel::Status::Success)
{
- P6_LOG("ERR: updating on/off %x", to_underlying(status));
+ PSOC6_LOG("ERR: updating on/off %x", to_underlying(status));
}
}
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
@@ -573,7 +574,7 @@ void AppTask::InitOTARequestor()
gRequestorUser.Init(&gRequestorCore, &gImageProcessor);
- P6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
}
#endif
diff --git a/examples/lighting-app/infineon/psoc6/src/LightingManager.cpp b/examples/lighting-app/infineon/psoc6/src/LightingManager.cpp
index b2db66900c8db6..5f0ffabb61915d 100644
--- a/examples/lighting-app/infineon/psoc6/src/LightingManager.cpp
+++ b/examples/lighting-app/infineon/psoc6/src/LightingManager.cpp
@@ -39,7 +39,7 @@ CHIP_ERROR LightingManager::Init()
if (sLightTimer == NULL)
{
- P6_LOG("sLockTimer timer create failed");
+ PSOC6_LOG("sLockTimer timer create failed");
return APP_ERROR_CREATE_TIMER_FAILED;
}
@@ -125,7 +125,7 @@ void LightingManager::StartTimer(uint32_t aTimeoutMs)
{
if (xTimerIsTimerActive(sLightTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -134,7 +134,7 @@ void LightingManager::StartTimer(uint32_t aTimeoutMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sLightTimer, (aTimeoutMs / portTICK_PERIOD_MS), 100) != pdPASS)
{
- P6_LOG("sLockTimer timer start() failed");
+ PSOC6_LOG("sLockTimer timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
}
@@ -143,7 +143,7 @@ void LightingManager::CancelTimer(void)
{
if (xTimerStop(sLightTimer, 0) == pdFAIL)
{
- P6_LOG("sLightTimer stop() failed");
+ PSOC6_LOG("sLightTimer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
}
@@ -183,7 +183,7 @@ void LightingManager::AutoTurnOffTimerEventHandler(AppEvent * aEvent)
light->mAutoTurnOffTimerArmed = false;
- P6_LOG("Auto Turn Off has been triggered!");
+ PSOC6_LOG("Auto Turn Off has been triggered!");
light->InitiateAction(actor, OFF_ACTION);
}
@@ -219,7 +219,7 @@ void LightingManager::ActuatorMovementTimerEventHandler(AppEvent * aEvent)
light->mAutoTurnOffTimerArmed = true;
- P6_LOG("Auto Turn off enabled. Will be triggered in %u seconds", light->mAutoTurnOffDuration);
+ PSOC6_LOG("Auto Turn off enabled. Will be triggered in %u seconds", light->mAutoTurnOffDuration);
}
}
}
diff --git a/examples/lighting-app/infineon/psoc6/src/main.cpp b/examples/lighting-app/infineon/psoc6/src/main.cpp
index 66ec9addd01aab..5997aa53e60a84 100644
--- a/examples/lighting-app/infineon/psoc6/src/main.cpp
+++ b/examples/lighting-app/infineon/psoc6/src/main.cpp
@@ -56,7 +56,7 @@ static void main_task(void * pvParameters);
//=================================================================================
void appError(int err)
{
- P6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
+ PSOC6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
portDISABLE_INTERRUPTS();
while (true)
;
@@ -89,35 +89,35 @@ static void main_task(void * pvParameters)
CHIP_ERROR ret = chip::DeviceLayer::PersistedStorage::KeyValueStoreMgrImpl().Init();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
+ PSOC6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
appError(ret);
}
ret = PlatformMgr().InitChipStack();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().InitChipStack() failed");
+ PSOC6_LOG("PlatformMgr().InitChipStack() failed");
appError(ret);
}
- ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("P6_LIGHT");
+ ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("PSOC6_LIGHT");
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
+ PSOC6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
appError(ret);
}
- P6_LOG("Starting Platform Manager Event Loop");
+ PSOC6_LOG("Starting Platform Manager Event Loop");
ret = PlatformMgr().StartEventLoopTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().StartEventLoopTask() failed");
+ PSOC6_LOG("PlatformMgr().StartEventLoopTask() failed");
appError(ret);
}
ret = GetAppTask().StartAppTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("GetAppTask().Init() failed");
+ PSOC6_LOG("GetAppTask().Init() failed");
appError(ret);
}
@@ -130,7 +130,7 @@ static void main_task(void * pvParameters)
// ================================================================================
int main(void)
{
- init_p6Platform();
+ init_psoc6Platform();
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
// Clear watchdog timer (started by bootloader) so that it doesn't trigger a reset
cyhal_wdt_t wdt_obj;
@@ -141,9 +141,9 @@ int main(void)
MemMonitoring::startHeapMonitoring();
#endif
- P6_LOG("==================================================\r\n");
- P6_LOG("chip-p6-lighting-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("==================================================\r\n");
+ PSOC6_LOG("==================================================\r\n");
+ PSOC6_LOG("chip-psoc6-lighting-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("==================================================\r\n");
/* Start the FreeRTOS scheduler */
vTaskStartScheduler();
@@ -153,5 +153,5 @@ int main(void)
PlatformMgr().Shutdown();
// Should never get here.
- P6_LOG("vTaskStartScheduler() failed");
+ PSOC6_LOG("vTaskStartScheduler() failed");
}
diff --git a/examples/lock-app/infineon/psoc6/BUILD.gn b/examples/lock-app/infineon/psoc6/BUILD.gn
index 37ee666f5190f5..3c9be12a5417e6 100644
--- a/examples/lock-app/infineon/psoc6/BUILD.gn
+++ b/examples/lock-app/infineon/psoc6/BUILD.gn
@@ -44,32 +44,38 @@ config("psoc6_ota_config") {
ldflags = [ "-T" + rebase_path(linker_script, root_build_dir) ]
- ldflags += [ "-Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,MCUBOOT_BOOTLOADER_SIZE=0x18000,--defsym,CY_BOOT_PRIMARY_1_SIZE=0x1C0000" ]
+ ldflags += [ "-Wl,--undefined=uxTopUsedPriority -Wl,--defsym,MCUBOOT_HEADER_SIZE=0x400,--defsym,FLASH_AREA_IMG_1_PRIMARY_START=0x028000,--defsym,FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000" ]
defines = [
"P6_OTA",
- "OTA_SUPPORT ",
- "OTA_USE_EXTERNAL_FLASH",
- "CY_BOOT_USE_EXTERNAL_FLASH",
- "MCUBOOT_HEADER_SIZE=0x400",
- "MCUBOOT_MAX_IMG_SECTORS=3584",
- "CY_BOOT_SCRATCH_SIZE=0x00004000",
- "MCUBOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_BOOTLOADER_SIZE=0x00018000",
- "CY_BOOT_PRIMARY_1_START=0x00018000",
- "CY_BOOT_PRIMARY_1_SIZE=0x1C0000",
- "CY_BOOT_SECONDARY_1_START=0x00000000",
- "CY_BOOT_SECONDARY_1_SIZE=0x001C0000",
- "CY_FLASH_ERASE_VALUE=0xFF",
+ "COMPONENT_MCUBOOT",
+ "CY_BOOTLOADER=MCUBOOT",
+ "OTA_SUPPORT=1",
+ "COMPONENT_OTA_PSOC_062",
+ "PSOC_062_2M",
+ "OTA_USE_EXTERNAL_FLASH=1",
+ "ENABLE_OTA_LOGS",
+ "ENABLE_OTA_BOOTLOADER_ABSTRACTION_LOGS",
"MCUBOOT_IMAGE_NUMBER=1",
- "MCUBOOT_SLOT_SIZE=0x1C0000",
- "MCUBOOT_SCRATCH_SIZE=0x4000",
- "MCUBOOT_SECTOR_SIZE = 512",
+ "MCUBOOT_MAX_IMG_SECTORS=3584",
+ "FLASH_AREA_BOOTLOADER_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_BOOTLOADER_SIZE=0x028000",
+ "FLASH_AREA_BOOTLOADER_START=0x000000",
+ "FLASH_AREA_IMAGE_SCRATCH_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMAGE_SCRATCH_SIZE=0x080000",
+ "FLASH_AREA_IMAGE_SCRATCH_START=0x440000",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_SIZE=0x006c00",
+ "FLASH_AREA_IMAGE_SWAP_STATUS_START=0x1e8000",
+ "FLASH_AREA_IMG_1_PRIMARY_DEV_ID='FLASH_DEVICE_INTERNAL_FLASH'",
+ "FLASH_AREA_IMG_1_PRIMARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_PRIMARY_START=0x028000",
+ "FLASH_AREA_IMG_1_SECONDARY_DEV_ID='FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX)'",
+ "FLASH_AREA_IMG_1_SECONDARY_SIZE=0x1c0000",
+ "FLASH_AREA_IMG_1_SECONDARY_START=0x000200",
"APP_VERSION_MAJOR=1",
"APP_VERSION_MINOR=0",
"APP_VERSION_BUILD=0",
- "MCUBOOT_OVERWRITE_ONLY",
- "CY_ENABLE_XIP_PROGRAM",
]
if (build_update_image) {
@@ -85,7 +91,7 @@ psoc6_sdk_sources("lock_app_sdk_sources") {
defines = [
"BOARD_ID=${psoc6_board}",
- "P6_LOG_ENABLED=1",
+ "PSOC6_LOG_ENABLED=1",
"CHIP_DEVICE_CONFIG_USE_TEST_SETUP_PIN_CODE=${setup_pin_code}",
]
diff --git a/examples/lock-app/infineon/psoc6/include/AppConfig.h b/examples/lock-app/infineon/psoc6/include/AppConfig.h
index 41ff70e1f94b71..34355aa262dde9 100644
--- a/examples/lock-app/infineon/psoc6/include/AppConfig.h
+++ b/examples/lock-app/infineon/psoc6/include/AppConfig.h
@@ -52,14 +52,14 @@
#define THREAD_ACTIVE_POLLING_INTERVAL_MS 100
#define THREAD_INACTIVE_POLLING_INTERVAL_MS 1000
-// P6 Logging
+// PSOC6 Logging
#ifdef __cplusplus
extern "C" {
#endif
void appError(int err);
-void P6Log(const char * aFormat, ...);
-#define P6_LOG(...) P6Log(__VA_ARGS__)
+void PSOC6Log(const char * aFormat, ...);
+#define PSOC6_LOG(...) PSOC6Log(__VA_ARGS__)
#ifdef __cplusplus
}
diff --git a/examples/lock-app/infineon/psoc6/include/AppTask.h b/examples/lock-app/infineon/psoc6/include/AppTask.h
index b120a9c9aec325..d72b1c32996269 100644
--- a/examples/lock-app/infineon/psoc6/include/AppTask.h
+++ b/examples/lock-app/infineon/psoc6/include/AppTask.h
@@ -30,6 +30,10 @@
#include <ble/Ble.h>
#include <platform/CHIPDeviceLayer.h>
+extern "C" {
+#include "flash_map_backend.h"
+}
+
// Application-defined error codes in the CHIP_ERROR space.
#define APP_ERROR_EVENT_QUEUE_FAILED CHIP_APPLICATION_ERROR(0x01)
#define APP_ERROR_CREATE_TASK_FAILED CHIP_APPLICATION_ERROR(0x02)
diff --git a/examples/lock-app/infineon/psoc6/include/CHIPProjectConfig.h b/examples/lock-app/infineon/psoc6/include/CHIPProjectConfig.h
index b069e13284c07d..e5c8c8ed7e790f 100644
--- a/examples/lock-app/infineon/psoc6/include/CHIPProjectConfig.h
+++ b/examples/lock-app/infineon/psoc6/include/CHIPProjectConfig.h
@@ -38,10 +38,10 @@
#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_ID 0x8006
/* The ProductName attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "P6-CYW43012 Lock"
+#define CHIP_DEVICE_CONFIG_DEVICE_PRODUCT_NAME "PSOC6-CYW43012 Lock"
/* The HardwareVersionString attribute of the Basic cluster. */
-#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "P6-43012"
+#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION_STRING "PSOC6-43012"
/* The HardwareVersion attribute of the Basic cluster. */
#define CHIP_DEVICE_CONFIG_DEFAULT_DEVICE_HARDWARE_VERSION 43012
diff --git a/examples/lock-app/infineon/psoc6/src/AppTask.cpp b/examples/lock-app/infineon/psoc6/src/AppTask.cpp
index 106da8eecbf69f..54178c21c98f65 100644
--- a/examples/lock-app/infineon/psoc6/src/AppTask.cpp
+++ b/examples/lock-app/infineon/psoc6/src/AppTask.cpp
@@ -179,7 +179,7 @@ CHIP_ERROR AppTask::StartAppTask()
sAppEventQueue = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(AppEvent));
if (sAppEventQueue == NULL)
{
- P6_LOG("Failed to allocate app event queue");
+ PSOC6_LOG("Failed to allocate app event queue");
appError(APP_ERROR_EVENT_QUEUE_FAILED);
}
@@ -193,7 +193,7 @@ void AppTask::lockMgr_Init()
CHIP_ERROR err = CHIP_NO_ERROR;
NetWorkCommissioningInstInit();
- P6_LOG("Current Software Version: %d", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("Current Software Version: %d", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
// Initial lock state
chip::app::DataModel::Nullable<chip::app::Clusters::DoorLock::DlLockState> state;
chip::EndpointId endpointId{ 1 };
@@ -258,7 +258,7 @@ void AppTask::lockMgr_Init()
.GetLockParam());
if (err != CHIP_NO_ERROR)
{
- P6_LOG("LockMgr().Init() failed");
+ PSOC6_LOG("LockMgr().Init() failed");
appError(err);
}
@@ -287,10 +287,10 @@ void AppTask::lockMgr_Init()
void AppTask::Init()
{
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
- int rc = boot_set_confirmed();
+ int rc = flash_area_boot_set_confirmed();
if (rc != 0)
{
- P6_LOG("boot_set_confirmed failed");
+ PSOC6_LOG("flash_area_boot_set_confirmed failed");
appError(CHIP_ERROR_UNINITIALIZED);
}
#endif
@@ -306,7 +306,7 @@ void AppTask::Init()
);
if (sFunctionTimer == NULL)
{
- P6_LOG("funct timer create failed");
+ PSOC6_LOG("funct timer create failed");
appError(APP_ERROR_CREATE_TIMER_FAILED);
}
@@ -333,7 +333,7 @@ void AppTask::AppTaskMain(void * pvParameter)
AppEvent event;
sAppTask.Init();
- P6_LOG("App Task started");
+ PSOC6_LOG("App Task started");
while (true)
{
@@ -403,11 +403,11 @@ void AppTask::LockActionEventHandler(AppEvent * event)
case AppEvent::kEventType_Button: {
- P6_LOG("%s [Action: %d]", __FUNCTION__, event->ButtonEvent.Action);
+ PSOC6_LOG("%s [Action: %d]", __FUNCTION__, event->ButtonEvent.Action);
if (event->ButtonEvent.Action == APP_BUTTON_LONG_PRESS)
{
- P6_LOG("Sending a lock jammed event");
+ PSOC6_LOG("Sending a lock jammed event");
/* Generating Door Lock Jammed event */
DoorLockServer::Instance().SendLockAlarmEvent(1 /* Endpoint Id */, AlarmCodeEnum::kLockJammed);
@@ -436,7 +436,7 @@ void AppTask::LockActionEventHandler(AppEvent * event)
if (!LockMgr().InitiateAction(actor, action))
{
- P6_LOG("Action is already in progress or active.");
+ PSOC6_LOG("Action is already in progress or active.");
}
}
@@ -499,7 +499,8 @@ void AppTask::FunctionHandler(AppEvent * event)
{
if (!sAppTask.mFunctionTimerActive && sAppTask.mFunction == Function::kNoneSelected)
{
- P6_LOG("Factory Reset Triggered. Press button again within %us to cancel.", FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
+ PSOC6_LOG("Factory Reset Triggered. Press button again within %us to cancel.",
+ FACTORY_RESET_CANCEL_WINDOW_TIMEOUT / 1000);
// Start timer for FACTORY_RESET_CANCEL_WINDOW_TIMEOUT to allow user to
// cancel, if required.
sAppTask.StartTimer(FACTORY_RESET_CANCEL_WINDOW_TIMEOUT);
@@ -525,7 +526,7 @@ void AppTask::FunctionHandler(AppEvent * event)
// canceled.
sAppTask.mFunction = Function::kNoneSelected;
- P6_LOG("Factory Reset has been Canceled");
+ PSOC6_LOG("Factory Reset has been Canceled");
}
}
}
@@ -534,7 +535,7 @@ void AppTask::CancelTimer()
{
if (xTimerStop(sFunctionTimer, 0) == pdFAIL)
{
- P6_LOG("app timer stop() failed");
+ PSOC6_LOG("app timer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
@@ -545,7 +546,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
{
if (xTimerIsTimerActive(sFunctionTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -554,7 +555,7 @@ void AppTask::StartTimer(uint32_t aTimeoutInMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sFunctionTimer, aTimeoutInMs / portTICK_PERIOD_MS, 100) != pdPASS)
{
- P6_LOG("app timer start() failed");
+ PSOC6_LOG("app timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
@@ -567,11 +568,11 @@ void AppTask::ActionInitiated(LockManager::Action_t aAction, int32_t aActor)
// and start flashing the LEDs rapidly to indicate action initiation.
if (aAction == LockManager::LOCK_ACTION)
{
- P6_LOG("Lock Action has been initiated");
+ PSOC6_LOG("Lock Action has been initiated");
}
else if (aAction == LockManager::UNLOCK_ACTION)
{
- P6_LOG("Unlock Action has been initiated");
+ PSOC6_LOG("Unlock Action has been initiated");
}
if (aActor == AppEvent::kEventType_Button)
@@ -589,13 +590,13 @@ void AppTask::ActionCompleted(LockManager::Action_t aAction)
// Turn off the lock LED if in an UNLOCKED state.
if (aAction == LockManager::LOCK_ACTION)
{
- P6_LOG("Lock Action has been completed");
+ PSOC6_LOG("Lock Action has been completed");
sLockLED.Set(true);
}
else if (aAction == LockManager::UNLOCK_ACTION)
{
- P6_LOG("Unlock Action has been completed");
+ PSOC6_LOG("Unlock Action has been completed");
sLockLED.Set(false);
}
@@ -641,11 +642,11 @@ void AppTask::PostEvent(const AppEvent * event)
}
if (!status)
- P6_LOG("Failed to post event to app task event queue");
+ PSOC6_LOG("Failed to post event to app task event queue");
}
else
{
- P6_LOG("Event Queue is NULL should never happen");
+ PSOC6_LOG("Event Queue is NULL should never happen");
}
}
@@ -657,7 +658,7 @@ void AppTask::DispatchEvent(AppEvent * event)
}
else
{
- P6_LOG("Event received with no handler. Dropping event.");
+ PSOC6_LOG("Event received with no handler. Dropping event.");
}
}
@@ -674,7 +675,7 @@ void AppTask::UpdateCluster(intptr_t context)
: Protocols::InteractionModel::Status::Failure;
if (status != Protocols::InteractionModel::Status::Success)
{
- P6_LOG("ERR: updating lock state %x", to_underlying(status));
+ PSOC6_LOG("ERR: updating lock state %x", to_underlying(status));
}
}
@@ -705,7 +706,7 @@ void AppTask::InitOTARequestor()
gRequestorUser.Init(&gRequestorCore, &gImageProcessor);
- P6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
+ PSOC6_LOG("Current Software Version: %u", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("Current Software Version String: %s", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION_STRING);
}
#endif
diff --git a/examples/lock-app/infineon/psoc6/src/LockManager.cpp b/examples/lock-app/infineon/psoc6/src/LockManager.cpp
index 4fed23346571dc..70af147902c8a6 100644
--- a/examples/lock-app/infineon/psoc6/src/LockManager.cpp
+++ b/examples/lock-app/infineon/psoc6/src/LockManager.cpp
@@ -25,7 +25,7 @@
#include <app-common/zap-generated/attributes/Accessors.h>
#include <cstring>
#include <lib/support/logging/CHIPLogging.h>
-#include <platform/Infineon/PSOC6/P6Config.h>
+#include <platform/Infineon/PSOC6/PSOC6Config.h>
LockManager LockManager::sLock;
@@ -90,7 +90,7 @@ CHIP_ERROR LockManager::Init(chip::app::DataModel::Nullable<chip::app::Clusters:
if (sLockTimer == NULL)
{
- P6_LOG("sLockTimer timer create failed");
+ PSOC6_LOG("sLockTimer timer create failed");
return APP_ERROR_CREATE_TIMER_FAILED;
}
@@ -141,33 +141,33 @@ bool LockManager::IsValidHolidayScheduleIndex(uint8_t scheduleIndex)
bool LockManager::ReadConfigValues()
{
size_t outLen;
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_LockUser, reinterpret_cast<uint8_t *>(&mLockUsers),
- sizeof(EmberAfPluginDoorLockUserInfo) * ArraySize(mLockUsers), outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_LockUser, reinterpret_cast<uint8_t *>(&mLockUsers),
+ sizeof(EmberAfPluginDoorLockUserInfo) * ArraySize(mLockUsers), outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_Credential, reinterpret_cast<uint8_t *>(&mLockCredentials),
- sizeof(EmberAfPluginDoorLockCredentialInfo) * kMaxCredentials * kNumCredentialTypes, outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_Credential, reinterpret_cast<uint8_t *>(&mLockCredentials),
+ sizeof(EmberAfPluginDoorLockCredentialInfo) * kMaxCredentials * kNumCredentialTypes, outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_LockUserName, reinterpret_cast<uint8_t *>(mUserNames), sizeof(mUserNames),
- outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_LockUserName, reinterpret_cast<uint8_t *>(mUserNames),
+ sizeof(mUserNames), outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_CredentialData, reinterpret_cast<uint8_t *>(mCredentialData),
- sizeof(mCredentialData), outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_CredentialData, reinterpret_cast<uint8_t *>(mCredentialData),
+ sizeof(mCredentialData), outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_UserCredentials, reinterpret_cast<uint8_t *>(mCredentials),
- sizeof(CredentialStruct) * LockParams.numberOfUsers * kMaxCredentials, outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_UserCredentials, reinterpret_cast<uint8_t *>(mCredentials),
+ sizeof(CredentialStruct) * LockParams.numberOfUsers * kMaxCredentials, outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_WeekDaySchedules, reinterpret_cast<uint8_t *>(mWeekdaySchedule),
- sizeof(EmberAfPluginDoorLockWeekDaySchedule) * LockParams.numberOfWeekdaySchedulesPerUser *
- LockParams.numberOfUsers,
- outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_WeekDaySchedules, reinterpret_cast<uint8_t *>(mWeekdaySchedule),
+ sizeof(EmberAfPluginDoorLockWeekDaySchedule) * LockParams.numberOfWeekdaySchedulesPerUser *
+ LockParams.numberOfUsers,
+ outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_YearDaySchedules, reinterpret_cast<uint8_t *>(mYeardaySchedule),
- sizeof(EmberAfPluginDoorLockYearDaySchedule) * LockParams.numberOfYeardaySchedulesPerUser *
- LockParams.numberOfUsers,
- outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_YearDaySchedules, reinterpret_cast<uint8_t *>(mYeardaySchedule),
+ sizeof(EmberAfPluginDoorLockYearDaySchedule) * LockParams.numberOfYeardaySchedulesPerUser *
+ LockParams.numberOfUsers,
+ outLen);
- P6Config::ReadConfigValueBin(P6Config::kConfigKey_HolidaySchedules, reinterpret_cast<uint8_t *>(&(mHolidaySchedule)),
- sizeof(EmberAfPluginDoorLockHolidaySchedule) * LockParams.numberOfHolidaySchedules, outLen);
+ PSOC6Config::ReadConfigValueBin(PSOC6Config::kConfigKey_HolidaySchedules, reinterpret_cast<uint8_t *>(&(mHolidaySchedule)),
+ sizeof(EmberAfPluginDoorLockHolidaySchedule) * LockParams.numberOfHolidaySchedules, outLen);
return true;
}
@@ -228,7 +228,7 @@ void LockManager::StartTimer(uint32_t aTimeoutMs)
{
if (xTimerIsTimerActive(sLockTimer))
{
- P6_LOG("app timer already started!");
+ PSOC6_LOG("app timer already started!");
CancelTimer();
}
@@ -237,7 +237,7 @@ void LockManager::StartTimer(uint32_t aTimeoutMs)
// cannot immediately be sent to the timer command queue.
if (xTimerChangePeriod(sLockTimer, (aTimeoutMs / portTICK_PERIOD_MS), 100) != pdPASS)
{
- P6_LOG("sLockTimer timer start() failed");
+ PSOC6_LOG("sLockTimer timer start() failed");
appError(APP_ERROR_START_TIMER_FAILED);
}
}
@@ -246,7 +246,7 @@ void LockManager::CancelTimer(void)
{
if (xTimerStop(sLockTimer, 0) == pdFAIL)
{
- P6_LOG("sLockTimer stop() failed");
+ PSOC6_LOG("sLockTimer stop() failed");
appError(APP_ERROR_STOP_TIMER_FAILED);
}
}
@@ -393,14 +393,14 @@ bool LockManager::SetUser(chip::EndpointId endpointId, uint16_t userIndex, chip:
userInStorage.credentials = chip::Span<const CredentialStruct>(mCredentials[userIndex], totalCredentials);
// Save user information in NVM flash
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_LockUser, reinterpret_cast<const uint8_t *>(&mLockUsers),
- sizeof(EmberAfPluginDoorLockUserInfo) * LockParams.numberOfUsers);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_LockUser, reinterpret_cast<const uint8_t *>(&mLockUsers),
+ sizeof(EmberAfPluginDoorLockUserInfo) * LockParams.numberOfUsers);
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_UserCredentials, reinterpret_cast<const uint8_t *>(mCredentials),
- sizeof(CredentialStruct) * LockParams.numberOfUsers * kMaxCredentials);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_UserCredentials, reinterpret_cast<const uint8_t *>(mCredentials),
+ sizeof(CredentialStruct) * LockParams.numberOfUsers * kMaxCredentials);
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_LockUserName, reinterpret_cast<const uint8_t *>(mUserNames),
- sizeof(mUserNames));
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_LockUserName, reinterpret_cast<const uint8_t *>(mUserNames),
+ sizeof(mUserNames));
ChipLogProgress(Zcl, "Successfully set the user [mEndpointId=%d,index=%d]", endpointId, userIndex);
@@ -481,11 +481,11 @@ bool LockManager::SetCredential(chip::EndpointId endpointId, uint16_t credential
chip::ByteSpan{ mCredentialData[to_underlying(credentialType)][credentialIndex], credentialData.size() };
// Save credential information in NVM flash
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_Credential, reinterpret_cast<const uint8_t *>(&mLockCredentials),
- sizeof(EmberAfPluginDoorLockCredentialInfo) * kMaxCredentials * kNumCredentialTypes);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_Credential, reinterpret_cast<const uint8_t *>(&mLockCredentials),
+ sizeof(EmberAfPluginDoorLockCredentialInfo) * kMaxCredentials * kNumCredentialTypes);
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_CredentialData, reinterpret_cast<const uint8_t *>(&mCredentialData),
- sizeof(mCredentialData));
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_CredentialData, reinterpret_cast<const uint8_t *>(&mCredentialData),
+ sizeof(mCredentialData));
ChipLogProgress(Zcl, "Successfully set the credential [credentialType=%u]", to_underlying(credentialType));
@@ -540,9 +540,9 @@ DlStatus LockManager::SetWeekdaySchedule(chip::EndpointId endpointId, uint8_t we
scheduleInStorage.status = status;
// Save schedule information in NVM flash
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_WeekDaySchedules, reinterpret_cast<const uint8_t *>(mWeekdaySchedule),
- sizeof(EmberAfPluginDoorLockWeekDaySchedule) * LockParams.numberOfWeekdaySchedulesPerUser *
- LockParams.numberOfUsers);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_WeekDaySchedules, reinterpret_cast<const uint8_t *>(mWeekdaySchedule),
+ sizeof(EmberAfPluginDoorLockWeekDaySchedule) * LockParams.numberOfWeekdaySchedulesPerUser *
+ LockParams.numberOfUsers);
return DlStatus::kSuccess;
}
@@ -589,9 +589,9 @@ DlStatus LockManager::SetYeardaySchedule(chip::EndpointId endpointId, uint8_t ye
scheduleInStorage.status = status;
// Save schedule information in NVM flash
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_YearDaySchedules, reinterpret_cast<const uint8_t *>(mYeardaySchedule),
- sizeof(EmberAfPluginDoorLockYearDaySchedule) * LockParams.numberOfYeardaySchedulesPerUser *
- LockParams.numberOfUsers);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_YearDaySchedules, reinterpret_cast<const uint8_t *>(mYeardaySchedule),
+ sizeof(EmberAfPluginDoorLockYearDaySchedule) * LockParams.numberOfYeardaySchedulesPerUser *
+ LockParams.numberOfUsers);
return DlStatus::kSuccess;
}
@@ -633,8 +633,9 @@ DlStatus LockManager::SetHolidaySchedule(chip::EndpointId endpointId, uint8_t ho
scheduleInStorage.status = status;
// Save schedule information in NVM flash
- P6Config::WriteConfigValueBin(P6Config::kConfigKey_HolidaySchedules, reinterpret_cast<const uint8_t *>(&(mHolidaySchedule)),
- sizeof(EmberAfPluginDoorLockHolidaySchedule) * LockParams.numberOfHolidaySchedules);
+ PSOC6Config::WriteConfigValueBin(PSOC6Config::kConfigKey_HolidaySchedules,
+ reinterpret_cast<const uint8_t *>(&(mHolidaySchedule)),
+ sizeof(EmberAfPluginDoorLockHolidaySchedule) * LockParams.numberOfHolidaySchedules);
return DlStatus::kSuccess;
}
diff --git a/examples/lock-app/infineon/psoc6/src/main.cpp b/examples/lock-app/infineon/psoc6/src/main.cpp
index b14487e4bfe425..701b6eb04368b2 100644
--- a/examples/lock-app/infineon/psoc6/src/main.cpp
+++ b/examples/lock-app/infineon/psoc6/src/main.cpp
@@ -53,7 +53,7 @@ static void main_task(void * pvParameters);
//=================================================================================
void appError(int err)
{
- P6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
+ PSOC6_LOG("!!!!!!!!!!!! App Critical Error: %d !!!!!!!!!!!", err);
portDISABLE_INTERRUPTS();
while (true)
;
@@ -86,35 +86,35 @@ static void main_task(void * pvParameters)
CHIP_ERROR ret = chip::DeviceLayer::PersistedStorage::KeyValueStoreMgrImpl().Init();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
+ PSOC6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
appError(ret);
}
ret = PlatformMgr().InitChipStack();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().InitChipStack() failed");
+ PSOC6_LOG("PlatformMgr().InitChipStack() failed");
appError(ret);
}
- ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("P6_LOCK");
+ ret = chip::DeviceLayer::ConnectivityMgr().SetBLEDeviceName("PSOC6_LOCK");
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
+ PSOC6_LOG("ConnectivityMgr().SetBLEDeviceName() failed");
appError(ret);
}
- P6_LOG("Starting Platform Manager Event Loop");
+ PSOC6_LOG("Starting Platform Manager Event Loop");
ret = PlatformMgr().StartEventLoopTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("PlatformMgr().StartEventLoopTask() failed");
+ PSOC6_LOG("PlatformMgr().StartEventLoopTask() failed");
appError(ret);
}
ret = GetAppTask().StartAppTask();
if (ret != CHIP_NO_ERROR)
{
- P6_LOG("GetAppTask().Init() failed");
+ PSOC6_LOG("GetAppTask().Init() failed");
appError(ret);
}
@@ -127,7 +127,7 @@ static void main_task(void * pvParameters)
// ================================================================================
int main(void)
{
- init_p6Platform();
+ init_psoc6Platform();
#if CHIP_DEVICE_CONFIG_ENABLE_OTA_REQUESTOR
// Clear watchdog timer (started by bootloader) so that it doesn't trigger a reset
cyhal_wdt_t wdt_obj;
@@ -135,9 +135,9 @@ int main(void)
cyhal_wdt_free(&wdt_obj);
#endif
- P6_LOG("==================================================\r\n");
- P6_LOG("chip-p6-lock-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
- P6_LOG("==================================================\r\n");
+ PSOC6_LOG("==================================================\r\n");
+ PSOC6_LOG("chip-psoc6-lock-example starting Version %d\r\n", CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
+ PSOC6_LOG("==================================================\r\n");
/* Start the FreeRTOS scheduler */
vTaskStartScheduler();
@@ -147,5 +147,5 @@ int main(void)
PlatformMgr().Shutdown();
// Should never get here.
- P6_LOG("vTaskStartScheduler() failed");
+ PSOC6_LOG("vTaskStartScheduler() failed");
}
diff --git a/examples/persistent-storage/infineon/psoc6/BUILD.gn b/examples/persistent-storage/infineon/psoc6/BUILD.gn
index 6c1b536280e60b..16f9da400fb021 100644
--- a/examples/persistent-storage/infineon/psoc6/BUILD.gn
+++ b/examples/persistent-storage/infineon/psoc6/BUILD.gn
@@ -39,7 +39,7 @@ psoc6_sdk_sources("persistent_storage_app_sdk_sources") {
defines = [
"BOARD_ID=${psoc6_board}",
- "P6_LOG_ENABLED=1",
+ "PSOC6_LOG_ENABLED=1",
]
sources = [ "${psoc6_project_dir}/include/CHIPProjectConfig.h" ]
diff --git a/examples/persistent-storage/infineon/psoc6/include/AppConfig.h b/examples/persistent-storage/infineon/psoc6/include/AppConfig.h
index 4c4efaefa09e8c..e86a19d98eda81 100644
--- a/examples/persistent-storage/infineon/psoc6/include/AppConfig.h
+++ b/examples/persistent-storage/infineon/psoc6/include/AppConfig.h
@@ -19,14 +19,14 @@
#pragma once
-// P6 Logging
+// PSOC6 Logging
#ifdef __cplusplus
extern "C" {
#endif
void appError(int err);
-void P6Log(const char * aFormat, ...);
-#define P6_LOG(...) P6Log(__VA_ARGS__)
+void PSOC6Log(const char * aFormat, ...);
+#define PSOC6_LOG(...) PSOC6Log(__VA_ARGS__)
#ifdef __cplusplus
}
diff --git a/examples/persistent-storage/infineon/psoc6/main.cpp b/examples/persistent-storage/infineon/psoc6/main.cpp
index f5acd2c5e74318..c1eec3efc2acc4 100644
--- a/examples/persistent-storage/infineon/psoc6/main.cpp
+++ b/examples/persistent-storage/infineon/psoc6/main.cpp
@@ -33,12 +33,12 @@ void TestTask(void * pvParameter)
err = chip::DeviceLayer::PersistedStorage::KeyValueStoreMgrImpl().Init();
if (err != CHIP_NO_ERROR)
{
- P6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
+ PSOC6_LOG("PersistedStorage::KeyValueStoreMgrImpl().Init() failed");
return;
}
while (true)
{
- P6_LOG("Running Tests:");
+ PSOC6_LOG("Running Tests:");
chip::RunKvsTest();
vTaskDelay(60000); // Run every minute
}
@@ -55,17 +55,17 @@ extern "C" void vApplicationDaemonTaskStartupHook()
int main(int argc, char * argv[])
{
- init_p6Platform();
+ init_psoc6Platform();
- P6_LOG("=============================================\n");
- P6_LOG("chip-p6-persistent-storage-example starting\n");
- P6_LOG("=============================================\n");
+ PSOC6_LOG("=============================================\n");
+ PSOC6_LOG("chip-psoc6-persistent-storage-example starting\n");
+ PSOC6_LOG("=============================================\n");
- P6_LOG("Starting FreeRTOS scheduler");
+ PSOC6_LOG("Starting FreeRTOS scheduler");
vTaskStartScheduler();
// Should never get here.
- P6_LOG("vTaskStartScheduler() failed");
+ PSOC6_LOG("vTaskStartScheduler() failed");
return -1;
}
diff --git a/examples/platform/infineon/psoc6/init_psoc6Platform.cpp b/examples/platform/infineon/psoc6/init_psoc6Platform.cpp
index 85c8ae5ffa6092..1b236bf73c9ef0 100644
--- a/examples/platform/infineon/psoc6/init_psoc6Platform.cpp
+++ b/examples/platform/infineon/psoc6/init_psoc6Platform.cpp
@@ -47,7 +47,7 @@
#include <cybsp.h>
#include <cyhal.h>
-void init_p6Platform(void)
+void init_psoc6Platform(void)
{
/* Initialize the board support package */
cybsp_init();
diff --git a/examples/platform/infineon/psoc6/init_psoc6Platform.h b/examples/platform/infineon/psoc6/init_psoc6Platform.h
index 68ab7df04cc03e..8b4c075731bec0 100644
--- a/examples/platform/infineon/psoc6/init_psoc6Platform.h
+++ b/examples/platform/infineon/psoc6/init_psoc6Platform.h
@@ -18,4 +18,4 @@
/*******************************************************************************/
#pragma once
-void init_p6Platform(void);
+void init_psoc6Platform(void);
diff --git a/scripts/examples/gn_psoc6_example.sh b/scripts/examples/gn_psoc6_example.sh
index 04f47e6b2f0b5a..e3ae875b8e27a4 100755
--- a/scripts/examples/gn_psoc6_example.sh
+++ b/scripts/examples/gn_psoc6_example.sh
@@ -17,7 +17,7 @@
#
set -e
-# Build script for GN P6 examples GitHub workflow.
+# Build script for GN PSOC6 examples GitHub workflow.
source "$(dirname "$0")/../../scripts/activate.sh"
# Install required software
diff --git a/scripts/flashing/psoc6_firmware_utils.py b/scripts/flashing/psoc6_firmware_utils.py
index aeef78030a1d74..3e3639b49d3f47 100755
--- a/scripts/flashing/psoc6_firmware_utils.py
+++ b/scripts/flashing/psoc6_firmware_utils.py
@@ -1,5 +1,5 @@
#!/usr/bin/env python3
-# Copyright (c) 2021 Project CHIP Authors
+# Copyright (c) 2024 Project CHIP Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -42,38 +42,24 @@
--skip_reset, --skip-reset
Do not reset device after flashing
"""
-
+import os
+import platform as plt
+import subprocess
import sys
-from shutil import which
import firmware_utils
# Additional options that can be use to configure an `Flasher`
# object (as dictionary keys) and/or passed as command line options.
-P6_OPTIONS = {
+PSOC6_OPTIONS = {
# Configuration options define properties used in flashing operations.
'configuration': {
- 'make': {
- 'help': 'File name of the make executable',
+ 'openocd': {
+ 'help': 'File name of the hex image',
'default': None,
'argparse': {
'metavar': 'FILE',
},
- 'command': [
- "make",
- "-C",
- {'option': 'sdk_path'},
- ['TARGET={device}'],
- ['CY_OPENOCD_PROGRAM_IMG=../../../../{application}'],
- {'option': 'mtb_target'}
- ],
- 'verify': ['{make}', '--version'],
- 'error':
- """\
- Unable to execute {make}.
-
- Please ensure that make is installed.
- """,
},
'device': {
'help': 'Device family or platform to target',
@@ -94,31 +80,100 @@
},
}
+# Global variables
+FW_LOADER = "fw-loader"
+KIT_PROG_STR = "KitProg3 CMSIS-DAP"
+
+# General utility functions
+
+
+def _get_board_serial_number(tools_path):
+ """Obtains the MCU serial number"""
+ board_ser_num = None
+ # if system is windows, add the .exe extension
+ exe = FW_LOADER + (".exe" if plt.system() == "Windows" else "")
+ fw_loader_exe = os.path.join(tools_path, FW_LOADER, "bin", exe)
+ try:
+ # runs fw-loader --device-list to get the connected device info
+ output = subprocess.run([fw_loader_exe, "--device-list"], check=True, capture_output=True).stdout.decode().split("\n")
+ except subprocess.SubprocessError:
+ # Do not error here, during matter build this code is interpreted by the python wrapper
+ # If a device is not connected in the build stage it will complain and generate an error
+ return None
+ for line in output:
+ # look for a line like: Info: Connected - KitProg3 CMSIS-DAP BULK-0F03131601051400
+ if KIT_PROG_STR in line:
+ board_ser_num = line.split("-")[-1].strip()
+ break
+ if board_ser_num is None:
+ raise Exception("Could not detect CMSIS DAP device.")
+ return board_ser_num
+
+
+def _find_tools_path():
+ """Obtains the path to the latest ModusToolbox tools package"""
+ tools_version = ""
+ tools_path = os.environ.get("CY_TOOLS_PATHS", None)
+ # If `CY_TOOLS_PATHS` env variable is set, return that value
+ if tools_path is not None:
+ return tools_path
+ path_to_search = "/Applications/ModusToolbox/" if plt.system() == "Darwin" else os.path.join(os.path.expanduser("~"), "ModusToolbox")
+ if not os.path.exists(path_to_search):
+ raise Exception(
+ "Could not find ModusToolbox installation. Please install ModusToolbox and export CY_TOOLS_PATHS=<path to MTB tools_x.y>")
+ dirs = os.listdir(path_to_search)
+ for directory in dirs:
+ # find the latest version of ModusToolbox that is installed
+ if directory.startswith("tools_"):
+ if directory > tools_version:
+ tools_version = directory
+ return os.path.join(path_to_search, tools_version)
+
class Flasher(firmware_utils.Flasher):
"""Manage PSoC6 flashing."""
def __init__(self, **options):
super().__init__(platform='PSOC6', module=__name__, **options)
- self.define_options(P6_OPTIONS)
+ self.define_options(PSOC6_OPTIONS)
- def erase(self):
+ def verify(self, image):
raise NotImplementedError()
- def verify(self, image):
+ def reset(self):
raise NotImplementedError()
+ def erase(self):
+ tools_path = _find_tools_path()
+ open_ocd_dir = os.path.join(tools_path, "openocd", "bin", "openocd")
+ return self.run_tool(
+ 'openocd',
+ [
+ "-s", f"{open_ocd_dir}/scripts",
+ "-c", "source [find interface/kitprog3.cfg]",
+ "-c", "source [find target/psoc6_2m.cfg]",
+ "-c", "init; reset init",
+ "-c", "flash erase_sector 0 0 last; shutdown",
+ ],
+ name='Erase device')
+
def flash(self, image):
"""Flash image."""
+ tools_path = _find_tools_path()
+ ser_num = _get_board_serial_number(tools_path)
+ open_ocd_dir = os.path.join(tools_path, "openocd", "bin", "openocd")
return self.run_tool(
- 'make',
- [],
- options={"mtb_target": "qprogram", "application": image},
+ 'openocd',
+ [
+ "-s", f"{open_ocd_dir}/scripts",
+ "-c", "source [find interface/kitprog3.cfg]",
+ "-c", "source [find target/psoc6_2m.cfg]",
+ "-c", f"adapter serial {ser_num}",
+ "-c", "init; reset init",
+ "-c", f"program {image} verify reset exit",
+ ],
name='Flash')
- def reset(self):
- raise NotImplementedError()
-
def actions(self):
"""Perform actions on the device according to self.option."""
self.log(3, 'Options:', self.option)
@@ -126,26 +181,27 @@ def actions(self):
if self.option.erase:
if self.erase().err:
return self
-
- if self.option.application:
+ elif self.option.reset:
+ if self.reset().err:
+ return self
+ elif self.option.application:
application = self.option.application
if self.flash(application).err:
return self
if self.option.verify_application:
if self.verify(application).err:
return self
-
- if self.option.reset:
- if self.reset().err:
- return self
-
return self
def locate_tool(self, tool):
- if tool == "make":
- return which("make")
- else:
- return tool
+ """Gets the path to infineon shipped openocd asset"""
+ tools_path = _find_tools_path()
+ if tools_path is None:
+ raise Exception(
+ "CY_TOOLS_PATHS environment variable is not set. Please set it to the location of your ModusToolbox tools directory.")
+ if tool != "openocd":
+ raise Exception(f"Tool '{tool}' is not supported for flashing PSoC6. Please use openocd.")
+ return os.path.join(tools_path, "openocd", "bin", "openocd")
if __name__ == '__main__':
diff --git a/scripts/tools/memory/platform/p6.cfg b/scripts/tools/memory/platform/psoc6.cfg
similarity index 76%
rename from scripts/tools/memory/platform/p6.cfg
rename to scripts/tools/memory/platform/psoc6.cfg
index 7b6184d378e4f6..ea67d5c7e2f622 100644
--- a/scripts/tools/memory/platform/p6.cfg
+++ b/scripts/tools/memory/platform/psoc6.cfg
@@ -12,7 +12,7 @@
# See the License for the specific language governing permissions and
# limitations under the License.
-# Memory tools default configuation for Infineon P6.
+# Memory tools default configuation for Infineon PSOC6.
{
'section': {
@@ -30,17 +30,13 @@
# 'end': [],
# }
# },
- 'region': {
- # Regions are sets of sections that can be used for aggregate reports.
- 'sections': {
- 'FLASH': [
- '.text',
- '.rodata',
- ],
- 'RAM': [
- '.bss',
- '.data',
- ],
- }
- },
+# 'region': {
+# # Regions are sets of sections that can be used for aggregate reports.
+# 'sections': {
+# 'FLASH': [
+# ],
+# 'RAM': [
+# ]
+# }
+# },
}
diff --git a/src/platform/Infineon/PSOC6/BUILD.gn b/src/platform/Infineon/PSOC6/BUILD.gn
index bc048a31d3a9b7..3fd150eeeaae13 100644
--- a/src/platform/Infineon/PSOC6/BUILD.gn
+++ b/src/platform/Infineon/PSOC6/BUILD.gn
@@ -48,10 +48,10 @@ static_library("PSOC6") {
"NetworkCommissioningWiFiDriver.cpp",
"OTAImageProcessorImpl.cpp",
"OTAImageProcessorImpl.h",
- "P6Config.cpp",
- "P6Config.h",
- "P6Utils.cpp",
- "P6Utils.h",
+ "PSOC6Config.cpp",
+ "PSOC6Config.h",
+ "PSOC6Utils.cpp",
+ "PSOC6Utils.h",
"PlatformManagerImpl.cpp",
"PlatformManagerImpl.h",
"SystemPlatformConfig.h",
diff --git a/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.cpp b/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.cpp
index 67ed7f1d8eab4b..220caf0bdddc2f 100644
--- a/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.cpp
+++ b/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.cpp
@@ -28,7 +28,7 @@
#include <platform/internal/GenericConfigurationManagerImpl.ipp>
#include <platform/ConfigurationManager.h>
-#include <platform/Infineon/PSOC6/P6Config.h>
+#include <platform/Infineon/PSOC6/PSOC6Config.h>
#include <platform/KeyValueStoreManager.h>
namespace chip {
@@ -48,13 +48,13 @@ CHIP_ERROR ConfigurationManagerImpl::Init()
uint32_t rebootCount;
// Save out software version on first boot
- if (!P6Config::ConfigValueExists(P6Config::kConfigKey_SoftwareVersion))
+ if (!PSOC6Config::ConfigValueExists(PSOC6Config::kConfigKey_SoftwareVersion))
{
err = StoreSoftwareVersion(CHIP_DEVICE_CONFIG_DEVICE_SOFTWARE_VERSION);
SuccessOrExit(err);
}
- if (P6Config::ConfigValueExists(P6Config::kCounterKey_RebootCount))
+ if (PSOC6Config::ConfigValueExists(PSOC6Config::kCounterKey_RebootCount))
{
err = GetRebootCount(rebootCount);
SuccessOrExit(err);
@@ -69,14 +69,14 @@ CHIP_ERROR ConfigurationManagerImpl::Init()
SuccessOrExit(err);
}
- if (!P6Config::ConfigValueExists(P6Config::kCounterKey_TotalOperationalHours))
+ if (!PSOC6Config::ConfigValueExists(PSOC6Config::kCounterKey_TotalOperationalHours))
{
err = StoreTotalOperationalHours(0);
SuccessOrExit(err);
}
// Initialize the generic implementation base class.
- err = Internal::GenericConfigurationManagerImpl<P6Config>::Init();
+ err = Internal::GenericConfigurationManagerImpl<PSOC6Config>::Init();
VerifyOrReturnError(CHIP_NO_ERROR == err, err);
exit:
@@ -85,32 +85,32 @@ CHIP_ERROR ConfigurationManagerImpl::Init()
CHIP_ERROR ConfigurationManagerImpl::GetRebootCount(uint32_t & rebootCount)
{
- return ReadConfigValue(P6Config::kCounterKey_RebootCount, rebootCount);
+ return ReadConfigValue(PSOC6Config::kCounterKey_RebootCount, rebootCount);
}
CHIP_ERROR ConfigurationManagerImpl::StoreRebootCount(uint32_t rebootCount)
{
- return WriteConfigValue(P6Config::kCounterKey_RebootCount, rebootCount);
+ return WriteConfigValue(PSOC6Config::kCounterKey_RebootCount, rebootCount);
}
CHIP_ERROR ConfigurationManagerImpl::GetSoftwareVersion(uint32_t & softwareVer)
{
- return ReadConfigValue(P6Config::kConfigKey_SoftwareVersion, softwareVer);
+ return ReadConfigValue(PSOC6Config::kConfigKey_SoftwareVersion, softwareVer);
}
CHIP_ERROR ConfigurationManagerImpl::StoreSoftwareVersion(uint32_t softwareVer)
{
- return WriteConfigValue(P6Config::kConfigKey_SoftwareVersion, softwareVer);
+ return WriteConfigValue(PSOC6Config::kConfigKey_SoftwareVersion, softwareVer);
}
CHIP_ERROR ConfigurationManagerImpl::GetTotalOperationalHours(uint32_t & totalOperationalHours)
{
- return ReadConfigValue(P6Config::kCounterKey_TotalOperationalHours, totalOperationalHours);
+ return ReadConfigValue(PSOC6Config::kCounterKey_TotalOperationalHours, totalOperationalHours);
}
CHIP_ERROR ConfigurationManagerImpl::StoreTotalOperationalHours(uint32_t totalOperationalHours)
{
- return WriteConfigValue(P6Config::kCounterKey_TotalOperationalHours, totalOperationalHours);
+ return WriteConfigValue(PSOC6Config::kCounterKey_TotalOperationalHours, totalOperationalHours);
}
CHIP_ERROR ConfigurationManagerImpl::GetPrimaryWiFiMACAddress(uint8_t * buf)
@@ -163,62 +163,62 @@ CHIP_ERROR ConfigurationManagerImpl::WritePersistedStorageValue(::chip::Platform
CHIP_ERROR ConfigurationManagerImpl::ReadConfigValue(Key key, bool & val)
{
- return P6Config::ReadConfigValue(key, val);
+ return PSOC6Config::ReadConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::ReadConfigValue(Key key, uint32_t & val)
{
- return P6Config::ReadConfigValue(key, val);
+ return PSOC6Config::ReadConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::ReadConfigValue(Key key, uint64_t & val)
{
- return P6Config::ReadConfigValue(key, val);
+ return PSOC6Config::ReadConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::ReadConfigValueStr(Key key, char * buf, size_t bufSize, size_t & outLen)
{
- return P6Config::ReadConfigValueStr(key, buf, bufSize, outLen);
+ return PSOC6Config::ReadConfigValueStr(key, buf, bufSize, outLen);
}
CHIP_ERROR ConfigurationManagerImpl::ReadConfigValueBin(Key key, uint8_t * buf, size_t bufSize, size_t & outLen)
{
- return P6Config::ReadConfigValueBin(key, buf, bufSize, outLen);
+ return PSOC6Config::ReadConfigValueBin(key, buf, bufSize, outLen);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValue(Key key, bool val)
{
- return P6Config::WriteConfigValue(key, val);
+ return PSOC6Config::WriteConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValue(Key key, uint32_t val)
{
- return P6Config::WriteConfigValue(key, val);
+ return PSOC6Config::WriteConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValue(Key key, uint64_t val)
{
- return P6Config::WriteConfigValue(key, val);
+ return PSOC6Config::WriteConfigValue(key, val);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValueStr(Key key, const char * str)
{
- return P6Config::WriteConfigValueStr(key, str);
+ return PSOC6Config::WriteConfigValueStr(key, str);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValueStr(Key key, const char * str, size_t strLen)
{
- return P6Config::WriteConfigValueStr(key, str, strLen);
+ return PSOC6Config::WriteConfigValueStr(key, str, strLen);
}
CHIP_ERROR ConfigurationManagerImpl::WriteConfigValueBin(Key key, const uint8_t * data, size_t dataLen)
{
- return P6Config::WriteConfigValueBin(key, data, dataLen);
+ return PSOC6Config::WriteConfigValueBin(key, data, dataLen);
}
void ConfigurationManagerImpl::RunConfigUnitTest(void)
{
- P6Config::RunConfigUnitTest();
+ PSOC6Config::RunConfigUnitTest();
}
void ConfigurationManagerImpl::DoFactoryReset(intptr_t arg)
@@ -227,7 +227,7 @@ void ConfigurationManagerImpl::DoFactoryReset(intptr_t arg)
ChipLogProgress(DeviceLayer, "Performing factory reset");
- err = P6Config::FactoryResetConfig();
+ err = PSOC6Config::FactoryResetConfig();
if (err != CHIP_NO_ERROR)
{
ChipLogError(DeviceLayer, "FactoryResetConfig() failed: %s", ErrorStr(err));
diff --git a/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.h b/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.h
index 1327b3bc546214..4ad9fef2c55a92 100644
--- a/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.h
+++ b/src/platform/Infineon/PSOC6/ConfigurationManagerImpl.h
@@ -27,7 +27,7 @@
#include <platform/internal/GenericConfigurationManagerImpl.h>
-#include "P6Config.h"
+#include "PSOC6Config.h"
namespace chip {
namespace DeviceLayer {
@@ -35,7 +35,7 @@ namespace DeviceLayer {
/**
* Concrete implementation of the ConfigurationManager singleton object for the PSoC6 platform.
*/
-class ConfigurationManagerImpl : public Internal::GenericConfigurationManagerImpl<Internal::P6Config>
+class ConfigurationManagerImpl : public Internal::GenericConfigurationManagerImpl<Internal::PSOC6Config>
{
public:
CHIP_ERROR GetRebootCount(uint32_t & rebootCount) override;
diff --git a/src/platform/Infineon/PSOC6/ConnectivityManagerImpl.cpp b/src/platform/Infineon/PSOC6/ConnectivityManagerImpl.cpp
index b78f6fe757286b..a2f7fae9f32604 100644
--- a/src/platform/Infineon/PSOC6/ConnectivityManagerImpl.cpp
+++ b/src/platform/Infineon/PSOC6/ConnectivityManagerImpl.cpp
@@ -35,15 +35,17 @@
#include <lib/support/CodeUtils.h>
#include <lib/support/logging/CHIPLogging.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
#include <platform/internal/BLEManager.h>
+#include "cy_network_mw_core.h"
+#include "cy_nw_helper.h"
+
#include <lwip/dns.h>
#include <lwip/ip_addr.h>
#include <lwip/nd6.h>
#include <lwip/netif.h>
-#include "cy_network_mw_core.h"
#include "lwip/opt.h"
#include <platform/Infineon/PSOC6/NetworkCommissioningDriver.h>
#include <type_traits>
@@ -55,6 +57,7 @@
using namespace ::chip;
using namespace ::chip::Inet;
using namespace ::chip::System;
+using namespace ::chip::TLV;
namespace chip {
namespace DeviceLayer {
@@ -64,7 +67,7 @@ ConnectivityManagerImpl ConnectivityManagerImpl::sInstance;
ConnectivityManager::WiFiStationMode ConnectivityManagerImpl::_GetWiFiStationMode(void)
{
uint32_t curWiFiMode;
- mWiFiStationMode = (Internal::P6Utils::wifi_get_mode(curWiFiMode) == CHIP_NO_ERROR &&
+ mWiFiStationMode = (Internal::PSOC6Utils::wifi_get_mode(curWiFiMode) == CHIP_NO_ERROR &&
(curWiFiMode == WIFI_MODE_APSTA || curWiFiMode == WIFI_MODE_STA))
? kWiFiStationMode_Enabled
: kWiFiStationMode_Disabled;
@@ -103,7 +106,7 @@ bool ConnectivityManagerImpl::_IsWiFiStationEnabled(void)
bool ConnectivityManagerImpl::_IsWiFiStationProvisioned(void)
{
- return Internal::P6Utils::IsStationProvisioned();
+ return Internal::PSOC6Utils::IsStationProvisioned();
}
void ConnectivityManagerImpl::_ClearWiFiStationProvision(void)
@@ -113,7 +116,7 @@ void ConnectivityManagerImpl::_ClearWiFiStationProvision(void)
wifi_config_t stationConfig;
memset(&stationConfig, 0, sizeof(stationConfig));
- Internal::P6Utils::p6_wifi_set_config(WIFI_IF_STA, &stationConfig);
+ Internal::PSOC6Utils::p6_wifi_set_config(WIFI_IF_STA, &stationConfig);
DeviceLayer::SystemLayer().ScheduleWork(DriveStationState, NULL);
DeviceLayer::SystemLayer().ScheduleWork(DriveAPState, NULL);
@@ -210,8 +213,8 @@ CHIP_ERROR ConnectivityManagerImpl::_Init()
mWiFiAPIdleTimeout = System::Clock::Milliseconds32(CHIP_DEVICE_CONFIG_WIFI_AP_IDLE_TIMEOUT);
mFlags.SetRaw(0);
- // Ensure that P6 station mode is enabled.
- err = Internal::P6Utils::EnableStationMode();
+ // Ensure that PSOC6 station mode is enabled.
+ err = Internal::PSOC6Utils::EnableStationMode();
SuccessOrExit(err);
// If there is no persistent station provision...
if (!IsWiFiStationProvisioned())
@@ -230,7 +233,7 @@ CHIP_ERROR ConnectivityManagerImpl::_Init()
memcpy(wifiConfig.sta.password, CHIP_DEVICE_CONFIG_DEFAULT_STA_PASSWORD,
min(strlen(CHIP_DEVICE_CONFIG_DEFAULT_STA_PASSWORD), sizeof(wifiConfig.sta.password)));
wifiConfig.sta.security = CHIP_DEVICE_CONFIG_DEFAULT_STA_SECURITY;
- err = Internal::P6Utils::p6_wifi_set_config(WIFI_IF_STA, &wifiConfig);
+ err = Internal::PSOC6Utils::p6_wifi_set_config(WIFI_IF_STA, &wifiConfig);
SuccessOrExit(err);
// Enable WiFi station mode.
@@ -247,7 +250,7 @@ CHIP_ERROR ConnectivityManagerImpl::_Init()
ReturnErrorOnFailure(SetWiFiStationMode(kWiFiStationMode_Enabled));
}
// Force AP mode off for now.
- err = Internal::P6Utils::SetAPMode(false);
+ err = Internal::PSOC6Utils::SetAPMode(false);
SuccessOrExit(err);
// Queue work items to bootstrap the station state machines once the Chip event loop is running.
@@ -375,10 +378,10 @@ CHIP_ERROR ConnectivityManagerImpl::ConfigureWiFiAP()
wifiConfig.ap.ip_settings.gateway = ap_mode_ip_settings.gateway;
ChipLogProgress(DeviceLayer, "Configuring WiFi AP: SSID %s, channel %u", wifiConfig.ap.ssid, wifiConfig.ap.channel);
- err = Internal::P6Utils::p6_wifi_set_config(WIFI_IF_AP, &wifiConfig);
+ err = Internal::PSOC6Utils::p6_wifi_set_config(WIFI_IF_AP, &wifiConfig);
SuccessOrExit(err);
- err = Internal::P6Utils::p6_start_ap();
+ err = Internal::PSOC6Utils::p6_start_ap();
if (err != CHIP_NO_ERROR)
{
ChipLogError(DeviceLayer, "p6_start_ap failed: %s", chip::ErrorStr(err));
@@ -394,8 +397,8 @@ void ConnectivityManagerImpl::DriveAPState()
WiFiAPState targetState;
bool APModeEnabled;
- // Determine if AP mode is currently enabled in the P6 WiFi layer.
- err = Internal::P6Utils::IsAPEnabled(APModeEnabled);
+ // Determine if AP mode is currently enabled in the PSOC6 WiFi layer.
+ err = Internal::PSOC6Utils::IsAPEnabled(APModeEnabled);
SuccessOrExit(err);
// Adjust the Connectivity Manager's AP state to match the state in the WiFi layer.
@@ -470,13 +473,13 @@ void ConnectivityManagerImpl::DriveAPState()
{
// If the target state is 'Active' and the current state is NOT 'Activating', enable
// and configure the AP interface, and then enter the 'Activating' state. Eventually
- // a SYSTEM_EVENT_AP_START event will be received from the P6 WiFi layer which will
+ // a SYSTEM_EVENT_AP_START event will be received from the PSOC6 WiFi layer which will
// cause the state to transition to 'Active'.
if (targetState == kWiFiAPState_Active)
{
if (mWiFiAPState != kWiFiAPState_Active)
{
- err = Internal::P6Utils::SetAPMode(true);
+ err = Internal::PSOC6Utils::SetAPMode(true);
SuccessOrExit(err);
err = ConfigureWiFiAP();
SuccessOrExit(err);
@@ -491,9 +494,9 @@ void ConnectivityManagerImpl::DriveAPState()
{
if (mWiFiAPState != kWiFiAPState_Deactivating)
{
- err = Internal::P6Utils::SetAPMode(false);
+ err = Internal::PSOC6Utils::SetAPMode(false);
SuccessOrExit(err);
- err = Internal::P6Utils::p6_stop_ap();
+ err = Internal::PSOC6Utils::p6_stop_ap();
SuccessOrExit(err);
ChangeWiFiAPState(kWiFiAPState_Deactivating);
}
@@ -505,8 +508,8 @@ void ConnectivityManagerImpl::DriveAPState()
if (err != CHIP_NO_ERROR && mWiFiAPMode != kWiFiAPMode_ApplicationControlled)
{
SetWiFiAPMode(kWiFiAPMode_Disabled);
- Internal::P6Utils::SetAPMode(false);
- Internal::P6Utils::p6_stop_ap();
+ Internal::PSOC6Utils::SetAPMode(false);
+ Internal::PSOC6Utils::p6_stop_ap();
}
}
@@ -518,17 +521,17 @@ void ConnectivityManagerImpl::DriveStationState()
// If the station interface is NOT under application control...
if (mWiFiStationMode != kWiFiStationMode_ApplicationControlled)
{
- // Ensure that the P6 WiFi layer is started.
+ // Ensure that the PSOC6 WiFi layer is started.
err = WiFi_init();
SuccessOrExit(err);
- // Ensure that station mode is enabled in the P6 WiFi layer.
- err = Internal::P6Utils::EnableStationMode();
+ // Ensure that station mode is enabled in the PSOC6 WiFi layer.
+ err = Internal::PSOC6Utils::EnableStationMode();
SuccessOrExit(err);
}
- // Determine if the P6 WiFi layer thinks the station interface is currently connected.
- err = Internal::P6Utils::IsStationConnected(stationConnected);
+ // Determine if the PSOC6 WiFi layer thinks the station interface is currently connected.
+ err = Internal::PSOC6Utils::IsStationConnected(stationConnected);
SuccessOrExit(err);
// If the station interface is currently connected ...
if (stationConnected)
@@ -549,7 +552,7 @@ void ConnectivityManagerImpl::DriveStationState()
(mWiFiStationMode != kWiFiStationMode_Enabled || !IsWiFiStationProvisioned()))
{
ChipLogProgress(DeviceLayer, "Disconnecting WiFi station interface");
- err = Internal::P6Utils::p6_wifi_disconnect();
+ err = Internal::PSOC6Utils::p6_wifi_disconnect();
if (err != CHIP_NO_ERROR)
{
ChipLogError(DeviceLayer, "p6_wifi_disconnect() failed: %s", chip::ErrorStr(err));
@@ -593,7 +596,7 @@ void ConnectivityManagerImpl::DriveStationState()
{
ChangeWiFiStationState(kWiFiStationState_Connecting);
ChipLogProgress(DeviceLayer, "Attempting to connect WiFi station interface");
- err = Internal::P6Utils::p6_wifi_connect();
+ err = Internal::PSOC6Utils::p6_wifi_connect();
if (err != CHIP_NO_ERROR)
{
ChipLogError(DeviceLayer, "p6_wifi_connect() failed: %s", chip::ErrorStr(err));
@@ -632,7 +635,7 @@ void ConnectivityManagerImpl::UpdateInternetConnectivityState(void)
struct netif * net_interface = NULL;
IPAddress addr;
bool stationConnected;
- Internal::P6Utils::IsStationConnected(stationConnected);
+ Internal::PSOC6Utils::IsStationConnected(stationConnected);
ChipLogProgress(DeviceLayer, "UpdateInternetConnectivityState");
// If the WiFi station is currently in the connected state...
@@ -705,7 +708,7 @@ CHIP_ERROR ConnectivityManagerImpl::WiFi_init(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
- err = Internal::P6Utils::StartWiFiLayer();
+ err = Internal::PSOC6Utils::StartWiFiLayer();
SuccessOrExit(err);
/* Register event callback */
if (eventcallback == false)
@@ -726,7 +729,7 @@ CHIP_ERROR ConnectivityManagerImpl::WiFi_init(void)
CHIP_ERROR ConnectivityManagerImpl::ping_thread()
{
CHIP_ERROR err = CHIP_NO_ERROR;
- err = Internal::P6Utils::ping_init();
+ err = Internal::PSOC6Utils::ping_init();
return err;
}
diff --git a/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.cpp b/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.cpp
index b09fd83cecc5df..0abd1cba0dd5ad 100644
--- a/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.cpp
+++ b/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.cpp
@@ -1,6 +1,7 @@
/*
*
* Copyright (c) 2021-2022 Project CHIP Authors
+ * Copyright (c) 2024 Infineon Technologies, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
@@ -18,18 +19,19 @@
/**
* @file
* Provides an implementation of the DiagnosticDataProvider object
- * for P6 platform.
+ * for PSOC6 platform.
*/
#include <platform/internal/CHIPDeviceLayerInternal.h>
#include "cy_network_mw_core.h"
+#include "cy_nw_helper.h"
#include "cyhal_system.h"
#include <lib/support/CHIPMemString.h>
#include <lib/support/logging/CHIPLogging.h>
#include <platform/DiagnosticDataProvider.h>
#include <platform/Infineon/PSOC6/DiagnosticDataProviderImpl.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
namespace chip {
namespace DeviceLayer {
@@ -43,7 +45,7 @@ DiagnosticDataProviderImpl & DiagnosticDataProviderImpl::GetDefaultInstance()
CHIP_ERROR DiagnosticDataProviderImpl::GetCurrentHeapFree(uint64_t & currentHeapFree)
{
heap_info_t heap;
- Internal::P6Utils::heap_usage(&heap);
+ Internal::PSOC6Utils::heap_usage(&heap);
currentHeapFree = static_cast<uint64_t>(heap.HeapFree);
return CHIP_NO_ERROR;
}
@@ -52,7 +54,7 @@ CHIP_ERROR DiagnosticDataProviderImpl::GetCurrentHeapUsed(uint64_t & currentHeap
{
// Calculate the Heap used based on Total heap - Free heap
heap_info_t heap;
- Internal::P6Utils::heap_usage(&heap);
+ Internal::PSOC6Utils::heap_usage(&heap);
currentHeapUsed = static_cast<uint64_t>(heap.HeapUsed);
return CHIP_NO_ERROR;
}
@@ -60,7 +62,7 @@ CHIP_ERROR DiagnosticDataProviderImpl::GetCurrentHeapUsed(uint64_t & currentHeap
CHIP_ERROR DiagnosticDataProviderImpl::GetCurrentHeapHighWatermark(uint64_t & currentHeapHighWatermark)
{
heap_info_t heap;
- Internal::P6Utils::heap_usage(&heap);
+ Internal::PSOC6Utils::heap_usage(&heap);
currentHeapHighWatermark = static_cast<uint64_t>(heap.HeapMax);
return CHIP_NO_ERROR;
}
@@ -506,7 +508,7 @@ void DiagnosticDataProviderImpl::xtlv_buffer_parsing(const uint8_t * tlv_buf, ui
wl_cnt_ge40mcst_v1_t cnt_ge40;
/* parse the tlv buffer and populate the cnt and cnt_ge40 buffer with the counter values */
- Internal::P6Utils::unpack_xtlv_buf(tlv_buf, buflen, &cnt, &cnt_ge40);
+ Internal::PSOC6Utils::unpack_xtlv_buf(tlv_buf, buflen, &cnt, &cnt_ge40);
/* Read the counter based on the Counttype passed */
ReadCounters(Counttype, count, &cnt, &cnt_ge40);
@@ -571,17 +573,20 @@ CHIP_ERROR DiagnosticDataProviderImpl::GetThreadMetrics(ThreadMetrics ** threadM
{
ThreadMetrics * thread = (ThreadMetrics *) pvPortMalloc(sizeof(ThreadMetrics));
- Platform::CopyString(thread->NameBuf, taskStatusArray[x].pcTaskName);
- thread->name.Emplace(CharSpan::fromCharString(thread->NameBuf));
- thread->id = taskStatusArray[x].xTaskNumber;
+ if (thread != NULL)
+ {
+ Platform::CopyString(thread->NameBuf, taskStatusArray[x].pcTaskName);
+ thread->name.Emplace(CharSpan::fromCharString(thread->NameBuf));
+ thread->id = taskStatusArray[x].xTaskNumber;
- thread->stackFreeMinimum.Emplace(taskStatusArray[x].usStackHighWaterMark);
- /* Unsupported metrics */
- thread->stackSize.Emplace(0);
- thread->stackFreeCurrent.Emplace(0);
+ thread->stackFreeMinimum.Emplace(taskStatusArray[x].usStackHighWaterMark);
+ /* Unsupported metrics */
+ thread->stackSize.Emplace(0);
+ thread->stackFreeCurrent.Emplace(0);
- thread->Next = head;
- head = thread;
+ thread->Next = head;
+ head = thread;
+ }
}
*threadMetricsOut = head;
diff --git a/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.h b/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.h
index f3e625d787a9e5..2d02050a9ddb68 100644
--- a/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.h
+++ b/src/platform/Infineon/PSOC6/DiagnosticDataProviderImpl.h
@@ -31,7 +31,7 @@
#include "whd_wlioctl.h"
#include <cy_wcm.h>
#include <platform/DiagnosticDataProvider.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
#define PHYRATE_KPBS_BYTES_PER_SEC 125
diff --git a/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.cpp b/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.cpp
index e38d41e47fc61a..fe60d50a2823ae 100644
--- a/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.cpp
+++ b/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.cpp
@@ -18,7 +18,7 @@
/**
* @file
- * Platform-specific key value storage implementation for P6
+ * Platform-specific key value storage implementation for PSOC6
*/
#include "cy_result.h"
diff --git a/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.h b/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.h
index 62bead34c37033..5300d06d8ce014 100644
--- a/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.h
+++ b/src/platform/Infineon/PSOC6/KeyValueStoreManagerImpl.h
@@ -18,7 +18,7 @@
/**
* @file
- * Platform-specific key value storage implementation for P6.
+ * Platform-specific key value storage implementation for PSOC6.
*
*/
@@ -71,7 +71,7 @@ inline KeyValueStoreManager & KeyValueStoreMgr(void)
* Returns the platform-specific implementation of the KeyValueStoreManager singleton object.
*
* Chip applications can use this to gain access to features of the KeyValueStoreManager
- * that are specific to the P6 platform.
+ * that are specific to the PSOC6 platform.
*/
inline KeyValueStoreManagerImpl & KeyValueStoreMgrImpl(void)
{
diff --git a/src/platform/Infineon/PSOC6/Logging.cpp b/src/platform/Infineon/PSOC6/Logging.cpp
index ab6af699ac3a17..14d824f63229ec 100644
--- a/src/platform/Infineon/PSOC6/Logging.cpp
+++ b/src/platform/Infineon/PSOC6/Logging.cpp
@@ -25,7 +25,7 @@ namespace Platform {
*/
void LogV(const char * module, uint8_t category, const char * msg, va_list v)
{
-#if P6_LOG_ENABLED && _CHIP_USE_LOGGING
+#if PSOC6_LOG_ENABLED && _CHIP_USE_LOGGING
printf("CHIP:%s: ", module);
vprintf(msg, v);
printf("\n");
@@ -34,11 +34,11 @@ void LogV(const char * module, uint8_t category, const char * msg, va_list v)
#endif
}
-extern "C" void P6Log(const char * aFormat, ...)
+extern "C" void PSOC6Log(const char * aFormat, ...)
{
va_list v;
va_start(v, aFormat);
- LogV("P6", chip::Logging::kLogCategory_Progress, aFormat, v);
+ LogV("PSOC6", chip::Logging::kLogCategory_Progress, aFormat, v);
va_end(v);
}
diff --git a/src/platform/Infineon/PSOC6/NetworkCommissioningWiFiDriver.cpp b/src/platform/Infineon/PSOC6/NetworkCommissioningWiFiDriver.cpp
index 7fe0c1aaebb099..edeb39f588abf9 100644
--- a/src/platform/Infineon/PSOC6/NetworkCommissioningWiFiDriver.cpp
+++ b/src/platform/Infineon/PSOC6/NetworkCommissioningWiFiDriver.cpp
@@ -19,8 +19,8 @@
#include <lib/support/SafeInt.h>
#include <platform/CHIPDeviceLayer.h>
#include <platform/Infineon/PSOC6/NetworkCommissioningDriver.h>
-#include <platform/Infineon/PSOC6/P6Config.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Config.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
#include <limits>
#include <string>
@@ -140,11 +140,11 @@ CHIP_ERROR P6WiFiDriver::ConnectWiFiNetwork(const char * ssid, uint8_t ssidLen,
ReturnErrorOnFailure(ConnectivityMgr().SetWiFiStationMode(ConnectivityManager::kWiFiStationMode_Disabled));
// Set the wifi configuration
wifi_config_t wifi_config;
- chip::DeviceLayer::Internal::P6Utils::populate_wifi_config_t(
+ chip::DeviceLayer::Internal::PSOC6Utils::populate_wifi_config_t(
&wifi_config, WIFI_IF_STA, (const cy_wcm_ssid_t *) ssid, (const cy_wcm_passphrase_t *) key,
(keyLen) ? CHIP_DEVICE_CONFIG_DEFAULT_STA_SECURITY : CY_WCM_SECURITY_OPEN);
- err = chip::DeviceLayer::Internal::P6Utils::p6_wifi_set_config(WIFI_IF_STA, &wifi_config);
+ err = chip::DeviceLayer::Internal::PSOC6Utils::p6_wifi_set_config(WIFI_IF_STA, &wifi_config);
SuccessOrExit(err);
ReturnErrorOnFailure(ConnectivityMgr().SetWiFiStationMode(ConnectivityManager::kWiFiStationMode_Disabled));
@@ -173,7 +173,7 @@ void P6WiFiDriver::ConnectNetwork(ByteSpan networkId, ConnectCallback * callback
VerifyOrExit(NetworkMatch(mStagingNetwork, networkId), networkingStatus = Status::kNetworkIDNotFound);
VerifyOrExit(mpConnectCallback == nullptr, networkingStatus = Status::kUnknownError);
- ChipLogProgress(NetworkProvisioning, "P6 NetworkCommissioningDelegate: SSID: %s", mStagingNetwork.ssid);
+ ChipLogProgress(NetworkProvisioning, "PSOC6 NetworkCommissioningDelegate: SSID: %s", mStagingNetwork.ssid);
err = ConnectWiFiNetwork(reinterpret_cast<const char *>(mStagingNetwork.ssid), mStagingNetwork.ssidLen,
reinterpret_cast<const char *>(mStagingNetwork.credentials), mStagingNetwork.credentialsLen);
mpConnectCallback = callback;
@@ -353,7 +353,7 @@ void P6WiFiDriver::OnNetworkStatusChange()
{
Network configuredNetwork;
bool staEnabled = false, staConnected = false;
- VerifyOrReturn(P6Utils::IsStationEnabled(staEnabled) == CHIP_NO_ERROR);
+ VerifyOrReturn(PSOC6Utils::IsStationEnabled(staEnabled) == CHIP_NO_ERROR);
VerifyOrReturn(staEnabled && mpStatusChangeCallback != nullptr);
CHIP_ERROR err = GetConnectedNetwork(configuredNetwork);
if (err != CHIP_NO_ERROR)
@@ -361,7 +361,7 @@ void P6WiFiDriver::OnNetworkStatusChange()
ChipLogError(DeviceLayer, "Failed to get configured network when updating network status: %s", err.AsString());
return;
}
- VerifyOrReturn(P6Utils::IsStationConnected(staConnected) == CHIP_NO_ERROR);
+ VerifyOrReturn(PSOC6Utils::IsStationConnected(staConnected) == CHIP_NO_ERROR);
if (staConnected)
{
mpStatusChangeCallback->OnNetworkingStatusChange(
diff --git a/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.cpp b/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.cpp
index b1cf7001bd2d38..d47434a80d4fb0 100644
--- a/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.cpp
+++ b/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.cpp
@@ -20,7 +20,6 @@
#include <app/clusters/ota-requestor/OTADownloader.h>
#include <app/clusters/ota-requestor/OTARequestorInterface.h>
#include <lib/support/CodeUtils.h>
-#include <ota_serial_flash.h>
#include <platform/CHIPDeviceLayer.h>
using namespace ::chip::DeviceLayer::Internal;
@@ -153,7 +152,7 @@ void OTAImageProcessorImpl::HandlePrepareDownload(intptr_t context)
}
/* Initialize SMIF subsystem for OTA Image download */
- ota_smif_initialize();
+ cy_ota_mem_init();
// Open and erase secondary flash area to prepare
if (flash_area_open(FLASH_AREA_IMAGE_SECONDARY(0), &(imageProcessor->mFlashArea)) != 0)
@@ -187,7 +186,7 @@ void OTAImageProcessorImpl::HandleFinalize(intptr_t context)
flash_area_close(imageProcessor->mFlashArea);
ChipLogProgress(SoftwareUpdate, "Setting boot pending");
- int ret = boot_set_pending(0, 1);
+ int ret = flash_area_boot_set_pending(0, 1);
if (ret != 0)
{
diff --git a/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.h b/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.h
index e1ec3d50e9806c..3ac4f418008d40 100644
--- a/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.h
+++ b/src/platform/Infineon/PSOC6/OTAImageProcessorImpl.h
@@ -26,11 +26,10 @@
#ifdef P6_OTA
extern "C" {
-#include "bootutil/bootutil.h"
-#include "cy_flash_psoc6.h"
+#include "cy_ota_flash.h"
#include "flash_map_backend.h"
#include "flash_qspi.h"
-#include "sysflash/sysflash.h"
+#include "sysflash.h"
}
namespace chip {
diff --git a/src/platform/Infineon/PSOC6/P6Config.cpp b/src/platform/Infineon/PSOC6/PSOC6Config.cpp
similarity index 52%
rename from src/platform/Infineon/PSOC6/P6Config.cpp
rename to src/platform/Infineon/PSOC6/PSOC6Config.cpp
index 2ef8a5ed038476..1c040811686fa3 100644
--- a/src/platform/Infineon/PSOC6/P6Config.cpp
+++ b/src/platform/Infineon/PSOC6/PSOC6Config.cpp
@@ -20,21 +20,21 @@
/**
* @file
- * Utilities for interacting with the the P6 key-value store.
+ * Utilities for interacting with the the PSOC6 key-value store.
*/
/* this file behaves like a config.h, comes first */
#include <platform/internal/CHIPDeviceLayerInternal.h>
#include <platform/KeyValueStoreManager.h>
-#include <platform/Infineon/PSOC6/P6Config.h>
+#include <platform/Infineon/PSOC6/PSOC6Config.h>
#include <lib/core/CHIPEncoding.h>
#include <lib/support/CHIPMem.h>
#include <lib/support/CHIPMemString.h>
#include <lib/support/CodeUtils.h>
#include <lib/support/logging/CHIPLogging.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
namespace chip {
namespace DeviceLayer {
@@ -43,57 +43,57 @@ namespace Internal {
// *** CAUTION ***: Changing the names or namespaces of these values will *break* existing devices.
// Namespaces used to store device configuration information.
-const char P6Config::kConfigNamespace_ChipFactory[] = "chip-factory";
-const char P6Config::kConfigNamespace_ChipConfig[] = "chip-config";
-const char P6Config::kConfigNamespace_ChipCounters[] = "chip-counters";
+const char PSOC6Config::kConfigNamespace_ChipFactory[] = "chip-factory";
+const char PSOC6Config::kConfigNamespace_ChipConfig[] = "chip-config";
+const char PSOC6Config::kConfigNamespace_ChipCounters[] = "chip-counters";
// Keys stored in the chip-factory namespace
-const P6Config::Key P6Config::kConfigKey_SerialNum = { kConfigNamespace_ChipFactory, "serial-num" };
-const P6Config::Key P6Config::kConfigKey_MfrDeviceId = { kConfigNamespace_ChipFactory, "device-id" };
-const P6Config::Key P6Config::kConfigKey_MfrDeviceCert = { kConfigNamespace_ChipFactory, "device-cert" };
-const P6Config::Key P6Config::kConfigKey_MfrDeviceICACerts = { kConfigNamespace_ChipFactory, "device-ca-certs" };
-const P6Config::Key P6Config::kConfigKey_MfrDevicePrivateKey = { kConfigNamespace_ChipFactory, "device-key" };
-const P6Config::Key P6Config::kConfigKey_SoftwareVersion = { kConfigNamespace_ChipFactory, "software-ver" };
-const P6Config::Key P6Config::kConfigKey_HardwareVersion = { kConfigNamespace_ChipFactory, "hardware-ver" };
-const P6Config::Key P6Config::kConfigKey_ManufacturingDate = { kConfigNamespace_ChipFactory, "mfg-date" };
-const P6Config::Key P6Config::kConfigKey_SetupPinCode = { kConfigNamespace_ChipFactory, "pin-code" };
-const P6Config::Key P6Config::kConfigKey_SetupDiscriminator = { kConfigNamespace_ChipFactory, "discriminator" };
-const P6Config::Key P6Config::kConfigKey_Spake2pIterationCount = { kConfigNamespace_ChipFactory, "iteration-count" };
-const P6Config::Key P6Config::kConfigKey_Spake2pSalt = { kConfigNamespace_ChipFactory, "salt" };
-const P6Config::Key P6Config::kConfigKey_Spake2pVerifier = { kConfigNamespace_ChipFactory, "verifier" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_SerialNum = { kConfigNamespace_ChipFactory, "serial-num" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_MfrDeviceId = { kConfigNamespace_ChipFactory, "device-id" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_MfrDeviceCert = { kConfigNamespace_ChipFactory, "device-cert" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_MfrDeviceICACerts = { kConfigNamespace_ChipFactory, "device-ca-certs" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_MfrDevicePrivateKey = { kConfigNamespace_ChipFactory, "device-key" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_SoftwareVersion = { kConfigNamespace_ChipFactory, "software-ver" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_HardwareVersion = { kConfigNamespace_ChipFactory, "hardware-ver" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_ManufacturingDate = { kConfigNamespace_ChipFactory, "mfg-date" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_SetupPinCode = { kConfigNamespace_ChipFactory, "pin-code" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_SetupDiscriminator = { kConfigNamespace_ChipFactory, "discriminator" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_Spake2pIterationCount = { kConfigNamespace_ChipFactory, "iteration-count" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_Spake2pSalt = { kConfigNamespace_ChipFactory, "salt" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_Spake2pVerifier = { kConfigNamespace_ChipFactory, "verifier" };
// Keys stored in the chip-config namespace
-const P6Config::Key P6Config::kConfigKey_ServiceConfig = { kConfigNamespace_ChipConfig, "service-config" };
-const P6Config::Key P6Config::kConfigKey_PairedAccountId = { kConfigNamespace_ChipConfig, "account-id" };
-const P6Config::Key P6Config::kConfigKey_ServiceId = { kConfigNamespace_ChipConfig, "service-id" };
-const P6Config::Key P6Config::kConfigKey_LastUsedEpochKeyId = { kConfigNamespace_ChipConfig, "last-ek-id" };
-const P6Config::Key P6Config::kConfigKey_FailSafeArmed = { kConfigNamespace_ChipConfig, "fail-safe-armed" };
-const P6Config::Key P6Config::kConfigKey_WiFiStationSecType = { kConfigNamespace_ChipConfig, "sta-sec-type" };
-const P6Config::Key P6Config::kConfigKey_RegulatoryLocation = { kConfigNamespace_ChipConfig, "regulatory-location" };
-const P6Config::Key P6Config::kConfigKey_CountryCode = { kConfigNamespace_ChipConfig, "country-code" };
-const P6Config::Key P6Config::kConfigKey_WiFiSSID = { kConfigNamespace_ChipConfig, "wifi-ssid" };
-const P6Config::Key P6Config::kConfigKey_WiFiPassword = { kConfigNamespace_ChipConfig, "wifi-password" };
-const P6Config::Key P6Config::kConfigKey_WiFiSecurity = { kConfigNamespace_ChipConfig, "wifi-security" };
-const P6Config::Key P6Config::kConfigKey_WiFiMode = { kConfigNamespace_ChipConfig, "wifimode" };
-const P6Config::Key P6Config::kConfigKey_UniqueId = { kConfigNamespace_ChipConfig, "unique-id" };
-const P6Config::Key P6Config::kConfigKey_LockUser = { kConfigNamespace_ChipConfig, "lock-user" };
-const P6Config::Key P6Config::kConfigKey_Credential = { kConfigNamespace_ChipConfig, "credential" };
-const P6Config::Key P6Config::kConfigKey_LockUserName = { kConfigNamespace_ChipConfig, "lock-user-name" };
-const P6Config::Key P6Config::kConfigKey_CredentialData = { kConfigNamespace_ChipConfig, "credential-data" };
-const P6Config::Key P6Config::kConfigKey_UserCredentials = { kConfigNamespace_ChipConfig, "user-credentials" };
-const P6Config::Key P6Config::kConfigKey_WeekDaySchedules = { kConfigNamespace_ChipConfig, "weekday-schedules" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_ServiceConfig = { kConfigNamespace_ChipConfig, "service-config" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_PairedAccountId = { kConfigNamespace_ChipConfig, "account-id" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_ServiceId = { kConfigNamespace_ChipConfig, "service-id" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_LastUsedEpochKeyId = { kConfigNamespace_ChipConfig, "last-ek-id" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_FailSafeArmed = { kConfigNamespace_ChipConfig, "fail-safe-armed" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WiFiStationSecType = { kConfigNamespace_ChipConfig, "sta-sec-type" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_RegulatoryLocation = { kConfigNamespace_ChipConfig, "regulatory-location" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_CountryCode = { kConfigNamespace_ChipConfig, "country-code" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WiFiSSID = { kConfigNamespace_ChipConfig, "wifi-ssid" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WiFiPassword = { kConfigNamespace_ChipConfig, "wifi-password" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WiFiSecurity = { kConfigNamespace_ChipConfig, "wifi-security" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WiFiMode = { kConfigNamespace_ChipConfig, "wifimode" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_UniqueId = { kConfigNamespace_ChipConfig, "unique-id" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_LockUser = { kConfigNamespace_ChipConfig, "lock-user" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_Credential = { kConfigNamespace_ChipConfig, "credential" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_LockUserName = { kConfigNamespace_ChipConfig, "lock-user-name" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_CredentialData = { kConfigNamespace_ChipConfig, "credential-data" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_UserCredentials = { kConfigNamespace_ChipConfig, "user-credentials" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_WeekDaySchedules = { kConfigNamespace_ChipConfig, "weekday-schedules" };
;
-const P6Config::Key P6Config::kConfigKey_YearDaySchedules = { kConfigNamespace_ChipConfig, "yearday-schedules" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_YearDaySchedules = { kConfigNamespace_ChipConfig, "yearday-schedules" };
;
-const P6Config::Key P6Config::kConfigKey_HolidaySchedules = { kConfigNamespace_ChipConfig, "holiday-schedules" };
+const PSOC6Config::Key PSOC6Config::kConfigKey_HolidaySchedules = { kConfigNamespace_ChipConfig, "holiday-schedules" };
;
// Keys stored in the Chip-counters namespace
-const P6Config::Key P6Config::kCounterKey_RebootCount = { kConfigNamespace_ChipCounters, "reboot-count" };
-const P6Config::Key P6Config::kCounterKey_UpTime = { kConfigNamespace_ChipCounters, "up-time" };
-const P6Config::Key P6Config::kCounterKey_TotalOperationalHours = { kConfigNamespace_ChipCounters, "total-hours" };
+const PSOC6Config::Key PSOC6Config::kCounterKey_RebootCount = { kConfigNamespace_ChipCounters, "reboot-count" };
+const PSOC6Config::Key PSOC6Config::kCounterKey_UpTime = { kConfigNamespace_ChipCounters, "up-time" };
+const PSOC6Config::Key PSOC6Config::kCounterKey_TotalOperationalHours = { kConfigNamespace_ChipCounters, "total-hours" };
-CHIP_ERROR P6Config::ReadConfigValue(Key key, bool & val)
+CHIP_ERROR PSOC6Config::ReadConfigValue(Key key, bool & val)
{
bool in;
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
@@ -107,7 +107,7 @@ CHIP_ERROR P6Config::ReadConfigValue(Key key, bool & val)
return err;
}
-CHIP_ERROR P6Config::ReadConfigValue(Key key, uint32_t & val)
+CHIP_ERROR PSOC6Config::ReadConfigValue(Key key, uint32_t & val)
{
uint32_t in;
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
@@ -121,7 +121,7 @@ CHIP_ERROR P6Config::ReadConfigValue(Key key, uint32_t & val)
return err;
}
-CHIP_ERROR P6Config::ReadConfigValue(Key key, uint64_t & val)
+CHIP_ERROR PSOC6Config::ReadConfigValue(Key key, uint64_t & val)
{
uint64_t in;
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
@@ -135,7 +135,7 @@ CHIP_ERROR P6Config::ReadConfigValue(Key key, uint64_t & val)
return err;
}
-CHIP_ERROR P6Config::ReadConfigValueStr(Key key, char * buf, size_t bufSize, size_t & outLen)
+CHIP_ERROR PSOC6Config::ReadConfigValueStr(Key key, char * buf, size_t bufSize, size_t & outLen)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
@@ -147,7 +147,7 @@ CHIP_ERROR P6Config::ReadConfigValueStr(Key key, char * buf, size_t bufSize, siz
return err;
}
-CHIP_ERROR P6Config::ReadConfigValueBin(Key key, uint8_t * buf, size_t bufSize, size_t & outLen)
+CHIP_ERROR PSOC6Config::ReadConfigValueBin(Key key, uint8_t * buf, size_t bufSize, size_t & outLen)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
@@ -159,28 +159,28 @@ CHIP_ERROR P6Config::ReadConfigValueBin(Key key, uint8_t * buf, size_t bufSize,
return err;
}
-CHIP_ERROR P6Config::WriteConfigValue(Key key, bool val)
+CHIP_ERROR PSOC6Config::WriteConfigValue(Key key, bool val)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Put(key_str, static_cast<void *>(&val), sizeof(bool));
}
-CHIP_ERROR P6Config::WriteConfigValue(Key key, uint32_t val)
+CHIP_ERROR PSOC6Config::WriteConfigValue(Key key, uint32_t val)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Put(key_str, static_cast<void *>(&val), 4);
}
-CHIP_ERROR P6Config::WriteConfigValue(Key key, uint64_t val)
+CHIP_ERROR PSOC6Config::WriteConfigValue(Key key, uint64_t val)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Put(key_str, static_cast<void *>(&val), 8);
}
-CHIP_ERROR P6Config::WriteConfigValueStr(Key key, const char * str)
+CHIP_ERROR PSOC6Config::WriteConfigValueStr(Key key, const char * str)
{
size_t size = strlen(str) + 1;
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
@@ -188,27 +188,27 @@ CHIP_ERROR P6Config::WriteConfigValueStr(Key key, const char * str)
return PersistedStorage::KeyValueStoreMgr().Put(key_str, str, size);
}
-CHIP_ERROR P6Config::WriteConfigValueStr(Key key, const char * str, size_t strLen)
+CHIP_ERROR PSOC6Config::WriteConfigValueStr(Key key, const char * str, size_t strLen)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Put(key_str, str, strLen);
}
-CHIP_ERROR P6Config::WriteConfigValueBin(Key key, const uint8_t * data, size_t dataLen)
+CHIP_ERROR PSOC6Config::WriteConfigValueBin(Key key, const uint8_t * data, size_t dataLen)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Put(key_str, data, dataLen);
}
-CHIP_ERROR P6Config::ClearConfigValue(Key key)
+CHIP_ERROR PSOC6Config::ClearConfigValue(Key key)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
return PersistedStorage::KeyValueStoreMgr().Delete(key_str);
}
-bool P6Config::ConfigValueExists(Key key)
+bool PSOC6Config::ConfigValueExists(Key key)
{
char key_str[MTB_KVSTORE_MAX_KEY_SIZE] = { 0 };
key.to_str(key_str, MTB_KVSTORE_MAX_KEY_SIZE);
@@ -221,7 +221,7 @@ bool P6Config::ConfigValueExists(Key key)
}
// Clear out keys in config namespace
-CHIP_ERROR P6Config::FactoryResetConfig(void)
+CHIP_ERROR PSOC6Config::FactoryResetConfig(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
const Key * config_keys[] = { &kConfigKey_ServiceConfig, &kConfigKey_PairedAccountId, &kConfigKey_ServiceId,
@@ -249,7 +249,7 @@ CHIP_ERROR P6Config::FactoryResetConfig(void)
return CHIP_NO_ERROR;
}
-void P6Config::RunConfigUnitTest() {}
+void PSOC6Config::RunConfigUnitTest() {}
} // namespace Internal
} // namespace DeviceLayer
diff --git a/src/platform/Infineon/PSOC6/P6Config.h b/src/platform/Infineon/PSOC6/PSOC6Config.h
similarity index 93%
rename from src/platform/Infineon/PSOC6/P6Config.h
rename to src/platform/Infineon/PSOC6/PSOC6Config.h
index 7e62fd6e66b772..17fa896346c348 100644
--- a/src/platform/Infineon/PSOC6/P6Config.h
+++ b/src/platform/Infineon/PSOC6/PSOC6Config.h
@@ -20,7 +20,7 @@
/**
* @file
- * Utilities for interacting with the the P6 key-value store.
+ * Utilities for interacting with the the PSOC6 key-value store.
*/
#pragma once
@@ -35,12 +35,12 @@ namespace DeviceLayer {
namespace Internal {
/**
- * Provides functions and definitions for accessing device configuration information on the P6.
+ * Provides functions and definitions for accessing device configuration information on the PSOC6.
*
* This class is designed to be mixed-in to concrete implementation classes as a means to
* provide access to configuration information to generic base classes.
*/
-class P6Config
+class PSOC6Config
{
public:
struct Key;
@@ -114,7 +114,7 @@ class P6Config
static void RunConfigUnitTest(void);
};
-struct P6Config::Key
+struct PSOC6Config::Key
{
const char * Namespace;
const char * Name;
@@ -124,7 +124,7 @@ struct P6Config::Key
bool operator==(const Key & other) const;
};
-inline CHIP_ERROR P6Config::Key::to_str(char * buf, size_t buf_size) const
+inline CHIP_ERROR PSOC6Config::Key::to_str(char * buf, size_t buf_size) const
{
if (buf_size < len() + 1)
{
@@ -139,14 +139,14 @@ inline CHIP_ERROR P6Config::Key::to_str(char * buf, size_t buf_size) const
}
// Length of key str (not including terminating null char)
-inline size_t P6Config::Key::len() const
+inline size_t PSOC6Config::Key::len() const
{
// + 1 for separating ';'
size_t out_size = strlen(Namespace) + strlen(Name) + 1;
return out_size;
}
-inline bool P6Config::Key::operator==(const Key & other) const
+inline bool PSOC6Config::Key::operator==(const Key & other) const
{
return strcmp(Namespace, other.Namespace) == 0 && strcmp(Name, other.Name) == 0;
}
diff --git a/src/platform/Infineon/PSOC6/P6Utils.cpp b/src/platform/Infineon/PSOC6/PSOC6Utils.cpp
similarity index 85%
rename from src/platform/Infineon/PSOC6/P6Utils.cpp
rename to src/platform/Infineon/PSOC6/PSOC6Utils.cpp
index 2964cc4b5dfa5b..c65a29f6a96475 100644
--- a/src/platform/Infineon/PSOC6/P6Utils.cpp
+++ b/src/platform/Infineon/PSOC6/PSOC6Utils.cpp
@@ -19,17 +19,18 @@
/**
* @file
- * General utility methods for the P6 platform.
+ * General utility methods for the PSOC6 platform.
*/
/* this file behaves like a config.h, comes first */
#include <platform/internal/CHIPDeviceLayerInternal.h>
#include "cy_network_mw_core.h"
+#include "cy_nw_helper.h"
#include <cy_wcm.h>
#include <lib/core/ErrorStr.h>
#include <lib/support/CodeUtils.h>
#include <lib/support/logging/CHIPLogging.h>
-#include <platform/Infineon/PSOC6/P6Utils.h>
+#include <platform/Infineon/PSOC6/PSOC6Utils.h>
#include "lwip/icmp.h"
#include "lwip/inet.h"
@@ -43,7 +44,7 @@
#include "lwip/sys.h"
#include "lwip/timeouts.h"
#include <malloc.h>
-#include <platform/Infineon/PSOC6/P6Config.h>
+#include <platform/Infineon/PSOC6/PSOC6Config.h>
using namespace ::chip::DeviceLayer::Internal;
using chip::DeviceLayer::Internal::DeviceNetworkInfo;
@@ -96,39 +97,39 @@ typedef struct
uint8_t data[PING_DATA_SIZE];
} icmp_packet_t;
-CHIP_ERROR P6Utils::IsAPEnabled(bool & apEnabled)
+CHIP_ERROR PSOC6Utils::IsAPEnabled(bool & apEnabled)
{
apEnabled = (WiFiMode == WIFI_MODE_AP || WiFiMode == WIFI_MODE_APSTA);
return CHIP_NO_ERROR;
}
-CHIP_ERROR P6Utils::IsStationEnabled(bool & staEnabled)
+CHIP_ERROR PSOC6Utils::IsStationEnabled(bool & staEnabled)
{
staEnabled = (WiFiMode == WIFI_MODE_STA || WiFiMode == WIFI_MODE_APSTA);
return CHIP_NO_ERROR;
}
-bool P6Utils::IsStationProvisioned(void)
+bool PSOC6Utils::IsStationProvisioned(void)
{
wifi_config_t stationConfig;
return (p6_wifi_get_config(WIFI_IF_STA, &stationConfig) == CHIP_NO_ERROR && strlen((const char *) stationConfig.sta.ssid) != 0);
}
-CHIP_ERROR P6Utils::IsStationConnected(bool & connected)
+CHIP_ERROR PSOC6Utils::IsStationConnected(bool & connected)
{
CHIP_ERROR err = CHIP_NO_ERROR;
connected = cy_wcm_is_connected_to_ap();
return err;
}
-CHIP_ERROR P6Utils::StartWiFiLayer(void)
+CHIP_ERROR PSOC6Utils::StartWiFiLayer(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
cy_wcm_config_t wcm_config;
wcm_config.interface = CY_WCM_INTERFACE_TYPE_AP_STA;
- ChipLogProgress(DeviceLayer, "Starting P6 WiFi layer");
+ ChipLogProgress(DeviceLayer, "Starting PSOC6 WiFi layer");
if (wcm_init_done == false)
{
@@ -136,7 +137,7 @@ CHIP_ERROR P6Utils::StartWiFiLayer(void)
if (result != CY_RSLT_SUCCESS)
{
err = CHIP_ERROR_INTERNAL;
- ChipLogError(DeviceLayer, "StartWiFiLayer() P6 Wi-Fi Started Failed: %s", chip::ErrorStr(err));
+ ChipLogError(DeviceLayer, "StartWiFiLayer() PSOC6 Wi-Fi Started Failed: %s", chip::ErrorStr(err));
SuccessOrExit(err);
}
wcm_init_done = true;
@@ -146,7 +147,7 @@ CHIP_ERROR P6Utils::StartWiFiLayer(void)
return err;
}
-CHIP_ERROR P6Utils::EnableStationMode(void)
+CHIP_ERROR PSOC6Utils::EnableStationMode(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
ChipLogProgress(DeviceLayer, "EnableStationMode");
@@ -163,7 +164,7 @@ CHIP_ERROR P6Utils::EnableStationMode(void)
return err;
}
-CHIP_ERROR P6Utils::SetAPMode(bool enabled)
+CHIP_ERROR PSOC6Utils::SetAPMode(bool enabled)
{
CHIP_ERROR err = CHIP_NO_ERROR;
ChipLogProgress(DeviceLayer, "SetAPMode");
@@ -193,7 +194,7 @@ CHIP_ERROR P6Utils::SetAPMode(bool enabled)
return err;
}
-const char * P6Utils::WiFiModeToStr(wifi_mode_t wifiMode)
+const char * PSOC6Utils::WiFiModeToStr(wifi_mode_t wifiMode)
{
switch (wifiMode)
{
@@ -210,49 +211,49 @@ const char * P6Utils::WiFiModeToStr(wifi_mode_t wifiMode)
}
}
-CHIP_ERROR P6Utils::GetWiFiSSID(char * buf, size_t bufSize)
+CHIP_ERROR PSOC6Utils::GetWiFiSSID(char * buf, size_t bufSize)
{
size_t num = 0;
- return P6Config::ReadConfigValueStr(P6Config::kConfigKey_WiFiSSID, buf, bufSize, num);
+ return PSOC6Config::ReadConfigValueStr(PSOC6Config::kConfigKey_WiFiSSID, buf, bufSize, num);
}
-CHIP_ERROR P6Utils::StoreWiFiSSID(char * buf, size_t size)
+CHIP_ERROR PSOC6Utils::StoreWiFiSSID(char * buf, size_t size)
{
- return P6Config::WriteConfigValueStr(P6Config::kConfigKey_WiFiSSID, buf, size);
+ return PSOC6Config::WriteConfigValueStr(PSOC6Config::kConfigKey_WiFiSSID, buf, size);
}
-CHIP_ERROR P6Utils::GetWiFiPassword(char * buf, size_t bufSize)
+CHIP_ERROR PSOC6Utils::GetWiFiPassword(char * buf, size_t bufSize)
{
size_t num = 0;
- return P6Config::ReadConfigValueStr(P6Config::kConfigKey_WiFiPassword, buf, bufSize, num);
+ return PSOC6Config::ReadConfigValueStr(PSOC6Config::kConfigKey_WiFiPassword, buf, bufSize, num);
}
-CHIP_ERROR P6Utils::StoreWiFiPassword(char * buf, size_t size)
+CHIP_ERROR PSOC6Utils::StoreWiFiPassword(char * buf, size_t size)
{
- return P6Config::WriteConfigValueStr(P6Config::kConfigKey_WiFiPassword, buf, size);
+ return PSOC6Config::WriteConfigValueStr(PSOC6Config::kConfigKey_WiFiPassword, buf, size);
}
-CHIP_ERROR P6Utils::GetWiFiSecurityCode(uint32_t & security)
+CHIP_ERROR PSOC6Utils::GetWiFiSecurityCode(uint32_t & security)
{
- return P6Config::ReadConfigValue(P6Config::kConfigKey_WiFiSecurity, security);
+ return PSOC6Config::ReadConfigValue(PSOC6Config::kConfigKey_WiFiSecurity, security);
}
-CHIP_ERROR P6Utils::StoreWiFiSecurityCode(uint32_t security)
+CHIP_ERROR PSOC6Utils::StoreWiFiSecurityCode(uint32_t security)
{
- return P6Config::WriteConfigValue(P6Config::kConfigKey_WiFiSecurity, security);
+ return PSOC6Config::WriteConfigValue(PSOC6Config::kConfigKey_WiFiSecurity, security);
}
-CHIP_ERROR P6Utils::wifi_get_mode(uint32_t & mode)
+CHIP_ERROR PSOC6Utils::wifi_get_mode(uint32_t & mode)
{
- return P6Config::ReadConfigValue(P6Config::kConfigKey_WiFiMode, mode);
+ return PSOC6Config::ReadConfigValue(PSOC6Config::kConfigKey_WiFiMode, mode);
}
-CHIP_ERROR P6Utils::wifi_set_mode(uint32_t mode)
+CHIP_ERROR PSOC6Utils::wifi_set_mode(uint32_t mode)
{
- return P6Config::WriteConfigValue(P6Config::kConfigKey_WiFiMode, mode);
+ return PSOC6Config::WriteConfigValue(PSOC6Config::kConfigKey_WiFiMode, mode);
}
-CHIP_ERROR P6Utils::p6_wifi_set_config(wifi_interface_t interface, wifi_config_t * conf)
+CHIP_ERROR PSOC6Utils::p6_wifi_set_config(wifi_interface_t interface, wifi_config_t * conf)
{
CHIP_ERROR err = CHIP_NO_ERROR;
if (interface == WIFI_IF_STA)
@@ -281,15 +282,15 @@ CHIP_ERROR P6Utils::p6_wifi_set_config(wifi_interface_t interface, wifi_config_t
return err;
}
-CHIP_ERROR P6Utils::p6_wifi_get_config(wifi_interface_t interface, wifi_config_t * conf)
+CHIP_ERROR PSOC6Utils::p6_wifi_get_config(wifi_interface_t interface, wifi_config_t * conf)
{
uint32 code = 0;
CHIP_ERROR err = CHIP_NO_ERROR;
if (interface == WIFI_IF_STA)
{
- if (P6Config::ConfigValueExists(P6Config::kConfigKey_WiFiSSID) &&
- P6Config::ConfigValueExists(P6Config::kConfigKey_WiFiPassword) &&
- P6Config::ConfigValueExists(P6Config::kConfigKey_WiFiSecurity))
+ if (PSOC6Config::ConfigValueExists(PSOC6Config::kConfigKey_WiFiSSID) &&
+ PSOC6Config::ConfigValueExists(PSOC6Config::kConfigKey_WiFiPassword) &&
+ PSOC6Config::ConfigValueExists(PSOC6Config::kConfigKey_WiFiSecurity))
{
/* Retrieve Wi-Fi Configurations from Storage */
err = GetWiFiSSID((char *) conf->sta.ssid, sizeof(conf->sta.ssid));
@@ -320,7 +321,7 @@ CHIP_ERROR P6Utils::p6_wifi_get_config(wifi_interface_t interface, wifi_config_t
return err;
}
-CHIP_ERROR P6Utils::GetWiFiStationProvision(Internal::DeviceNetworkInfo & netInfo, bool includeCredentials)
+CHIP_ERROR PSOC6Utils::GetWiFiStationProvision(Internal::DeviceNetworkInfo & netInfo, bool includeCredentials)
{
CHIP_ERROR err = CHIP_NO_ERROR;
wifi_config_t stationConfig;
@@ -350,7 +351,7 @@ CHIP_ERROR P6Utils::GetWiFiStationProvision(Internal::DeviceNetworkInfo & netInf
return err;
}
-CHIP_ERROR P6Utils::SetWiFiStationProvision(const Internal::DeviceNetworkInfo & netInfo)
+CHIP_ERROR PSOC6Utils::SetWiFiStationProvision(const Internal::DeviceNetworkInfo & netInfo)
{
CHIP_ERROR err = CHIP_NO_ERROR;
wifi_config_t wifiConfig;
@@ -358,9 +359,9 @@ CHIP_ERROR P6Utils::SetWiFiStationProvision(const Internal::DeviceNetworkInfo &
char wifiSSID[kMaxWiFiSSIDLength + 1];
size_t netInfoSSIDLen = strlen(netInfo.WiFiSSID);
- // Ensure that P6 station mode is enabled. This is required before p6_wifi_set_config
+ // Ensure that PSOC6 station mode is enabled. This is required before p6_wifi_set_config
// can be called.
- err = P6Utils::EnableStationMode();
+ err = PSOC6Utils::EnableStationMode();
SuccessOrExit(err);
// Enforce that wifiSSID is null terminated before copying it
@@ -374,10 +375,10 @@ CHIP_ERROR P6Utils::SetWiFiStationProvision(const Internal::DeviceNetworkInfo &
wifiSSID[kMaxWiFiSSIDLength] = '\0';
}
- // Initialize an P6 wifi_config_t structure based on the new provision information.
+ // Initialize an PSOC6 wifi_config_t structure based on the new provision information.
populate_wifi_config_t(&wifiConfig, WIFI_IF_STA, (cy_wcm_ssid_t *) wifiSSID, (cy_wcm_passphrase_t *) netInfo.WiFiKey);
- // Configure the P6 WiFi interface.
+ // Configure the PSOC6 WiFi interface.
ReturnLogErrorOnFailure(p6_wifi_set_config(WIFI_IF_STA, &wifiConfig));
ChipLogProgress(DeviceLayer, "WiFi station provision set (SSID: %s)", netInfo.WiFiSSID);
@@ -386,18 +387,18 @@ CHIP_ERROR P6Utils::SetWiFiStationProvision(const Internal::DeviceNetworkInfo &
return err;
}
-CHIP_ERROR P6Utils::ClearWiFiStationProvision(void)
+CHIP_ERROR PSOC6Utils::ClearWiFiStationProvision(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
wifi_config_t stationConfig;
ChipLogProgress(DeviceLayer, "ClearWiFiStationProvision");
- // Clear the P6 WiFi station configuration.
+ // Clear the PSOC6 WiFi station configuration.
memset(&stationConfig.sta, 0, sizeof(stationConfig.sta));
ReturnLogErrorOnFailure(p6_wifi_set_config(WIFI_IF_STA, &stationConfig));
return err;
}
-CHIP_ERROR P6Utils::p6_wifi_disconnect(void)
+CHIP_ERROR PSOC6Utils::p6_wifi_disconnect(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
@@ -411,7 +412,7 @@ CHIP_ERROR P6Utils::p6_wifi_disconnect(void)
return err;
}
-CHIP_ERROR P6Utils::p6_wifi_connect(void)
+CHIP_ERROR PSOC6Utils::p6_wifi_connect(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
@@ -445,7 +446,7 @@ static const cy_wcm_ip_setting_t ap_mode_ip_settings2 = {
INITIALISER_IPV4_ADDRESS1(.netmask, MAKE_IPV4_ADDRESS1(255, 255, 255, 0)),
};
-CHIP_ERROR P6Utils::p6_start_ap(void)
+CHIP_ERROR PSOC6Utils::p6_start_ap(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
@@ -481,7 +482,7 @@ CHIP_ERROR P6Utils::p6_start_ap(void)
return err;
}
-CHIP_ERROR P6Utils::p6_stop_ap(void)
+CHIP_ERROR PSOC6Utils::p6_stop_ap(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
cy_rslt_t result = CY_RSLT_SUCCESS;
@@ -495,8 +496,8 @@ CHIP_ERROR P6Utils::p6_stop_ap(void)
return err;
}
-void P6Utils::populate_wifi_config_t(wifi_config_t * wifi_config, wifi_interface_t interface, const cy_wcm_ssid_t * ssid,
- const cy_wcm_passphrase_t * password, cy_wcm_security_t security)
+void PSOC6Utils::populate_wifi_config_t(wifi_config_t * wifi_config, wifi_interface_t interface, const cy_wcm_ssid_t * ssid,
+ const cy_wcm_passphrase_t * password, cy_wcm_security_t security)
{
CY_ASSERT(wifi_config != NULL);
@@ -723,7 +724,7 @@ void ping_raw(void)
}
#endif
-CHIP_ERROR P6Utils::ping_init(void)
+CHIP_ERROR PSOC6Utils::ping_init(void)
{
CHIP_ERROR err = CHIP_NO_ERROR;
struct netif * net_interface = NULL;
@@ -819,7 +820,7 @@ static void xtlv_unpack_xtlv(const xtlv_t * xtlv, uint16_t * type, uint16_t * le
}
}
-void P6Utils::unpack_xtlv_buf(const uint8_t * tlv_buf, uint16_t buflen, wl_cnt_ver_30_t * cnt, wl_cnt_ge40mcst_v1_t * cnt_ge40)
+void PSOC6Utils::unpack_xtlv_buf(const uint8_t * tlv_buf, uint16_t buflen, wl_cnt_ver_30_t * cnt, wl_cnt_ge40mcst_v1_t * cnt_ge40)
{
uint16_t len;
uint16_t type;
@@ -853,7 +854,7 @@ void P6Utils::unpack_xtlv_buf(const uint8_t * tlv_buf, uint16_t buflen, wl_cnt_v
}
}
-/* Get the Heap total size for P6 Linker file */
+/* Get the Heap total size for PSOC6 Linker file */
uint32_t get_heap_total()
{
extern uint8_t __HeapBase; /* Symbol exported by the linker. */
@@ -865,7 +866,7 @@ uint32_t get_heap_total()
}
/* Populate Heap info based on heap total size and Current Heap usage */
-void P6Utils::heap_usage(heap_info_t * heap)
+void PSOC6Utils::heap_usage(heap_info_t * heap)
{
struct mallinfo mall_info = mallinfo();
diff --git a/src/platform/Infineon/PSOC6/P6Utils.h b/src/platform/Infineon/PSOC6/PSOC6Utils.h
similarity index 99%
rename from src/platform/Infineon/PSOC6/P6Utils.h
rename to src/platform/Infineon/PSOC6/PSOC6Utils.h
index c313e963576215..fbb28c4c0e5e7a 100644
--- a/src/platform/Infineon/PSOC6/P6Utils.h
+++ b/src/platform/Infineon/PSOC6/PSOC6Utils.h
@@ -187,7 +187,7 @@ namespace chip {
namespace DeviceLayer {
namespace Internal {
-class P6Utils
+class PSOC6Utils
{
public:
static CHIP_ERROR IsAPEnabled(bool & apEnabled);
diff --git a/third_party/infineon/psoc6/BUILD.gn b/third_party/infineon/psoc6/BUILD.gn
index 19fe610b1e6777..82fe0865cec5ec 100644
--- a/third_party/infineon/psoc6/BUILD.gn
+++ b/third_party/infineon/psoc6/BUILD.gn
@@ -22,12 +22,25 @@ declare_args() {
assert(psoc6_target_project != "", "psoc6_target_project must be specified")
+mtb_json_local =
+ mtb_core_json # Can't modify without copying into current scope
+
+if (is_debug) {
+ mtb_json_local.cflags += [ "-Og" ]
+ mtb_json_local.cxxflags += [ "-Og" ]
+ mtb_json_local.defines += [ "-DDEBUG" ]
+} else {
+ mtb_json_local.cflags += [ "-Os" ]
+ mtb_json_local.cxxflags += [ "-Os" ]
+ mtb_json_local.defines += [ "-DNDEBUG" ]
+}
+
# Add includes, cflags, asmflags, etc in config
config("psoc6_sdk_config") {
# Pull out includes from generated json
# Treat these includes as system includes, so warnings in them are not fatal.
_system_include_dirs = []
- foreach(include_dir, mtb_json.includes) {
+ foreach(include_dir, mtb_json_local.includes) {
# Strip off leading -I part
include_dir = string_replace(include_dir, "-I", "", 1)
@@ -48,24 +61,24 @@ config("psoc6_sdk_config") {
# Pull out defines from generated json
defines = []
- foreach(def, mtb_json.defines) {
+ foreach(def, mtb_json_local.defines) {
# Strip off leading -D part
defines += [ string_replace(def, "-D", "", 1) ]
}
# Pull out static libs (.a files) from generated json
libs = []
- foreach(lib, mtb_json.libs) {
+ foreach(lib, mtb_json_local.libs) {
# Path is relative to SDK
lib = "${psoc6_sdk_root}/${lib}"
libs += [ lib ]
}
- cflags_c = mtb_json.cflags
- cflags_cc = mtb_json.cxxflags
- asmflags = mtb_json.asflags
- ldflags = filter_exclude(mtb_json.ldflags, [ "-T*" ])
+ cflags_c = mtb_json_local.cflags
+ cflags_cc = mtb_json_local.cxxflags
+ asmflags = mtb_json_local.asflags
+ ldflags = filter_exclude(mtb_json_local.ldflags, [ "-T*" ])
# TODO, once the issue is properly fixed we should no longer need this warning.
cflags_c += [ "-Wno-error=array-parameter" ]
@@ -73,7 +86,7 @@ config("psoc6_sdk_config") {
# Pull out linker flags with paths (-T flags) and make paths absolute
# OTA app provides it's own linker script
if (!chip_enable_ota_requestor) {
- linker_script_flags = filter_include(mtb_json.ldflags, [ "-T*" ])
+ linker_script_flags = filter_include(mtb_json_local.ldflags, [ "-T*" ])
foreach(linker_script, linker_script_flags) {
# Strip off leading -T part
linker_script = string_replace(linker_script, "-T", "", 1)
diff --git a/third_party/infineon/psoc6/psoc6_board.gni b/third_party/infineon/psoc6/psoc6_board.gni
index a6cae75a7aecc3..340f312a67753d 100644
--- a/third_party/infineon/psoc6/psoc6_board.gni
+++ b/third_party/infineon/psoc6/psoc6_board.gni
@@ -13,7 +13,7 @@
# limitations under the License.
declare_args() {
- # P6 board used
+ # PSOC6 board used
psoc6_board = ""
}
diff --git a/third_party/infineon/psoc6/psoc6_sdk.gni b/third_party/infineon/psoc6/psoc6_sdk.gni
index 90366ddac471aa..bc315affc544be 100644
--- a/third_party/infineon/psoc6/psoc6_sdk.gni
+++ b/third_party/infineon/psoc6/psoc6_sdk.gni
@@ -21,15 +21,9 @@ import("psoc6_board.gni")
# TODO: Don't hardcode config/toolchain
# TODO: Convert to GN action?
-if (is_debug) {
- debug_str = "Debug"
-} else {
- debug_str = "Release"
-}
-mtb_json =
- read_file("${psoc6_sdk_root}/build/${psoc6_board}/$debug_str/GCC_ARM.json",
- "json")
+mtb_core_json =
+ read_file("${psoc6_sdk_root}/build/${psoc6_board}/GCC_ARM.json", "json")
# Defines an psoc6 SDK build target.
#
@@ -73,13 +67,26 @@ template("psoc6_sdk_sources") {
}
# This is ugly. See note in BUILD.gn for reasoning
- mtb_json_local = mtb_json # Can't modify without copying into current scope
+ mtb_json_local =
+ mtb_core_json # Can't modify without copying into current scope
+
+ # Update the flags and defines for either Release or Debug mode
+ if (is_debug) {
+ mtb_json_local.cflags += [ "-Og" ]
+ mtb_json_local.cxxflags += [ "-Og" ]
+ mtb_json_local.defines += [ "-DDEBUG" ]
+ } else {
+ mtb_json_local.cflags += [ "-Os" ]
+ mtb_json_local.cxxflags += [ "-Os" ]
+ mtb_json_local.defines += [ "-DNDEBUG" ]
+ }
+
if (chip_enable_ota_requestor == true) {
mtb_json_local.c_source -= [
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_01_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_02_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_03_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_04_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_01_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_02_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_03_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_04_cm0p_sleep.c",
]
}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/Makefile b/third_party/infineon/psoc6/psoc6_sdk/Makefile
deleted file mode 100755
index 45318c6686baa7..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/Makefile
+++ /dev/null
@@ -1,236 +0,0 @@
-################################################################################
-# \file Makefile
-# \version 1.0
-#
-# \brief
-# Top-level application make file.
-#
-################################################################################
-# \copyright
-# Copyright 2018-2021 Cypress Semiconductor Corporation
-# SPDX-License-Identifier: Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-################################################################################
-
-
-################################################################################
-# Basic Configuration
-################################################################################
-
-# Target board/hardware (BSP).
-# To change the target, it is recommended to use the Library manager
-# ('make modlibs' from command line), which will also update Eclipse IDE launch
-# configurations. If TARGET is manually edited, ensure TARGET_<BSP>.mtb with a
-# valid URL exists in the application, run 'make getlibs' to fetch BSP contents
-# and update or regenerate launch configurations for your IDE.
-TARGET=$(error TARGET should be set on make command-line)
-
-APPNAME=mtb-chip-sdk
-
-# Name of toolchain to use. Options include:
-#
-# GCC_ARM -- GCC provided with ModusToolbox IDE
-# ARM -- ARM Compiler (must be installed separately)
-# IAR -- IAR Compiler (must be installed separately)
-#
-# See also: CY_COMPILER_PATH below
-TOOLCHAIN=GCC_ARM
-
-# Default build configuration. Options include:
-#
-# Debug -- build with minimal optimizations, focus on debugging.
-# Release -- build with full optimizations
-# Custom -- build with custom configuration, set the optimization flag in CFLAGS
-#
-# If CONFIG is manually edited, ensure to update or regenerate launch configurations
-# for your IDE.
-CONFIG=Debug
-
-# If set to "true" or "1", display full command-lines when building.
-VERBOSE=
-
-# The MQTT Client library does not support secure connections to the Mosquitto
-# broker by default, because the server uses the SHA1 hashing algorithm which
-# is considered a weak message digest and is therefore not enabled by default.
-# However, if it is required to connect securely to the Mosquitto Broker set
-# this macro to "true" or "1".
-ENABLE_SECURE_MOSQUITTO_BROKER_SUPPORT=0
-
-################################################################################
-# Advanced Configuration
-################################################################################
-
-# Enable optional code that is ordinarily disabled by default.
-#
-# Available components depend on the specific targeted hardware and firmware
-# in use. In general, if you have
-#
-# COMPONENTS=foo bar
-#
-# ... then code in directories named COMPONENT_foo and COMPONENT_bar will be
-# added to the build
-#
-COMPONENTS=FREERTOS LWIP MBEDTLS RTOS_AWARE WICED_BLE OTA_MCUBOOT_PSOC
-
-# CHIP: ModusToolbox 2.2 & 2.3 do not have a way to disable indirect library
-# dependencies. This causes trouble for CHIP because we need to use its
-# bundled version of LwIP.
-#
-# As a work-around, we enable "QUICK_MODE" for the "getlibs" target. This
-# tells it to skip automatic generation of .mtb files for indirect
-# dependencies. We list everything we need as a direct dependency.
-#
-# This isn't ideal (it means have to manually manage dependencies), but it's
-# the best we can do for these versions of ModusToolbox.
-ifeq ($(filter getlibs,$(MAKECMDGOALS)),getlibs)
-QUICK_MODE=true
-endif
-
-# Like COMPONENTS, but disable optional code that was enabled by default.
-DISABLE_COMPONENTS=
-
-# By default the build system automatically looks in the Makefile's directory
-# tree for source code and builds it. The SOURCES variable can be used to
-# manually add source code to the build process from a location not searched
-# by default, or otherwise not found by the build system.
-SOURCES=
-
-# Like SOURCES, but for include directories. Value should be paths to
-# directories (without a leading -I).
-INCLUDES=./configs
-
-# Custom configuration of mbedtls library.
-MBEDTLSFLAGS = MBEDTLS_USER_CONFIG_FILE=<mbedtls_user_config.h>
-
-# Add additional defines to the build process (without a leading -D).
-DEFINES=$(MBEDTLSFLAGS) CYBSP_WIFI_CAPABLE CY_RETARGET_IO_CONVERT_LF_TO_CRLF CY_RTOS_AWARE PSOC_062_2M
-
-# Enable support for Mosquitto Broker based on 'ENABLE_SECURE_MOSQUITTO_BROKER_
-# SUPPORT' variable. See the MQTT Client library's README for more information.
-ifneq (,$(filter $(ENABLE_SECURE_MOSQUITTO_BROKER_SUPPORT),true 1))
-DEFINES+=CY_MQTT_ENABLE_SECURE_TEST_MOSQUITTO_SUPPORT
-endif
-
-# CY8CPROTO-062-4343W board shares the same GPIO for the user button (USER BTN1)
-# and the CYW4343W host wake up pin. Since this example uses the GPIO for
-# interfacing with the user button, the SDIO interrupt to wake up the host is
-# disabled by setting CY_WIFI_HOST_WAKE_SW_FORCE to '0'.
-ifeq ($(TARGET), CY8CPROTO-062-4343W)
-DEFINES+=CY_WIFI_HOST_WAKE_SW_FORCE=0
-endif
-
-# Select softfp or hardfp floating point. Default is softfp.
-VFP_SELECT=
-
-COMMON_WARNING_FLAGS = -Wall -Werror=all \
- -Wno-error=unused-function \
- -Wno-error=unused-but-set-variable \
- -Wno-error=unused-variable \
- -Wno-error=deprecated-declarations \
- -Wextra \
- -Wno-unused-parameter -Wno-sign-compare \
- -Wno-shadow \
- -Wno-maybe-uninitialized \
- -Wno-incompatible-pointer-types \
- -Wno-type-limits \
- -Wno-conversion
-
-# Additional / custom C compiler flags.
-#
-# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
-# above.
-CFLAGS=$(COMMON_WARNING_FLAGS)
-
-# Additional / custom C++ compiler flags.
-#
-# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
-# above.
-CXXFLAGS=
-
-# Additional / custom assembler flags.
-#
-# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
-# above.
-ASFLAGS=
-
-# Additional / custom linker flags.
-LDFLAGS=
-
-# Additional / custom libraries to link in to the application.
-LDLIBS=
-
-# Path to the linker script to use (if empty, use the default linker script).
-LINKER_SCRIPT=
-
-# Custom pre-build commands to run.
-PREBUILD=
-
-# Custom post-build commands to run.
-POSTBUILD=
-
-
-################################################################################
-# Paths
-################################################################################
-
-# Relative path to the project directory (default is the Makefile's directory).
-#
-# This controls where automatic source code discovery looks for code.
-CY_APP_PATH=
-
-# Relative path to the shared repo location.
-#
-# All .mtb files have the format, <URI>#<COMMIT>#<LOCATION>. If the <LOCATION> field
-# begins with $$ASSET_REPO$$, then the repo is deposited in the path specified by
-# the CY_GETLIBS_SHARED_PATH variable. The default location is one directory level
-# above the current app directory.
-# This is used with CY_GETLIBS_SHARED_NAME variable, which specifies the directory name.
-CY_GETLIBS_SHARED_PATH=../
-
-# Directory name of the shared repo location.
-#
-CY_GETLIBS_SHARED_NAME=mtb_shared
-
-# Absolute path to the compiler's "bin" directory.
-#
-# The default depends on the selected TOOLCHAIN (GCC_ARM uses the ModusToolbox
-# IDE provided compiler by default).
-CY_COMPILER_PATH=
-
-
-# Locate ModusToolbox IDE helper tools folders in default installation
-# locations for Windows, Linux, and macOS.
-CY_WIN_HOME=$(subst \,/,$(USERPROFILE))
-CY_TOOLS_PATHS ?= $(wildcard \
- $(CY_WIN_HOME)/ModusToolbox/tools_* \
- $(HOME)/ModusToolbox/tools_* \
- /Applications/ModusToolbox/tools_*)
-
-# If you install ModusToolbox IDE in a custom location, add the path to its
-# "tools_X.Y" folder (where X and Y are the version number of the tools
-# folder). Make sure you use forward slashes.
-CY_TOOLS_PATHS+=
-
-# Default to the newest installed tools folder, or the users override (if it's
-# found).
-CY_TOOLS_DIR=$(lastword $(sort $(wildcard $(CY_TOOLS_PATHS))))
-
-ifeq ($(CY_TOOLS_DIR),)
-$(error Unable to find any of the available CY_TOOLS_PATHS -- $(CY_TOOLS_PATHS). On Windows, use forward slashes.)
-endif
-
-$(info Tools Directory: $(CY_TOOLS_DIR))
-
-include $(CY_TOOLS_DIR)/make/start.mk
-
diff --git a/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Debug/GCC_ARM.json b/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/GCC_ARM.json
similarity index 83%
rename from third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Debug/GCC_ARM.json
rename to third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/GCC_ARM.json
index bdf407807c5a42..89ef0454830145 100644
--- a/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Debug/GCC_ARM.json
+++ b/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/GCC_ARM.json
@@ -17,7 +17,6 @@
"-c",
"-mcpu=cortex-m4",
"--specs=nano.specs",
- "-Og",
"-mfloat-abi=softfp",
"-mfpu=fpv4-sp-d16",
"-mthumb",
@@ -31,7 +30,6 @@
"-c",
"-mcpu=cortex-m4",
"--specs=nano.specs",
- "-Og",
"-mfloat-abi=softfp",
"-mfpu=fpv4-sp-d16",
"-mthumb",
@@ -67,50 +65,48 @@
"-ffat-lto-objects",
"-g",
"-Wall",
+ "-pipe",
"-Wl,--gc-sections",
- "-T./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld"
+ "-T./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/linker.ld"
],
"includes": [
"-I./configs",
"-I.",
- "-I./arch",
- "-I./configs",
"-I./libs",
+ "-I./libs/abstraction-rtos/include/COMPONENT_FREERTOS",
+ "-I./libs/secure-sockets/include/COMPONENT_FREERTOS",
+ "-I./arch",
+ "-I./libs/freertos",
+ "-I./libs/freertos/Source",
+ "-I./libs/freertos/Source/include",
+ "-I./libs/freertos/Source/portable",
+ "-I./libs/freertos/Source/portable/COMPONENT_CM4",
+ "-I./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM",
"-I./libs/TARGET_CY8CKIT-062S2-43012",
"-I./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS",
- "-I./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource",
+ "-I./configs/GeneratedSource",
"-I./libs/TARGET_CY8CKIT-062S2-43012/bluetooth",
"-I./libs/abstraction-rtos",
"-I./libs/abstraction-rtos/include",
- "-I./libs/abstraction-rtos/include/COMPONENT_FREERTOS",
- "-I./libs/abstraction-rtos/include/Template",
- "-I./libs/anycloud-ota",
- "-I./libs/anycloud-ota/include",
- "-I./libs/anycloud-ota/source",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/include",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/include/bootutil",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/src",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/flash_qspi",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/include",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/include/flash_map_backend",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/mem_config",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/mcuboot_header",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/mcuboot_header/mcuboot_config",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/sysflash",
- "-I./libs/anycloud-ota/source/port_support",
- "-I./libs/anycloud-ota/source/port_support/serial_flash",
- "-I./libs/anycloud-ota/source/port_support/untar",
- "-I./libs/bluetooth-freertos",
- "-I./libs/bluetooth-freertos/platform",
- "-I./libs/bluetooth-freertos/platform/common",
- "-I./libs/bluetooth-freertos/platform/debug",
- "-I./libs/bluetooth-freertos/platform/include",
- "-I./libs/btstack",
+ "-I./ota/config/",
+ "-I./libs/ota-update/include",
+ "-I./libs/ota-update/source",
+ "-I./libs/ota-update/configs",
+ "-I./libs/ota-update/source/COMPONENT_MBEDTLS",
+ "-I./libs/ota-update/source/COMPONENT_OTA_BLUETOOTH/",
+ "-I./libs/ota-update/configs/COMPONENT_OTA_BLUETOOTH_SECURE",
+ "-I./libs/ota-update/configs/FreeRTOS/COMPONENT_CM4",
+ "-I./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT",
+ "-I./libs/ota-bootloader-abstraction/configs/COMPONENT_MCUBOOT/flash/COMPONENT_OTA_PSOC_062",
+ "-I./libs/ota-bootloader-abstraction/include/",
+ "-I./libs/ota-bootloader-abstraction/configs/COMPONENT_MCUBOOT/flash/",
+ "-I./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT/",
+ "-I./libs/ota-bootloader-abstraction/source/untar/",
+ "-I./libs/btstack-integration/",
+ "-I./libs/btstack-integration/COMPONENT_HCI-UART/common",
+ "-I./libs/btstack-integration/COMPONENT_HCI-UART/include",
"-I./libs/btstack/wiced_include",
+ "-I./libs/cat1cm0p/COMPONENT_CAT1A",
"-I./libs/clib-support",
"-I./libs/clib-support/TOOLCHAIN_GCC_ARM",
"-I./libs/connectivity-utilities",
@@ -121,12 +117,6 @@
"-I./libs/connectivity-utilities/network",
"-I./libs/core-lib",
"-I./libs/core-lib/include",
- "-I./libs/freertos",
- "-I./libs/freertos/Source",
- "-I./libs/freertos/Source/include",
- "-I./libs/freertos/Source/portable",
- "-I./libs/freertos/Source/portable/COMPONENT_CM4",
- "-I./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM",
"-I./libs/kv-store",
"-I./libs/lwip",
"-I./libs/lwip/src",
@@ -137,6 +127,8 @@
"-I./libs/lwip/src/include/netif",
"-I./libs/lwip/src/include/netif/ppp",
"-I./libs/lwip/src/include/netif/ppp/polarssl",
+ "-I./libs/lwip-network-interface-integration/include",
+ "-I./libs/lwip-network-interface-integration/source",
"-I./libs/mbedtls",
"-I./libs/mbedtls/include",
"-I./libs/mbedtls/include/mbedtls",
@@ -151,19 +143,21 @@
"-I./libs/mtb-hal-cat1/include_pvt",
"-I./libs/mtb-hal-cat1/source",
"-I./libs/mtb-pdl-cat1",
- "-I./libs/mtb-pdl-cat1/cmsis",
- "-I./libs/mtb-pdl-cat1/cmsis/include",
+ "-I./libs/cmsis/Core/Include",
+ "-I./libs/cmsis/COMPONENT_CMSIS_NN/include",
"-I./libs/mtb-pdl-cat1/devices",
"-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A",
"-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include",
"-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip",
"-I./libs/mtb-pdl-cat1/drivers",
"-I./libs/mtb-pdl-cat1/drivers/include",
+ "-I./ota",
+ "-I./ota/bootutil",
"-I./libs/retarget-io",
"-I./libs/secure-sockets",
"-I./libs/secure-sockets/include",
- "-I./libs/secure-sockets/include/COMPONENT_FREERTOS",
"-I./libs/secure-sockets/source",
+ "-I./libs/secure-sockets/source/COMPONENT_MBEDTLS/include",
"-I./libs/serial-flash",
"-I./libs/whd-bsp-integration",
"-I./libs/wifi-connection-manager",
@@ -185,15 +179,15 @@
"-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/resource_imp",
"-I./libs/wifi-host-driver/WiFi_Host_Driver/src",
"-I./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/src/include",
- "-I./libs/lwip-network-interface-integration",
- "-I./libs/lwip-network-interface-integration/source",
- "-I./libs/lwip-network-interface-integration/include",
- "-I./ota/config"
+ "-I./libs/wifi-host-driver/WiFi_Host_Driver/src/include"
],
"defines": [
+ "-DCOMPONENT_FREERTOS",
"-DMBEDTLS_USER_CONFIG_FILE=<mbedtls_user_config.h>",
"-DCYBSP_WIFI_CAPABLE",
+ "-DCYBSP_WIFI_SDIO_NEEDS_INIT",
+ "-DCORE_NAME_CM4_0",
+ "-DCY_USING_PREBUILT_CM0P_IMAGE",
"-DCY_RETARGET_IO_CONVERT_LF_TO_CRLF",
"-DCY_RTOS_AWARE",
"-DPSOC_062_2M",
@@ -207,10 +201,11 @@
"-DCOMPONENT_BSP_DESIGN_MODUS",
"-DCOMPONENT_CAT1",
"-DCOMPONENT_CAT1A",
+ "-DCOMPONENT_CMSIS_NN",
"-DCOMPONENT_CM0P_SLEEP",
"-DCOMPONENT_CM4",
"-DCOMPONENT_CY8CKIT_062S2_43012",
- "-DCOMPONENT_FREERTOS",
+ "-DCOMPONENT_43012",
"-DCOMPONENT_HCI_UART",
"-DCOMPONENT_LWIP",
"-DCOMPONENT_MBEDTLS",
@@ -220,7 +215,6 @@
"-DCOMPONENT_RTOS_AWARE",
"-DCOMPONENT_SOFTFP",
"-DCOMPONENT_WICED_BLE",
- "-DDEBUG",
"-DCY_SUPPORTS_DEVICE_VALIDATION",
"-DCY_CRYPTO_HAL_DISABLE",
"-DCOMPONENT_SECURE_SOCKETS",
@@ -228,24 +222,6 @@
"-DOPTIGA_LIB_EXTERNAL=<optiga_lib_config_mtb.h>"
],
"c_source": [
- "./libs/abstraction-rtos/source/cy_worker_thread.c",
- "./libs/anycloud-ota/source/port_support/serial_flash/ota_serial_flash.c",
- "./libs/bluetooth-freertos/platform/common/cybt_hci_rx_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_hci_tx_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_host_stack_platform_interface.c",
- "./libs/bluetooth-freertos/platform/common/cybt_patchram_download.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_main.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_trace.c",
- "./libs/bluetooth-freertos/platform/common/cybt_prm.c",
- "./libs/bluetooth-freertos/platform/debug/cybt_debug_uart.c",
- "./libs/bluetooth-freertos/platform/freertos/cybt_platform_freertos.c",
- "./libs/clib-support/cy_time.c",
- "./libs/connectivity-utilities/JSON_parser/cy_json_parser.c",
- "./libs/connectivity-utilities/cy_log/cy_log.c",
- "./libs/connectivity-utilities/cy_string/cy_string_utils.c",
- "./libs/connectivity-utilities/linked_list/cy_linked_list.c",
- "./libs/connectivity-utilities/network/cy_nw_helper_common.c",
"./libs/freertos/Source/croutine.c",
"./libs/freertos/Source/event_groups.c",
"./libs/freertos/Source/list.c",
@@ -258,6 +234,46 @@
"./libs/freertos/Source/stream_buffer.c",
"./libs/freertos/Source/tasks.c",
"./libs/freertos/Source/timers.c",
+ "./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/port.c",
+ "./libs/clib-support/COMPONENT_FREERTOS/cy_mutex_pool.c",
+ "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_freertos_common.c",
+ "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_freertos_helpers.c",
+ "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_rtos_freertos.c",
+ "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_rtos_dsram.c",
+ "./arch/sys_arch.c",
+ "./libs/abstraction-rtos/source/cy_worker_thread.c",
+ "./libs/ota-update/source/cy_ota_agent.c",
+ "./libs/ota-update/source/cy_ota_ble.c",
+ "./libs/ota-update/source/cy_ota_http.c",
+ "./libs/ota-update/source/cy_ota_mqtt.c",
+ "./libs/ota-update/source/COMPONENT_MBEDTLS/cy_ota_ble_secure.c",
+ "./libs/ota-update/source/COMPONENT_OTA_BLUETOOTH/ota_ecc_pp.c",
+ "./libs/ota-update/source/COMPONENT_OTA_BLUETOOTH/ota_multprecision.c",
+ "./libs/ota-update/configs/COMPONENT_OTA_BLUETOOTH_SECURE/ecdsa256_pub.c",
+ "./libs/ota-bootloader-abstraction/configs/COMPONENT_MCUBOOT/flash/cy_ota_flash.c",
+ "./libs/ota-bootloader-abstraction/configs/COMPONENT_MCUBOOT/flash/COMPONENT_OTA_PSOC_062/flash_qspi.c",
+ "./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT/cy_flash_map.c",
+ "./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT/cy_ota_flash_weak.c",
+ "./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT/cy_ota_storage_api.c",
+ "./libs/ota-bootloader-abstraction/source/COMPONENT_MCUBOOT/cy_ota_untar_wrapper.c",
+ "./libs/ota-bootloader-abstraction/source/untar/cy_ota_untar.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_hci_rx_task.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_hci_tx_task.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_host_stack_platform_interface.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_patchram_download.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_platform_main.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_platform_task.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_platform_trace.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_prm.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/common/cybt_serialize.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/debug/cybt_debug_uart.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/freertos/cybt_platform_freertos.c",
+ "./libs/clib-support/cy_time.c",
+ "./libs/connectivity-utilities/JSON_parser/cy_json_parser.c",
+ "./libs/connectivity-utilities/cy_log/cy_log.c",
+ "./libs/connectivity-utilities/cy_string/cy_string_utils.c",
+ "./libs/connectivity-utilities/linked_list/cy_linked_list.c",
+ "./libs/connectivity-utilities/network/cy_nw_helper_common.c",
"./libs/kv-store/mtb_kvstore.c",
"./libs/lwip/src/api/api_lib.c",
"./libs/lwip/src/api/api_msg.c",
@@ -309,6 +325,9 @@
"./libs/lwip/src/netif/bridgeif_fdb.c",
"./libs/lwip/src/netif/ethernet.c",
"./libs/lwip/src/netif/zepif.c",
+ "./libs/lwip-network-interface-integration/source/cy_ethernetif.c",
+ "./libs/lwip-network-interface-integration/source/cy_lwip_dhcp_server.c",
+ "./libs/lwip-network-interface-integration/source/cy_network_mw_core.c",
"./libs/mbedtls/library/aes.c",
"./libs/mbedtls/library/aesni.c",
"./libs/mbedtls/library/arc4.c",
@@ -408,13 +427,12 @@
"./libs/mtb-hal-cat1/source/cyhal_dma_dmac.c",
"./libs/mtb-hal-cat1/source/cyhal_dma_dw.c",
"./libs/mtb-hal-cat1/source/cyhal_ezi2c.c",
- "./libs/mtb-hal-cat1/source/cyhal_flash.c",
"./libs/mtb-hal-cat1/source/cyhal_gpio.c",
"./libs/mtb-hal-cat1/source/cyhal_hwmgr.c",
+ "./libs/mtb-hal-cat1/source/cyhal_irq_impl.c",
"./libs/mtb-hal-cat1/source/cyhal_i2c.c",
"./libs/mtb-hal-cat1/source/cyhal_i2s.c",
"./libs/mtb-hal-cat1/source/cyhal_interconnect.c",
- "./libs/mtb-hal-cat1/source/cyhal_irq_psoc.c",
"./libs/mtb-hal-cat1/source/cyhal_keyscan.c",
"./libs/mtb-hal-cat1/source/cyhal_lptimer.c",
"./libs/mtb-hal-cat1/source/cyhal_opamp.c",
@@ -436,13 +454,13 @@
"./libs/mtb-hal-cat1/source/cyhal_udb_sdio.c",
"./libs/mtb-hal-cat1/source/cyhal_usb_dev.c",
"./libs/mtb-hal-cat1/source/cyhal_utils.c",
- "./libs/mtb-hal-cat1/source/cyhal_utils_psoc.c",
+ "./libs/mtb-hal-cat1/source/cyhal_utils_impl.c",
"./libs/mtb-hal-cat1/source/cyhal_wdt.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_adcmic.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_ble_clk.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_btss.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_canfd.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto.c",
+ "./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_trng.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v1.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_aes_v2.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_cmac_v1.c",
@@ -466,11 +484,8 @@
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_rsa.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_sha_v1.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_sha_v2.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_trng_v1.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_trng_v2.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_core_vu.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_crypto_server.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_cryptolite.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_csd.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_ctb.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_ctdac.c",
@@ -490,8 +505,6 @@
"./libs/mtb-pdl-cat1/drivers/source/cy_lpcomp.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_lvd.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_mcwdt.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_pd_pdcm.c",
- "./libs/mtb-pdl-cat1/drivers/source/cy_pd_ppu.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_pdm_pcm.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_pdm_pcm_v2.c",
"./libs/mtb-pdl-cat1/drivers/source/cy_pra.c",
@@ -562,33 +575,21 @@
"./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi.c",
"./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi_api.c",
"./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi_p2p.c",
- "./libs/lwip-network-interface-integration/source/cy_network_mw_core.c",
- "./libs/lwip-network-interface-integration/source/cy_lwip_dhcp_server.c",
+ "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_proto.c",
"./libs/clib-support/TOOLCHAIN_GCC_ARM/cy_clib_support_newlib.c",
"./libs/TARGET_CY8CKIT-062S2-43012/bluetooth/cybsp_bt_config.c",
"./libs/TARGET_CY8CKIT-062S2-43012/cybsp.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_connectivity_bt.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_qspi_memslot.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c",
+ "./configs/GeneratedSource/cycfg.c",
+ "./configs/GeneratedSource/cycfg_clocks.c",
+ "./configs/GeneratedSource/cycfg_connectivity_bt.c",
+ "./configs/GeneratedSource/cycfg_peripherals.c",
+ "./configs/GeneratedSource/cycfg_pins.c",
+ "./configs/GeneratedSource/cycfg_qspi_memslot.c",
+ "./configs/GeneratedSource/cycfg_routing.c",
+ "./configs/GeneratedSource/cycfg_system.c",
"./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c",
- "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_freertos_helpers.c",
- "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_rtos_freertos.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/src/bootutil_misc.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/cy_flash_map.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/cy_flash_psoc6.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/flash_qspi/flash_qspi.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/mem_config/mem_config_sfdp.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/ota_flash_map.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/ota_flash_xip_map.c",
- "./libs/bluetooth-freertos/firmware/COMPONENT_43012/COMPONENT_MURATA-1LV/COMPONENT_HCI-UART/w_bt_firmware_controller.c",
- "./libs/clib-support/COMPONENT_FREERTOS/cy_mutex_pool.c",
+ "./libs/btstack-integration/COMPONENT_HCI-UART/firmware/COMPONENT_43012/COMPONENT_MURATA-1LV/w_bt_firmware_controller.c",
"./libs/connectivity-utilities/network/COMPONENT_LWIP/cy_nw_helper.c",
- "./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/port.c",
"./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_104_m_csp_ble.c",
"./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_104_m_csp_ble_usb.c",
"./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_116_bga_ble.c",
@@ -613,10 +614,10 @@
"./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c",
"./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c",
"./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_01_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_02_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_03_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_04_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_01_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_02_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_03_cm0p_sleep.c",
+ "./libs/cat1cm0p/COMPONENT_CAT1A/COMPONENT_CM0P_SLEEP/psoc6_04_cm0p_sleep.c",
"./libs/secure-sockets/source/COMPONENT_LWIP/cy_secure_sockets.c",
"./libs/secure-sockets/source/COMPONENT_MBEDTLS/cy_tls.c",
"./libs/secure-sockets/source/COMPONENT_MBEDTLS/iot_crypto.c",
@@ -627,12 +628,11 @@
"./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm/COMPONENT_43012/43012C0-mfgtest_clm_blob.c",
"./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm/COMPONENT_43012/43012C0_clm_blob.c",
"./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012/43012C0-mfgtest_bin.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012/43012C0_bin.c",
- "./arch/sys_arch.c"
+ "./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012/43012C0_bin.c"
],
"cxx_source": [],
"asm_source": [
- "./libs/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S",
+ "./libs/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_ext.S",
"./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S"
],
"libs": [
diff --git a/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Release/GCC_ARM.json b/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Release/GCC_ARM.json
deleted file mode 100644
index 917160ac8f83e7..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/build/CY8CKIT-062S2-43012/Release/GCC_ARM.json
+++ /dev/null
@@ -1,642 +0,0 @@
-{
- "cflags": [
- "-Wall",
- "-Werror=all",
- "-Wno-error=unused-function",
- "-Wno-error=unused-but-set-variable",
- "-Wno-error=unused-variable",
- "-Wno-error=deprecated-declarations",
- "-Wextra",
- "-Wno-unused-parameter",
- "-Wno-sign-compare",
- "-Wno-shadow",
- "-Wno-maybe-uninitialized",
- "-Wno-incompatible-pointer-types",
- "-Wno-type-limits",
- "-Wno-conversion",
- "-c",
- "-mcpu=cortex-m4",
- "--specs=nano.specs",
- "-Os",
- "-mfloat-abi=softfp",
- "-mfpu=fpv4-sp-d16",
- "-mthumb",
- "-ffunction-sections",
- "-fdata-sections",
- "-ffat-lto-objects",
- "-g",
- "-Wall"
- ],
- "cxxflags": [
- "-c",
- "-mcpu=cortex-m4",
- "--specs=nano.specs",
- "-Os",
- "-mfloat-abi=softfp",
- "-mfpu=fpv4-sp-d16",
- "-mthumb",
- "-ffunction-sections",
- "-fdata-sections",
- "-ffat-lto-objects",
- "-g",
- "-Wall",
- "-fno-rtti",
- "-fno-exceptions"
- ],
- "asflags": [
- "-c",
- "-mcpu=cortex-m4",
- "--specs=nano.specs",
- "-mfloat-abi=softfp",
- "-mfpu=fpv4-sp-d16",
- "-mthumb",
- "-ffunction-sections",
- "-fdata-sections",
- "-ffat-lto-objects",
- "-g",
- "-Wall"
- ],
- "ldflags": [
- "-mcpu=cortex-m4",
- "--specs=nano.specs",
- "-mfloat-abi=softfp",
- "-mfpu=fpv4-sp-d16",
- "-mthumb",
- "-ffunction-sections",
- "-fdata-sections",
- "-ffat-lto-objects",
- "-g",
- "-Wall",
- "-Wl,--gc-sections",
- "-T./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld"
- ],
- "includes": [
- "-I./configs",
- "-I.",
- "-I./arch",
- "-I./configs",
- "-I./libs",
- "-I./libs/TARGET_CY8CKIT-062S2-43012",
- "-I./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS",
- "-I./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource",
- "-I./libs/TARGET_CY8CKIT-062S2-43012/bluetooth",
- "-I./libs/abstraction-rtos",
- "-I./libs/abstraction-rtos/include",
- "-I./libs/abstraction-rtos/include/COMPONENT_FREERTOS",
- "-I./libs/abstraction-rtos/include/Template",
- "-I./libs/anycloud-ota",
- "-I./libs/anycloud-ota/include",
- "-I./libs/anycloud-ota/source",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/include",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/include/bootutil",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/src",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/flash_qspi",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/include",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/include/flash_map_backend",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/mem_config",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/mcuboot_header",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/mcuboot_header/mcuboot_config",
- "-I./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/sysflash",
- "-I./libs/anycloud-ota/source/port_support",
- "-I./libs/anycloud-ota/source/port_support/serial_flash",
- "-I./libs/anycloud-ota/source/port_support/untar",
- "-I./libs/bluetooth-freertos",
- "-I./libs/bluetooth-freertos/platform",
- "-I./libs/bluetooth-freertos/platform/common",
- "-I./libs/bluetooth-freertos/platform/debug",
- "-I./libs/bluetooth-freertos/platform/include",
- "-I./libs/btstack",
- "-I./libs/btstack/wiced_include",
- "-I./libs/clib-support",
- "-I./libs/clib-support/TOOLCHAIN_GCC_ARM",
- "-I./libs/connectivity-utilities",
- "-I./libs/connectivity-utilities/JSON_parser",
- "-I./libs/connectivity-utilities/cy_log",
- "-I./libs/connectivity-utilities/cy_string",
- "-I./libs/connectivity-utilities/linked_list",
- "-I./libs/connectivity-utilities/network",
- "-I./libs/core-lib",
- "-I./libs/core-lib/include",
- "-I./libs/freertos",
- "-I./libs/freertos/Source",
- "-I./libs/freertos/Source/include",
- "-I./libs/freertos/Source/portable",
- "-I./libs/freertos/Source/portable/COMPONENT_CM4",
- "-I./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM",
- "-I./libs/kv-store",
- "-I./libs/lwip",
- "-I./libs/lwip/src",
- "-I./libs/lwip/src/include",
- "-I./libs/lwip/src/include/lwip/apps",
- "-I./libs/lwip/src/include/lwip/priv",
- "-I./libs/lwip/src/include/lwip/prot",
- "-I./libs/lwip/src/include/netif",
- "-I./libs/lwip/src/include/netif/ppp",
- "-I./libs/lwip/src/include/netif/ppp/polarssl",
- "-I./libs/mbedtls",
- "-I./libs/mbedtls/include",
- "-I./libs/mbedtls/include/mbedtls",
- "-I./libs/mbedtls/include/psa",
- "-I./libs/mbedtls/library",
- "-I./libs/mtb-hal-cat1",
- "-I./libs/mtb-hal-cat1/COMPONENT_CAT1A",
- "-I./libs/mtb-hal-cat1/COMPONENT_CAT1A/include",
- "-I./libs/mtb-hal-cat1/COMPONENT_CAT1A/include/pin_packages",
- "-I./libs/mtb-hal-cat1/COMPONENT_CAT1A/include/triggers",
- "-I./libs/mtb-hal-cat1/include",
- "-I./libs/mtb-hal-cat1/include_pvt",
- "-I./libs/mtb-hal-cat1/source",
- "-I./libs/mtb-pdl-cat1",
- "-I./libs/mtb-pdl-cat1/cmsis",
- "-I./libs/mtb-pdl-cat1/cmsis/include",
- "-I./libs/mtb-pdl-cat1/devices",
- "-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A",
- "-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include",
- "-I./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip",
- "-I./libs/mtb-pdl-cat1/drivers",
- "-I./libs/mtb-pdl-cat1/drivers/include",
- "-I./libs/retarget-io",
- "-I./libs/secure-sockets",
- "-I./libs/secure-sockets/include",
- "-I./libs/secure-sockets/include/COMPONENT_FREERTOS",
- "-I./libs/secure-sockets/source",
- "-I./libs/serial-flash",
- "-I./libs/whd-bsp-integration",
- "-I./libs/wifi-connection-manager",
- "-I./libs/wifi-connection-manager/include",
- "-I./libs/wifi-connection-manager/source",
- "-I./libs/wifi-connection-manager/source/COMPONENT_43012",
- "-I./libs/wifi-connection-manager/source/COMPONENT_MBEDTLS",
- "-I./libs/wifi-host-driver",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/inc",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm/COMPONENT_43012",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/nvram",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/nvram/COMPONENT_43012",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/nvram/COMPONENT_43012/COMPONENT_MURATA-1LV",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/resources/resource_imp",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/src",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols",
- "-I./libs/wifi-host-driver/WiFi_Host_Driver/src/include",
- "-I./libs/lwip-network-interface-integration",
- "-I./libs/lwip-network-interface-integration/source",
- "-I./libs/lwip-network-interface-integration/include",
- "-I./ota/config"
- ],
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- "-DMBEDTLS_USER_CONFIG_FILE=<mbedtls_user_config.h>",
- "-DCYBSP_WIFI_CAPABLE",
- "-DCY_RETARGET_IO_CONVERT_LF_TO_CRLF",
- "-DCY_RTOS_AWARE",
- "-DPSOC_062_2M",
- "-DCY_USING_HAL",
- "-DCY_APPNAME_mtb_chip_sdk",
- "-DCY8C624ABZI_S2D44",
- "-DCY_TARGET_DEVICE=CY8C624ABZI_S2D44",
- "-DTARGET_CY8CKIT_062S2_43012",
- "-DCY_TARGET_BOARD=CY8CKIT_062S2_43012",
- "-DCOMPONENT_43012",
- "-DCOMPONENT_BSP_DESIGN_MODUS",
- "-DCOMPONENT_CAT1",
- "-DCOMPONENT_CAT1A",
- "-DCOMPONENT_CM0P_SLEEP",
- "-DCOMPONENT_CM4",
- "-DCOMPONENT_CY8CKIT_062S2_43012",
- "-DCOMPONENT_FREERTOS",
- "-DCOMPONENT_HCI_UART",
- "-DCOMPONENT_LWIP",
- "-DCOMPONENT_MBEDTLS",
- "-DCOMPONENT_MURATA_1LV",
- "-DCOMPONENT_OTA_MCUBOOT_PSOC",
- "-DCOMPONENT_PSOC6HAL",
- "-DCOMPONENT_RTOS_AWARE",
- "-DCOMPONENT_SOFTFP",
- "-DCOMPONENT_WICED_BLE",
- "-DNDEBUG",
- "-DCY_SUPPORTS_DEVICE_VALIDATION",
- "-DCY_CRYPTO_HAL_DISABLE",
- "-DCOMPONENT_SECURE_SOCKETS",
- "-DCOMPONENT_PSOC6_FREERTOS",
- "-DOPTIGA_LIB_EXTERNAL=<optiga_lib_config_mtb.h>"
- ],
- "c_source": [
- "./libs/abstraction-rtos/source/cy_worker_thread.c",
- "./libs/anycloud-ota/source/port_support/serial_flash/ota_serial_flash.c",
- "./libs/bluetooth-freertos/platform/common/cybt_hci_rx_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_hci_tx_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_host_stack_platform_interface.c",
- "./libs/bluetooth-freertos/platform/common/cybt_patchram_download.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_main.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_task.c",
- "./libs/bluetooth-freertos/platform/common/cybt_platform_trace.c",
- "./libs/bluetooth-freertos/platform/common/cybt_prm.c",
- "./libs/bluetooth-freertos/platform/debug/cybt_debug_uart.c",
- "./libs/bluetooth-freertos/platform/freertos/cybt_platform_freertos.c",
- "./libs/clib-support/cy_time.c",
- "./libs/connectivity-utilities/JSON_parser/cy_json_parser.c",
- "./libs/connectivity-utilities/cy_log/cy_log.c",
- "./libs/connectivity-utilities/cy_string/cy_string_utils.c",
- "./libs/connectivity-utilities/linked_list/cy_linked_list.c",
- "./libs/connectivity-utilities/network/cy_nw_helper_common.c",
- "./libs/freertos/Source/croutine.c",
- "./libs/freertos/Source/event_groups.c",
- "./libs/freertos/Source/list.c",
- "./libs/freertos/Source/portable/MemMang/heap_1.c",
- "./libs/freertos/Source/portable/MemMang/heap_2.c",
- "./libs/freertos/Source/portable/MemMang/heap_3.c",
- "./libs/freertos/Source/portable/MemMang/heap_4.c",
- "./libs/freertos/Source/portable/MemMang/heap_5.c",
- "./libs/freertos/Source/queue.c",
- "./libs/freertos/Source/stream_buffer.c",
- "./libs/freertos/Source/tasks.c",
- "./libs/freertos/Source/timers.c",
- "./libs/kv-store/mtb_kvstore.c",
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- "./libs/lwip/src/api/api_msg.c",
- "./libs/lwip/src/api/err.c",
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- "./libs/lwip/src/api/netdb.c",
- "./libs/lwip/src/api/netifapi.c",
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- "./libs/lwip/src/api/tcpip.c",
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- "./libs/lwip/src/core/altcp_alloc.c",
- "./libs/lwip/src/core/altcp_tcp.c",
- "./libs/lwip/src/core/def.c",
- "./libs/lwip/src/core/dns.c",
- "./libs/lwip/src/core/inet_chksum.c",
- "./libs/lwip/src/core/init.c",
- "./libs/lwip/src/core/ip.c",
- "./libs/lwip/src/core/ipv4/autoip.c",
- "./libs/lwip/src/core/ipv4/dhcp.c",
- "./libs/lwip/src/core/ipv4/etharp.c",
- "./libs/lwip/src/core/ipv4/icmp.c",
- "./libs/lwip/src/core/ipv4/igmp.c",
- "./libs/lwip/src/core/ipv4/ip4.c",
- "./libs/lwip/src/core/ipv4/ip4_addr.c",
- "./libs/lwip/src/core/ipv4/ip4_frag.c",
- "./libs/lwip/src/core/ipv6/dhcp6.c",
- "./libs/lwip/src/core/ipv6/ethip6.c",
- "./libs/lwip/src/core/ipv6/icmp6.c",
- "./libs/lwip/src/core/ipv6/inet6.c",
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- "./libs/lwip/src/core/pbuf.c",
- "./libs/lwip/src/core/raw.c",
- "./libs/lwip/src/core/stats.c",
- "./libs/lwip/src/core/sys.c",
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- "./libs/lwip/src/core/tcp_in.c",
- "./libs/lwip/src/core/tcp_out.c",
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- "./libs/lwip/src/core/udp.c",
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- "./libs/lwip/src/netif/ethernet.c",
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- "./libs/mbedtls/library/arc4.c",
- "./libs/mbedtls/library/aria.c",
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- "./libs/mbedtls/library/cipher_wrap.c",
- "./libs/mbedtls/library/cmac.c",
- "./libs/mbedtls/library/ctr_drbg.c",
- "./libs/mbedtls/library/debug.c",
- "./libs/mbedtls/library/des.c",
- "./libs/mbedtls/library/dhm.c",
- "./libs/mbedtls/library/ecdh.c",
- "./libs/mbedtls/library/ecdsa.c",
- "./libs/mbedtls/library/ecjpake.c",
- "./libs/mbedtls/library/ecp.c",
- "./libs/mbedtls/library/ecp_curves.c",
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- "./libs/mbedtls/library/entropy_poll.c",
- "./libs/mbedtls/library/error.c",
- "./libs/mbedtls/library/gcm.c",
- "./libs/mbedtls/library/havege.c",
- "./libs/mbedtls/library/hkdf.c",
- "./libs/mbedtls/library/hmac_drbg.c",
- "./libs/mbedtls/library/md.c",
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- "./libs/mbedtls/library/pkcs12.c",
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- "./libs/mbedtls/library/pkwrite.c",
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- "./libs/mbedtls/library/platform_util.c",
- "./libs/mbedtls/library/poly1305.c",
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- "./libs/mbedtls/library/psa_crypto_se.c",
- "./libs/mbedtls/library/psa_crypto_slot_management.c",
- "./libs/mbedtls/library/psa_crypto_storage.c",
- "./libs/mbedtls/library/psa_its_file.c",
- "./libs/mbedtls/library/ripemd160.c",
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- "./libs/mbedtls/library/rsa_internal.c",
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- "./libs/mbedtls/library/x509_create.c",
- "./libs/mbedtls/library/x509_crl.c",
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- "./libs/mbedtls/library/x509write_crt.c",
- "./libs/mbedtls/library/x509write_csr.c",
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- "./libs/mtb-hal-cat1/source/cyhal_adc_sar.c",
- "./libs/mtb-hal-cat1/source/cyhal_analog_common.c",
- "./libs/mtb-hal-cat1/source/cyhal_audio_common.c",
- "./libs/mtb-hal-cat1/source/cyhal_clock.c",
- "./libs/mtb-hal-cat1/source/cyhal_comp.c",
- "./libs/mtb-hal-cat1/source/cyhal_comp_ctb.c",
- "./libs/mtb-hal-cat1/source/cyhal_comp_lp.c",
- "./libs/mtb-hal-cat1/source/cyhal_crc.c",
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- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/resource_imp/whd_resources.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/whd_bus.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/whd_bus_common.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/whd_bus_m2m_protocol.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/whd_bus_sdio_protocol.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/whd_bus_spi_protocol.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_ap.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_buffer_api.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_cdc_bdc.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_chip.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_chip_constants.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_clm.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_debug.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_events.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_logging.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_management.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_network_if.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_resource_if.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_sdpcm.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_thread.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_utils.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi_api.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/src/whd_wifi_p2p.c",
- "./libs/lwip-network-interface-integration/source/cy_network_mw_core.c",
- "./libs/lwip-network-interface-integration/source/cy_lwip_dhcp_server.c",
- "./libs/clib-support/TOOLCHAIN_GCC_ARM/cy_clib_support_newlib.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/bluetooth/cybsp_bt_config.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/cybsp.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_clocks.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_connectivity_bt.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_peripherals.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_pins.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_qspi_memslot.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_routing.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c",
- "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_freertos_helpers.c",
- "./libs/abstraction-rtos/source/COMPONENT_FREERTOS/cyabs_rtos_freertos.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/bootutil/src/bootutil_misc.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/cy_flash_map.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/cy_flash_psoc6.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/flash_qspi/flash_qspi.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/mem_config/mem_config_sfdp.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/ota_flash_map.c",
- "./libs/anycloud-ota/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/cy_flash_pal/ota_flash_xip_map.c",
- "./libs/bluetooth-freertos/firmware/COMPONENT_43012/COMPONENT_MURATA-1LV/COMPONENT_HCI-UART/w_bt_firmware_controller.c",
- "./libs/clib-support/COMPONENT_FREERTOS/cy_mutex_pool.c",
- "./libs/connectivity-utilities/network/COMPONENT_LWIP/cy_nw_helper.c",
- "./libs/freertos/Source/portable/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/port.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_104_m_csp_ble.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_104_m_csp_ble_usb.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_116_bga_ble.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_116_bga_usb.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_124_bga.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_124_bga_sip.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_43_smt.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_68_qfn_ble.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_01_80_wlcsp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_100_wlcsp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_128_tqfp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_68_qfn.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_03_100_tqfp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_03_49_wlcsp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_03_68_qfn.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_04_64_tqfp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_04_68_qfn.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_04_80_tqfp.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_01.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_03.c",
- "./libs/mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_04.c",
- "./libs/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_01_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_02_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_03_cm0p_sleep.c",
- "./libs/psoc6cm0p/COMPONENT_CM0P_SLEEP/psoc6_04_cm0p_sleep.c",
- "./libs/secure-sockets/source/COMPONENT_LWIP/cy_secure_sockets.c",
- "./libs/secure-sockets/source/COMPONENT_MBEDTLS/cy_tls.c",
- "./libs/secure-sockets/source/COMPONENT_MBEDTLS/iot_crypto.c",
- "./libs/whd-bsp-integration/COMPONENT_LWIP/cy_network_buffer_lwip.c",
- "./libs/wifi-connection-manager/source/cy_wcm.c",
- "./libs/wifi-connection-manager/source/COMPONENT_MBEDTLS/cy_wps_aes_ctr_ccm.c",
- "./libs/wifi-connection-manager/source/COMPONENT_MBEDTLS/cy_wps_crypto.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm/COMPONENT_43012/43012C0-mfgtest_clm_blob.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/clm/COMPONENT_43012/43012C0_clm_blob.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012/43012C0-mfgtest_bin.c",
- "./libs/wifi-host-driver/WiFi_Host_Driver/resources/firmware/COMPONENT_43012/43012C0_bin.c",
- "./arch/sys_arch.c"
- ],
- "cxx_source": [],
- "asm_source": [
- "./libs/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S",
- "./libs/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S"
- ],
- "libs": [
- "./libs/btstack/stack/COMPONENT_WICED_BLE/COMPONENT_CM4/COMPONENT_SOFTFP/TOOLCHAIN_GCC_ARM/libbtstack.a"
- ],
- "objs": []
-}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.c
new file mode 100644
index 00000000000000..ee208401b46edc
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.c
@@ -0,0 +1,50 @@
+/*******************************************************************************
+ * File Name: cycfg.c
+ *
+ * Description:
+ * Wrapper function to initialize all generated code.
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg.h"
+
+/* This function is provided for compatibility with older 2.X style projects. */
+void init_cycfg_all(void)
+{
+ cycfg_config_init();
+ cycfg_config_reservations();
+}
+void cycfg_config_init(void)
+{
+ init_cycfg_system();
+ init_cycfg_clocks();
+ init_cycfg_routing();
+ init_cycfg_peripherals();
+ init_cycfg_pins();
+}
+void cycfg_config_reservations(void)
+{
+ reserve_cycfg_system();
+ reserve_cycfg_clocks();
+ reserve_cycfg_pins();
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.h
new file mode 100644
index 00000000000000..14fd49c29027d6
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.h
@@ -0,0 +1,52 @@
+/*******************************************************************************
+ * File Name: cycfg.h
+ *
+ * Description:
+ * Simple wrapper header containing all generated files.
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_H)
+#define CYCFG_H
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include "cycfg_clocks.h"
+#include "cycfg_connectivity_bt.h"
+#include "cycfg_notices.h"
+#include "cycfg_peripherals.h"
+#include "cycfg_pins.h"
+#include "cycfg_routing.h"
+#include "cycfg_system.h"
+
+void init_cycfg_all(void);
+void cycfg_config_init(void);
+void cycfg_config_reservations(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.timestamp b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.timestamp
new file mode 100644
index 00000000000000..ef0be7a1d73ca9
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg.timestamp
@@ -0,0 +1,28 @@
+/*******************************************************************************
+* File Name: cycfg.timestamp
+*
+* Description:
+* Sentinel file for determining if generated source is up to date.
+* This file was automatically generated and should not be modified.
+* Configurator Backend 3.10.0
+* device-db 4.100.0.4304
+* mtb-pdl-cat1 3.9.0.29592
+*
+********************************************************************************
+* Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+* an affiliate of Cypress Semiconductor Corporation.
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.c
new file mode 100644
index 00000000000000..aad075c61d2607
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.c
@@ -0,0 +1,920 @@
+/*******************************************************************************
+ * File Name: cycfg_capsense.c
+ *
+ * Description:
+ * CAPSENSE Middleware configuration
+ * This file should not be modified. It was automatically generated by
+ * CAPSENSE Configurator 6.10.0.3796
+ *
+ ********************************************************************************
+ * Copyright 2024, Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+#include "cycfg_capsense.h"
+
+/* This enables code only when the CAPSENSE(TM) Middleware is present in the project
+ * or the information about the Middleware presence cannot be obtained.
+ */
+#if (defined(COMPONENT_MW_CAPSENSE) || !defined(COMPONENT_MW_CORE_MAKE))
+
+#if !defined(CY_DISABLE_CAPSENSE)
+
+#if (CY_CAPSENSE_CORE == __CORTEX_M)
+
+#ifndef CSD_CMODPADS_PORT
+#define CSD_CMODPADS_PORT 0xFF
+#endif
+#ifndef CSD_CMODPADS_PIN
+#define CSD_CMODPADS_PIN 0xFF
+#endif
+#ifndef CSD_CSH_TANKPADS_PORT
+#define CSD_CSH_TANKPADS_PORT 0xFF
+#endif
+#ifndef CSD_CSH_TANKPADS_PIN
+#define CSD_CSH_TANKPADS_PIN 0xFF
+#endif
+#ifndef CSD_CSHIELDPADS_PORT
+#define CSD_CSHIELDPADS_PORT 0xFF
+#endif
+#ifndef CSD_CSHIELDPADS_PIN
+#define CSD_CSHIELDPADS_PIN 0xFF
+#endif
+#ifndef CSD_VREF_EXT_PORT
+#define CSD_VREF_EXT_PORT 0xFF
+#endif
+#ifndef CSD_VREF_EXT_PIN
+#define CSD_VREF_EXT_PIN 0xFF
+#endif
+
+static cy_stc_capsense_internal_context_t cy_capsense_internalContext;
+
+#if (CY_CAPSENSE_MW_VERSION >= 400)
+static cy_stc_capsense_active_scan_sns_t cy_capsense_activeScanSns;
+#else
+static cy_stc_active_scan_sns_t cy_capsense_activeScanSns;
+#endif
+
+#if (CY_CAPSENSE_DEBOUNCE_SIZE > 0)
+static uint8_t cy_capsense_debounce[CY_CAPSENSE_DEBOUNCE_SIZE] = { 0 };
+#endif
+
+#if (CY_CAPSENSE_NOISE_ENVELOPE_SIZE > 0)
+static cy_stc_capsense_smartsense_csd_noise_envelope_t cy_capsense_noiseEnvelope[CY_CAPSENSE_NOISE_ENVELOPE_SIZE];
+#endif
+
+#if (CY_CAPSENSE_RAW_HISTORY_SIZE > 0)
+static uint16_t cy_capsense_rawFilterHistory[CY_CAPSENSE_RAW_HISTORY_SIZE] = { 0 };
+#endif
+
+#if (CY_CAPSENSE_RAW_ALP_HISTORY_SIZE > 0)
+static uint16_t cy_capsense_rawAlpFilterHistory[CY_CAPSENSE_RAW_ALP_HISTORY_SIZE] = { 0 };
+#endif
+
+#if (CY_CAPSENSE_IIR_HISTORY_LOW_SIZE > 0)
+static uint8_t cy_capsense_iirHistoryLow[CY_CAPSENSE_IIR_HISTORY_LOW_SIZE] = { 0 };
+#endif
+
+#if (CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE > 0)
+static cy_stc_capsense_position_t cy_capsense_positionFilterHistory[CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE];
+#endif
+
+#if (CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE > 0)
+static cy_stc_capsense_touch_t cy_capsense_touchFilterHistory[CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE] = {};
+#endif
+
+#if (CY_CAPSENSE_DIPLEX_SIZE > 0)
+static const uint8_t cy_capsense_diplexTable[CY_CAPSENSE_DIPLEX_SIZE] = {};
+#endif
+
+#if (CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE > 0)
+static uint16_t cy_capsense_csdTouchBuffer[CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE] = { 0 };
+#endif
+
+#if (CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE > 0)
+static cy_stc_capsense_csx_touch_buffer_t cy_capsense_csxTouchBuffer;
+#endif
+
+#if (CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE > 0)
+static cy_stc_capsense_csx_touch_history_t cy_capsense_csxTouchHistory[CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE] = {};
+#endif
+
+#if (CY_CAPSENSE_BALLISTIC_WIDGET_COUNT > 0)
+static cy_stc_capsense_ballistic_context_t cy_capsense_ballisticContext[CY_CAPSENSE_BALLISTIC_WIDGET_COUNT];
+#endif
+
+#if (CY_CAPSENSE_GESTURE_WIDGET_COUNT > 0)
+static cy_stc_capsense_gesture_context_t cy_capsense_gestureContext[CY_CAPSENSE_GESTURE_WIDGET_COUNT];
+#endif
+
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+#if (CY_CAPSENSE_BIST_EN != 0)
+static uint16_t cy_capsense_bslnInv[CY_CAPSENSE_SENSOR_COUNT * CY_CAPSENSE_MFS_CH_NUMBER];
+static uint32_t cy_capsense_eltdCap[CY_CAPSENSE_ELTD_COUNT];
+static uint16_t cy_capsense_wdgtCrc[CY_CAPSENSE_WIDGET_COUNT];
+#endif
+#endif
+
+static const cy_stc_capsense_common_config_t cy_capsense_commonConfig =
+{
+ .cpuClkHz = CY_CAPSENSE_CPU_CLK,
+ .periClkHz = CY_CAPSENSE_PERI_CLK,
+ .vdda = CY_CAPSENSE_VDDA_MV,
+ .numPin = CY_CAPSENSE_PIN_COUNT,
+ .numSns = CY_CAPSENSE_SENSOR_COUNT,
+ .numWd = CY_CAPSENSE_TOTAL_WIDGET_COUNT,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdEn = CY_CAPSENSE_ENABLE,
+ .csxEn = CY_CAPSENSE_ENABLE,
+#if (CY_CAPSENSE_MW_VERSION < 300)
+ .mfsEn = CY_CAPSENSE_DISABLE,
+#endif
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+ .bistEn = CY_CAPSENSE_DISABLE,
+#endif
+ .positionFilterEn = CY_CAPSENSE_DISABLE,
+#endif
+ .periDividerType = (uint8_t)CY_CAPSENSE_PERI_DIV_TYPE,
+ .periDividerIndex = CY_CAPSENSE_PERI_DIV_INDEX,
+ .analogWakeupDelay = 25u,
+ .ssIrefSource = CY_CAPSENSE_IREF_SRSS,
+ .ssVrefSource = CY_CAPSENSE_VREF_SRSS,
+ .proxTouchCoeff = 300u,
+ .swSensorAutoResetEn = CY_CAPSENSE_DISABLE,
+ .portCmodPadNum = CSD_CMODPADS_PORT,
+ .pinCmodPad = CSD_CMODPADS_PIN,
+ .portCshPadNum = CSD_CSH_TANKPADS_PORT,
+ .pinCshPad = CSD_CSH_TANKPADS_PIN,
+ .portShieldPadNum = CSD_CSHIELDPADS_PORT,
+ .pinShieldPad = CSD_CSHIELDPADS_PIN,
+ .portVrefExtPadNum = CSD_VREF_EXT_PORT,
+ .pinVrefExtPad = CSD_VREF_EXT_PIN,
+ .portCmodNum = Cmod_PORT_NUM,
+ .idacGainTable = {
+ {0x01000000u, 37500u},
+ {0x03000000u, 75000u},
+ {0x01400000u, 300000u},
+ {0x03400000u, 600000u},
+ {0x01800000u, 2400000u},
+ {0x03800000u, 4800000u},
+ },
+ .ptrCsdBase = CSD0,
+ .ptrCsdContext = &cy_csd_0_context,
+ .portCmod = Cmod_PORT,
+ .portCsh = NULL,
+ .portCintA = CintA_PORT,
+ .portCintB = CintB_PORT,
+ .pinCmod = Cmod_PIN,
+ .portCshNum = 0u,
+ .pinCsh = 0u,
+ .pinCintA = CintA_PIN,
+ .pinCintB = CintB_PIN,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdShieldEn = CY_CAPSENSE_DISABLE,
+#endif
+ .csdInactiveSnsConnection = CY_CAPSENSE_SNS_CONNECTION_GROUND,
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .csxInactiveSnsConnection = CY_CAPSENSE_SNS_CONNECTION_GROUND,
+#endif
+ .csdShieldDelay = CY_CAPSENSE_SH_DELAY_0NS,
+ .csdVref = 0u,
+ .csdRConst = 1000u,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdCTankShieldEn = CY_CAPSENSE_DISABLE,
+#endif
+ .csdShieldNumPin = 0u,
+ .csdShieldSwRes = CY_CAPSENSE_SHIELD_SW_RES_MEDIUM,
+ .csdInitSwRes = CY_CAPSENSE_INIT_SW_RES_MEDIUM,
+ .csdChargeTransfer = CY_CAPSENSE_IDAC_SOURCING,
+ .csdRawTarget = 85u,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdAutotuneEn = CY_CAPSENSE_CSD_SS_HWTH_EN,
+ .csdIdacAutocalEn = CY_CAPSENSE_ENABLE,
+ .csdIdacAutoGainEn = CY_CAPSENSE_ENABLE,
+#endif
+ .csdCalibrationError = 10u,
+ .csdIdacGainInitIndex = 4u,
+ .csdIdacMin = 20u,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdIdacCompEn = CY_CAPSENSE_ENABLE,
+#endif
+ .csdFineInitTime = 10u,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csdIdacRowColAlignEn = CY_CAPSENSE_ENABLE,
+#endif
+ .csdMfsDividerOffsetF1 = 1u,
+ .csdMfsDividerOffsetF2 = 2u,
+ .csxRawTarget = 40u,
+#if (CY_CAPSENSE_MW_VERSION < 400)
+ .csxIdacGainInitIndex = 2u,
+ .csxIdacAutocalEn = CY_CAPSENSE_ENABLE,
+#endif
+ .csxCalibrationError = 20u,
+ .csxFineInitTime = 10u,
+ .csxInitSwRes = CY_CAPSENSE_INIT_SW_RES_MEDIUM,
+ .csxScanSwRes = CY_CAPSENSE_INIT_SW_RES_LOW,
+ .csxInitShieldSwRes = CY_CAPSENSE_SHIELD_SW_RES_MEDIUM,
+ .csxScanShieldSwRes = CY_CAPSENSE_SHIELD_SW_RES_LOW,
+ .csxMfsDividerOffsetF1 = 1u,
+ .csxMfsDividerOffsetF2 = 2u,
+};
+
+#if (CY_CAPSENSE_MW_VERSION < 300)
+static const cy_stc_capsense_fptr_config_t cy_capsense_fptrConfig = {
+#if (CY_CAPSENSE_CSD_EN == 0)
+ .fptrCSDSetupWidget = NULL,
+ .fptrCSDScan = NULL,
+ .fptrDpProcessCsdWidgetRawCounts = NULL,
+ .fptrDpProcessCsdWidgetStatus = NULL,
+ .fptrCSDDisableMode = NULL,
+ .fptrCSDInitialize = NULL,
+ .fptrCSDScanISR = NULL,
+#else
+ .fptrCSDSetupWidget = &Cy_CapSense_CSDSetupWidget,
+ .fptrCSDScan = &Cy_CapSense_CSDScan,
+ .fptrDpProcessCsdWidgetRawCounts = &Cy_CapSense_DpProcessCsdWidgetRawCounts,
+ .fptrDpProcessCsdWidgetStatus = &Cy_CapSense_DpProcessCsdWidgetStatus,
+ .fptrCSDDisableMode = &Cy_CapSense_CSDDisableMode,
+ .fptrCSDInitialize = &Cy_CapSense_CSDInitialize,
+ .fptrCSDScanISR = &Cy_CapSense_CSDScanISR,
+#endif
+
+#if (CY_CAPSENSE_CSX_EN == 0)
+ .fptrCSXSetupWidget = NULL,
+ .fptrCSXScan = NULL,
+ .fptrDpProcessCsxWidgetRawCounts = NULL,
+ .fptrDpProcessCsxWidgetStatus = NULL,
+ .fptrCSXInitialize = NULL,
+ .fptrCSXDisableMode = NULL,
+ .fptrCSXScanISR = NULL,
+#else
+ .fptrCSXSetupWidget = &Cy_CapSense_CSXSetupWidget,
+ .fptrCSXScan = &Cy_CapSense_CSXScan,
+ .fptrDpProcessCsxWidgetRawCounts = &Cy_CapSense_DpProcessCsxWidgetRawCounts,
+ .fptrDpProcessCsxWidgetStatus = &Cy_CapSense_DpProcessCsxWidgetStatus,
+ .fptrCSXInitialize = &Cy_CapSense_CSXInitialize,
+ .fptrCSXDisableMode = &Cy_CapSense_CSXDisableMode,
+ .fptrCSXScanISR = &Cy_CapSense_CSXScanISR,
+#endif
+
+#if (CY_CAPSENSE_ADAPTIVE_FILTER_EN == 0)
+ .fptrAdaptiveFilterInitializeLib = NULL,
+ .fptrAdaptiveFilterRunLib = NULL,
+#else
+ .fptrAdaptiveFilterInitializeLib = &Cy_CapSense_AdaptiveFilterInitialize_Lib,
+ .fptrAdaptiveFilterRunLib = &Cy_CapSense_AdaptiveFilterRun_Lib,
+#endif
+
+#if (CY_CAPSENSE_BALLISTIC_MULTIPLIER_EN == 0)
+ .fptrBallisticMultiplierLib = NULL,
+#else
+ .fptrBallisticMultiplierLib = &Cy_CapSense_BallisticMultiplier_Lib,
+#endif
+
+#if (CY_CAPSENSE_RAWCOUNT_FILTER_EN == 0)
+ .fptrInitializeAllFilters = NULL,
+ .fptrFtRunEnabledFiltersInternal = NULL,
+#else
+ .fptrInitializeAllFilters = &Cy_CapSense_InitializeAllFilters,
+ .fptrFtRunEnabledFiltersInternal = &Cy_CapSense_FtRunEnabledFiltersInternal,
+#endif
+
+#if (CY_CAPSENSE_CSD_POSITION_FILTER_EN == 0)
+ .fptrProcessPositionFilters = NULL,
+#else
+ .fptrProcessPositionFilters = &Cy_CapSense_ProcessPositionFilters,
+#endif
+
+#if ((CY_CAPSENSE_CSX_POSITION_FILTER_EN == 0) && (CY_CAPSENSE_CSD_POSITION_FILTER_EN == 0))
+ .fptrRunPositionFilters = NULL,
+ .fptrInitPositionFilters = NULL,
+#else
+ .fptrRunPositionFilters = &Cy_CapSense_RunPositionFilters,
+ .fptrInitPositionFilters = &Cy_CapSense_InitPositionFilters,
+#endif
+
+#if ((CY_CAPSENSE_CSD_BUTTON_EN == 0) && (CY_CAPSENSE_CSX_BUTTON_EN == 0) && (CY_CAPSENSE_CSX_MATRIX_EN == 0))
+ .fptrDpProcessButton = NULL,
+#else
+ .fptrDpProcessButton = &Cy_CapSense_DpProcessButton,
+#endif
+
+#if ((CY_CAPSENSE_CSD_SLIDER_EN == 0) && (CY_CAPSENSE_CSX_SLIDER_EN == 0))
+ .fptrDpProcessSlider = NULL,
+#else
+ .fptrDpProcessSlider = &Cy_CapSense_DpProcessSlider,
+#endif
+
+#if (CY_CAPSENSE_CSD_MATRIX_EN == 0)
+ .fptrDpProcessCsdMatrix = NULL,
+#else
+ .fptrDpProcessCsdMatrix = &Cy_CapSense_DpProcessCsdMatrix,
+#endif
+
+#if (CY_CAPSENSE_CSD_TOUCHPAD_EN == 0)
+ .fptrDpProcessCsdTouchpad = NULL,
+#else
+ .fptrDpProcessCsdTouchpad = &Cy_CapSense_DpProcessCsdTouchpad,
+#endif
+
+#if (CY_CAPSENSE_CSD_PROXIMITY_EN == 0)
+ .fptrDpProcessProximity = NULL,
+#else
+ .fptrDpProcessProximity = &Cy_CapSense_DpProcessProximity,
+#endif
+
+#if (CY_CAPSENSE_CSX_TOUCHPAD_EN == 0)
+ .fptrDpProcessCsxTouchpad = NULL,
+#else
+ .fptrDpProcessCsxTouchpad = &Cy_CapSense_DpProcessCsxTouchpad,
+#endif
+
+#if (CY_CAPSENSE_ADVANCED_CENTROID_5X5_EN == 0)
+ .fptrDpAdvancedCentroidTouchpad = NULL,
+#else
+ .fptrDpAdvancedCentroidTouchpad = &Cy_CapSense_DpAdvancedCentroidTouchpad,
+#endif
+
+#if ((CY_CAPSENSE_CSD_CALIBRATION_EN == 0) && (CY_CAPSENSE_SMARTSENSE_FULL_EN == 0))
+ .fptrCSDCalibrateWidget = NULL,
+ .fptrCalibrateAllCsdWidgets = NULL,
+#else
+ .fptrCSDCalibrateWidget = &Cy_CapSense_CSDCalibrateWidget,
+ .fptrCalibrateAllCsdWidgets = &Cy_CapSense_CalibrateAllCsdWidgets,
+#endif
+
+#if (CY_CAPSENSE_CSX_CALIBRATION_EN == 0)
+ .fptrCalibrateAllCsxWidgets = NULL,
+#else
+ .fptrCalibrateAllCsxWidgets = &Cy_CapSense_CalibrateAllCsxWidgets,
+#endif
+
+#if (CY_CAPSENSE_SMARTSENSE_FULL_EN == 0)
+ .fptrRunNoiseEnvelopeLib = NULL,
+ .fptrDpUpdateThresholds = NULL,
+ .fptrInitializeNoiseEnvelopeLib = NULL,
+#else
+ .fptrRunNoiseEnvelopeLib = &Cy_CapSense_RunNoiseEnvelope_Lib,
+ .fptrDpUpdateThresholds = &Cy_CapSense_DpUpdateThresholds,
+ .fptrInitializeNoiseEnvelopeLib = &Cy_CapSense_InitializeNoiseEnvelope_Lib,
+#endif
+
+#if ((CY_CAPSENSE_SMARTSENSE_HW_EN == 0) && (CY_CAPSENSE_SMARTSENSE_FULL_EN == 0))
+ .fptrSsAutoTune = NULL,
+#else
+ .fptrSsAutoTune = &Cy_CapSense_SsAutoTune,
+#endif
+
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+#if (CY_CAPSENSE_BIST_EN == 0)
+ .fptrBistInitialize = NULL,
+ .fptrBistDisableMode = NULL,
+ .fptrBistDsInitialize = NULL,
+#else
+ .fptrBistInitialize = &Cy_CapSense_BistInitialize,
+ .fptrBistDisableMode = &Cy_CapSense_BistDisableMode,
+ .fptrBistDsInitialize = &Cy_CapSense_BistDsInitialize,
+#endif
+#endif
+};
+#endif
+
+static const cy_stc_capsense_pin_config_t cy_capsense_pinConfig[CY_CAPSENSE_PIN_COUNT] = {
+ {
+ /* Button0_Rx0 */
+ Button0_Rx0_PORT,
+ Button0_Rx0_PIN,
+ },
+ {
+ /* Button0_Tx */
+ Button0_Tx_PORT,
+ Button0_Tx_PIN,
+ },
+ {
+ /* Button1_Rx0 */
+ Button1_Rx0_PORT,
+ Button1_Rx0_PIN,
+ },
+ {
+ /* Button1_Tx */
+ Button1_Tx_PORT,
+ Button1_Tx_PIN,
+ },
+ {
+ /* LinearSlider0_Sns0 */
+ LinearSlider0_Sns0_PORT,
+ LinearSlider0_Sns0_PIN,
+ },
+ {
+ /* LinearSlider0_Sns1 */
+ LinearSlider0_Sns1_PORT,
+ LinearSlider0_Sns1_PIN,
+ },
+ {
+ /* LinearSlider0_Sns2 */
+ LinearSlider0_Sns2_PORT,
+ LinearSlider0_Sns2_PIN,
+ },
+ {
+ /* LinearSlider0_Sns3 */
+ LinearSlider0_Sns3_PORT,
+ LinearSlider0_Sns3_PIN,
+ },
+ {
+ /* LinearSlider0_Sns4 */
+ LinearSlider0_Sns4_PORT,
+ LinearSlider0_Sns4_PIN,
+ },
+};
+
+#if (CY_CAPSENSE_SHIELD_PIN_COUNT > 0)
+static const cy_stc_capsense_pin_config_t cy_capsense_shieldPinConfig[CY_CAPSENSE_SHIELD_PIN_COUNT] = {};
+#endif
+
+#if (CY_CAPSENSE_ELTD_COUNT > 0)
+static const cy_stc_capsense_electrode_config_t cy_capsense_electrodeConfig[CY_CAPSENSE_ELTD_COUNT] = {
+ {
+ /* Button0_Rx0 */
+ .ptrPin = &cy_capsense_pinConfig[0u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_MUT_RX_E,
+ .numPins = 1u,
+ },
+ {
+ /* Button0_Tx */
+ .ptrPin = &cy_capsense_pinConfig[1u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_MUT_TX_E,
+ .numPins = 1u,
+ },
+ {
+ /* Button1_Rx0 */
+ .ptrPin = &cy_capsense_pinConfig[2u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_MUT_RX_E,
+ .numPins = 1u,
+ },
+ {
+ /* Button1_Tx */
+ .ptrPin = &cy_capsense_pinConfig[3u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_MUT_TX_E,
+ .numPins = 1u,
+ },
+ {
+ /* LinearSlider0_Sns0 */
+ .ptrPin = &cy_capsense_pinConfig[4u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_SELF_E,
+ .numPins = 1u,
+ },
+ {
+ /* LinearSlider0_Sns1 */
+ .ptrPin = &cy_capsense_pinConfig[5u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_SELF_E,
+ .numPins = 1u,
+ },
+ {
+ /* LinearSlider0_Sns2 */
+ .ptrPin = &cy_capsense_pinConfig[6u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_SELF_E,
+ .numPins = 1u,
+ },
+ {
+ /* LinearSlider0_Sns3 */
+ .ptrPin = &cy_capsense_pinConfig[7u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_SELF_E,
+ .numPins = 1u,
+ },
+ {
+ /* LinearSlider0_Sns4 */
+ .ptrPin = &cy_capsense_pinConfig[8u],
+ .type = (uint8_t) CY_CAPSENSE_ELTD_TYPE_SELF_E,
+ .numPins = 1u,
+ },
+};
+#endif
+
+static const cy_stc_capsense_widget_config_t cy_capsense_widgetConfig[CY_CAPSENSE_WIDGET_COUNT] =
+{
+ { /* Button0 */
+ .ptrWdContext = &cy_capsense_tuner.widgetContext[0u],
+ .ptrSnsContext = &cy_capsense_tuner.sensorContext[0u],
+ .ptrEltdConfig = &cy_capsense_electrodeConfig[0u],
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+ .ptrEltdCapacitance = NULL,
+ .ptrBslnInv = NULL,
+#endif
+ .ptrNoiseEnvelope = NULL,
+ .ptrRawFilterHistory = NULL,
+ .ptrRawFilterHistoryLow = NULL,
+ .iirCoeff = 128u,
+ .ptrDebounceArr = &cy_capsense_debounce[0u],
+ .ptrDiplexTable = NULL,
+ .centroidConfig = 0u,
+ .xResolution = 0u,
+ .yResolution = 0u,
+ .numSns = 1u,
+ .numCols = 1u,
+ .numRows = 1u,
+ .ptrPosFilterHistory = NULL,
+ .ptrCsxTouchHistory = NULL,
+ .ptrCsxTouchBuffer = NULL,
+ .ptrCsdTouchBuffer = NULL,
+ .ptrGestureConfig = NULL,
+ .ptrGestureContext = NULL,
+ .ballisticConfig = {
+ .accelCoeff = 9u,
+ .speedCoeff = 2u,
+ .divisorValue = 4u,
+ .speedThresholdX = 3u,
+ .speedThresholdY = 4u,
+ },
+ .ptrBallisticContext = NULL,
+ .aiirConfig = {
+ .maxK = 60u,
+ .minK = 1u,
+ .noMovTh = 3u,
+ .littleMovTh = 7u,
+ .largeMovTh = 12u,
+ .divVal = 64u,
+ },
+ .advConfig = {
+ .penultimateTh = 100u,
+ .virtualSnsTh = 100u,
+ .crossCouplingTh = 5u,
+ },
+ .posFilterConfig = 0u,
+ .rawFilterConfig = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 400)
+ .alpOnThreshold = 15u,
+ .alpOffThreshold = 5u,
+#endif
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .senseMethod = CY_CAPSENSE_CSX_GROUP,
+#else
+ .senseMethod = CY_CAPSENSE_SENSE_METHOD_CSX_E,
+#endif
+ .wdType = (uint8_t)CY_CAPSENSE_WD_BUTTON_E,
+ },
+ { /* Button1 */
+ .ptrWdContext = &cy_capsense_tuner.widgetContext[1u],
+ .ptrSnsContext = &cy_capsense_tuner.sensorContext[1u],
+ .ptrEltdConfig = &cy_capsense_electrodeConfig[2u],
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+ .ptrEltdCapacitance = NULL,
+ .ptrBslnInv = NULL,
+#endif
+ .ptrNoiseEnvelope = NULL,
+ .ptrRawFilterHistory = NULL,
+ .ptrRawFilterHistoryLow = NULL,
+ .iirCoeff = 128u,
+ .ptrDebounceArr = &cy_capsense_debounce[1u],
+ .ptrDiplexTable = NULL,
+ .centroidConfig = 0u,
+ .xResolution = 0u,
+ .yResolution = 0u,
+ .numSns = 1u,
+ .numCols = 1u,
+ .numRows = 1u,
+ .ptrPosFilterHistory = NULL,
+ .ptrCsxTouchHistory = NULL,
+ .ptrCsxTouchBuffer = NULL,
+ .ptrCsdTouchBuffer = NULL,
+ .ptrGestureConfig = NULL,
+ .ptrGestureContext = NULL,
+ .ballisticConfig = {
+ .accelCoeff = 9u,
+ .speedCoeff = 2u,
+ .divisorValue = 4u,
+ .speedThresholdX = 3u,
+ .speedThresholdY = 4u,
+ },
+ .ptrBallisticContext = NULL,
+ .aiirConfig = {
+ .maxK = 60u,
+ .minK = 1u,
+ .noMovTh = 3u,
+ .littleMovTh = 7u,
+ .largeMovTh = 12u,
+ .divVal = 64u,
+ },
+ .advConfig = {
+ .penultimateTh = 100u,
+ .virtualSnsTh = 100u,
+ .crossCouplingTh = 5u,
+ },
+ .posFilterConfig = 0u,
+ .rawFilterConfig = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 400)
+ .alpOnThreshold = 15u,
+ .alpOffThreshold = 5u,
+#endif
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .senseMethod = CY_CAPSENSE_CSX_GROUP,
+#else
+ .senseMethod = CY_CAPSENSE_SENSE_METHOD_CSX_E,
+#endif
+ .wdType = (uint8_t)CY_CAPSENSE_WD_BUTTON_E,
+ },
+ { /* LinearSlider0 */
+ .ptrWdContext = &cy_capsense_tuner.widgetContext[2u],
+ .ptrSnsContext = &cy_capsense_tuner.sensorContext[2u],
+ .ptrEltdConfig = &cy_capsense_electrodeConfig[4u],
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+ .ptrEltdCapacitance = NULL,
+ .ptrBslnInv = NULL,
+#endif
+ .ptrNoiseEnvelope = &cy_capsense_noiseEnvelope[0u],
+ .ptrRawFilterHistory = NULL,
+ .ptrRawFilterHistoryLow = NULL,
+ .iirCoeff = 128u,
+ .ptrDebounceArr = &cy_capsense_debounce[2u],
+ .ptrDiplexTable = NULL,
+ .centroidConfig = 1u,
+ .xResolution = 300u,
+ .yResolution = 0u,
+ .numSns = 5u,
+ .numCols = 5u,
+ .numRows = 0u,
+ .ptrPosFilterHistory = NULL,
+ .ptrCsxTouchHistory = NULL,
+ .ptrCsxTouchBuffer = NULL,
+ .ptrCsdTouchBuffer = NULL,
+ .ptrGestureConfig = NULL,
+ .ptrGestureContext = NULL,
+ .ballisticConfig = {
+ .accelCoeff = 9u,
+ .speedCoeff = 2u,
+ .divisorValue = 4u,
+ .speedThresholdX = 3u,
+ .speedThresholdY = 4u,
+ },
+ .ptrBallisticContext = NULL,
+ .aiirConfig = {
+ .maxK = 60u,
+ .minK = 1u,
+ .noMovTh = 3u,
+ .littleMovTh = 7u,
+ .largeMovTh = 12u,
+ .divVal = 64u,
+ },
+ .advConfig = {
+ .penultimateTh = 100u,
+ .virtualSnsTh = 100u,
+ .crossCouplingTh = 5u,
+ },
+ .posFilterConfig = 0u,
+ .rawFilterConfig = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 400)
+ .alpOnThreshold = 15u,
+ .alpOffThreshold = 5u,
+#endif
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .senseMethod = CY_CAPSENSE_CSD_GROUP,
+#else
+ .senseMethod = CY_CAPSENSE_SENSE_METHOD_CSD_E,
+#endif
+ .wdType = (uint8_t)CY_CAPSENSE_WD_LINEAR_SLIDER_E,
+ },
+};
+
+cy_stc_capsense_tuner_t cy_capsense_tuner =
+{
+ .commonContext = {
+#if (CY_CAPSENSE_MW_VERSION < 300)
+ .configId = 0x0990,
+#elif (CY_CAPSENSE_MW_VERSION < 400)
+ .configId = 0x0991,
+#else
+ .configId = 0x0992,
+#endif
+
+ .tunerCmd = 0u,
+ .scanCounter = 0u,
+ .tunerSt = 0u,
+ .initDone = 0u,
+#if (CY_CAPSENSE_MW_VERSION < 300)
+ .ptrSSCallback = NULL,
+ .ptrEOSCallback = NULL,
+ .ptrTunerSendCallback = NULL,
+ .ptrTunerReceiveCallback = NULL,
+#endif
+ .status = 0u,
+ .timestampInterval = 1u,
+ .timestamp = 0u,
+ .modCsdClk = 2u,
+ .modCsxClk = 2u,
+ .tunerCnt = 0u,
+ },
+ .widgetContext = {
+ { /* Button0 */
+ .fingerCap = 160u,
+ .sigPFC = 0u,
+ .resolution = 100u,
+ .maxRawCount = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .maxRawCountRow = 0u,
+#endif
+ .fingerTh = 100u,
+ .proxTh = 200u,
+ .lowBslnRst = 30u,
+ .snsClk = 32u,
+ .rowSnsClk = 16u,
+ .gestureDetected = 0u,
+ .gestureDirection = 0u,
+ .xDelta = 0,
+ .yDelta = 0,
+ .noiseTh = 40u,
+ .nNoiseTh = 40u,
+ .hysteresis = 10u,
+ .onDebounce = 3u,
+ .snsClkSource = CY_CAPSENSE_CLK_SOURCE_AUTO_MASK,
+ .idacMod = { 32u, 32u, 32u, },
+ .idacGainIndex = 2u,
+ .rowIdacMod = { 32u, 32u, 32u, },
+ .bslnCoeff = 1u,
+ .status = 0u,
+ .wdTouch = {
+ .ptrPosition = NULL,
+ .numPosition = 0,
+ },
+ },
+ { /* Button1 */
+ .fingerCap = 160u,
+ .sigPFC = 0u,
+ .resolution = 100u,
+ .maxRawCount = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .maxRawCountRow = 0u,
+#endif
+ .fingerTh = 100u,
+ .proxTh = 200u,
+ .lowBslnRst = 30u,
+ .snsClk = 32u,
+ .rowSnsClk = 16u,
+ .gestureDetected = 0u,
+ .gestureDirection = 0u,
+ .xDelta = 0,
+ .yDelta = 0,
+ .noiseTh = 40u,
+ .nNoiseTh = 40u,
+ .hysteresis = 10u,
+ .onDebounce = 3u,
+ .snsClkSource = CY_CAPSENSE_CLK_SOURCE_AUTO_MASK,
+ .idacMod = { 32u, 32u, 32u, },
+ .idacGainIndex = 2u,
+ .rowIdacMod = { 32u, 32u, 32u, },
+ .bslnCoeff = 1u,
+ .status = 0u,
+ .wdTouch = {
+ .ptrPosition = NULL,
+ .numPosition = 0,
+ },
+ },
+ { /* LinearSlider0 */
+ .fingerCap = 160u,
+ .sigPFC = 0u,
+ .resolution = 12u,
+ .maxRawCount = 0u,
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+ .maxRawCountRow = 0u,
+#endif
+ .fingerTh = 100u,
+ .proxTh = 200u,
+ .lowBslnRst = 30u,
+ .snsClk = 16u,
+ .rowSnsClk = 16u,
+ .gestureDetected = 0u,
+ .gestureDirection = 0u,
+ .xDelta = 0,
+ .yDelta = 0,
+ .noiseTh = 40u,
+ .nNoiseTh = 40u,
+ .hysteresis = 10u,
+ .onDebounce = 3u,
+ .snsClkSource = CY_CAPSENSE_CLK_SOURCE_AUTO_MASK,
+ .idacMod = { 32u, 32u, 32u, },
+ .idacGainIndex = 4u,
+ .rowIdacMod = { 32u, 32u, 32u, },
+ .bslnCoeff = 1u,
+ .status = 0u,
+ .wdTouch = {
+ .ptrPosition = &cy_capsense_tuner.position[0u],
+ .numPosition = 1,
+ },
+ },
+ },
+ .sensorContext = {
+ { /* Button0_Rx0 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* Button1_Rx0 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* LinearSlider0_Sns0 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* LinearSlider0_Sns1 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* LinearSlider0_Sns2 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* LinearSlider0_Sns3 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ { /* LinearSlider0_Sns4 */
+ .raw = 0u,
+ .bsln = 0u,
+ .diff = 0u,
+ .status = 0u,
+ .negBslnRstCnt = 0u,
+ .idacComp = 32u,
+ .bslnExt = 0u,
+ },
+ },
+ .position = {
+ { /* LinearSlider0 */
+ .x = 0u,
+ .y = 0u,
+ .z = 0u,
+ .id = 0u,
+ },
+ },
+};
+
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+#if (CY_CAPSENSE_BIST_EN != 0)
+static cy_stc_capsense_bist_context_t cy_capsense_bist_context = {};
+#endif
+#endif
+
+cy_stc_capsense_context_t cy_capsense_context = {
+ .ptrCommonConfig = &cy_capsense_commonConfig,
+ .ptrCommonContext = &cy_capsense_tuner.commonContext,
+ .ptrInternalContext = &cy_capsense_internalContext,
+ .ptrWdConfig = &cy_capsense_widgetConfig[0u],
+ .ptrWdContext = &cy_capsense_tuner.widgetContext[0u],
+ .ptrPinConfig = &cy_capsense_pinConfig[0u],
+ .ptrShieldPinConfig = NULL,
+ .ptrActiveScanSns = &cy_capsense_activeScanSns,
+#if (CY_CAPSENSE_MW_VERSION < 300)
+ .ptrFptrConfig = (const void *) &cy_capsense_fptrConfig,
+#endif
+#if (CY_CAPSENSE_BIST_SUPPORTED)
+ .ptrBistContext = NULL,
+#endif
+};
+
+#endif /* CY_CAPSENSE_CORE == __CORTEX_M */
+
+#endif /* !defined(CY_DISABLE_CAPSENSE) */
+
+#endif /* (defined(COMPONENT_MW_CAPSENSE) || !defined(COMPONENT_MW_CORE_MAKE)) */
+
+/* [] END OF FILE */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.h
new file mode 100644
index 00000000000000..8654b3c71e2ac8
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.h
@@ -0,0 +1,2334 @@
+/*******************************************************************************
+ * File Name: cycfg_capsense.h
+ *
+ * Description:
+ * CAPSENSE Middleware configuration
+ * This file should not be modified. It was automatically generated by
+ * CAPSENSE Configurator 6.10.0.3796
+ *
+ ********************************************************************************
+ * Copyright 2024, Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+#if !defined(CYCFG_CAPSENSE_H)
+#define CYCFG_CAPSENSE_H
+
+/* This enables code only when the CAPSENSE(TM) Middleware is present in the project
+ * or the information about the Middleware presence cannot be obtained.
+ */
+#if (defined(COMPONENT_MW_CAPSENSE) || !defined(COMPONENT_MW_CORE_MAKE))
+
+#include "cy_device_headers.h"
+#include "cycfg_capsense_defines.h"
+#include "cycfg_peripherals.h"
+#include <stddef.h>
+
+#define CY_CAPSENSE_CFG_TOOL_VERSION (610)
+
+#if !defined(CY_DISABLE_CAPSENSE)
+
+#if (CY_CAPSENSE_CORE == __CORTEX_M)
+
+#if !defined(Cmod_PORT) || !defined(Cmod_PIN) || !defined(Cmod_PORT_NUM)
+#error Cmod Capacitor is not assigned: missing #define Cmod_PORT, #define Cmod_PIN, #define Cmod_PORT_NUM
+#endif
+
+#if !defined(CintA_PORT) || !defined(CintA_PIN) || !defined(CintA_PORT_NUM)
+#error CintA Capacitor is not assigned: missing #define CintA_PORT, #define CintA_PIN, #define CintA_PORT_NUM
+#endif
+
+#if !defined(CintB_PORT) || !defined(CintB_PIN) || !defined(CintB_PORT_NUM)
+#error CintB Capacitor is not assigned: missing #define CintB_PORT, #define CintB_PIN, #define CintB_PORT_NUM
+#endif
+
+#if !defined(Button0_Rx0_PORT) || !defined(Button0_Rx0_PIN)
+#error Button0_Rx0 Sensor is not assigned: missing #define Button0_Rx0_PORT, #define Button0_Rx0_PIN
+#endif
+
+#if !defined(Button0_Tx_PORT) || !defined(Button0_Tx_PIN)
+#error Button0_Tx Sensor is not assigned: missing #define Button0_Tx_PORT, #define Button0_Tx_PIN
+#endif
+
+#if !defined(Button1_Rx0_PORT) || !defined(Button1_Rx0_PIN)
+#error Button1_Rx0 Sensor is not assigned: missing #define Button1_Rx0_PORT, #define Button1_Rx0_PIN
+#endif
+
+#if !defined(Button1_Tx_PORT) || !defined(Button1_Tx_PIN)
+#error Button1_Tx Sensor is not assigned: missing #define Button1_Tx_PORT, #define Button1_Tx_PIN
+#endif
+
+#if !defined(LinearSlider0_Sns0_PORT) || !defined(LinearSlider0_Sns0_PIN)
+#error LinearSlider0_Sns0 Sensor is not assigned: missing #define LinearSlider0_Sns0_PORT, #define LinearSlider0_Sns0_PIN
+#endif
+
+#if !defined(LinearSlider0_Sns1_PORT) || !defined(LinearSlider0_Sns1_PIN)
+#error LinearSlider0_Sns1 Sensor is not assigned: missing #define LinearSlider0_Sns1_PORT, #define LinearSlider0_Sns1_PIN
+#endif
+
+#if !defined(LinearSlider0_Sns2_PORT) || !defined(LinearSlider0_Sns2_PIN)
+#error LinearSlider0_Sns2 Sensor is not assigned: missing #define LinearSlider0_Sns2_PORT, #define LinearSlider0_Sns2_PIN
+#endif
+
+#if !defined(LinearSlider0_Sns3_PORT) || !defined(LinearSlider0_Sns3_PIN)
+#error LinearSlider0_Sns3 Sensor is not assigned: missing #define LinearSlider0_Sns3_PORT, #define LinearSlider0_Sns3_PIN
+#endif
+
+#if !defined(LinearSlider0_Sns4_PORT) || !defined(LinearSlider0_Sns4_PIN)
+#error LinearSlider0_Sns4 Sensor is not assigned: missing #define LinearSlider0_Sns4_PORT, #define LinearSlider0_Sns4_PIN
+#endif
+
+#if !defined(CY_CAPSENSE_CPU_CLK)
+#error CPU clock frequency is not set: missing #define CY_CAPSENSE_CPU_CLK
+#endif
+
+#if !defined(CY_CAPSENSE_PERI_CLK)
+#error Peripheral clock core is not set: missing #define CY_CAPSENSE_PERI_CLK
+#endif
+
+#if !defined(CY_CAPSENSE_VDDA_MV)
+#error VDDA voltage is not set: missing #define CY_CAPSENSE_VDDA_MV
+#endif
+
+#if !defined(CY_CAPSENSE_PERI_DIV_TYPE)
+#error Peripheral clock divider type is not set: missing #define CY_CAPSENSE_PERI_DIV_TYPE
+#endif
+
+#if !defined(CY_CAPSENSE_PERI_DIV_INDEX)
+#error Peripheral clock divider index is not set: missing #define CY_CAPSENSE_PERI_DIV_INDEX
+#endif
+
+#include "cy_capsense.h"
+
+/* Supported CapSense Middleware version */
+#define CY_CAPSENSE_MW_VERSION_REQUIRED (200)
+
+#if !defined(CY_CAPSENSE_MW_VERSION)
+#if (CY_CAPSENSE_MW_VERSION_MAJOR == 2)
+#define CY_CAPSENSE_MW_VERSION (200)
+#elif (CY_CAPSENSE_MW_VERSION_MAJOR == 1)
+#define CY_CAPSENSE_MW_VERSION (100)
+#else
+#define CY_CAPSENSE_MW_VERSION (100)
+#endif
+#endif
+
+/* Check the used Middleware version */
+#if (CY_CAPSENSE_MW_VERSION_REQUIRED > CY_CAPSENSE_MW_VERSION)
+#error The CapSense Configurator requires a newer version of the CapSense Middleware. Update the CapSense Middleware in your project.
+#endif
+
+#define CY_CAPSENSE_BIST_SUPPORTED (CY_CAPSENSE_MW_VERSION >= 210)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Widget names */
+#define CY_CAPSENSE_BUTTON0_WDGT_ID (0u)
+#define CY_CAPSENSE_BUTTON1_WDGT_ID (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_WDGT_ID (2u)
+
+/* Button0 sensor names */
+#define CY_CAPSENSE_BUTTON0_SNS0_ID (0u)
+
+/* Button0 node names */
+#define CY_CAPSENSE_BUTTON0_RX0_TX0_ID (0u)
+
+/* Button0 sensor element IDs */
+#define CY_CAPSENSE_BUTTON0_RX0_ID (0u)
+#define CY_CAPSENSE_BUTTON0_TX0_ID (1u)
+
+/* Button1 sensor names */
+#define CY_CAPSENSE_BUTTON1_SNS0_ID (0u)
+
+/* Button1 node names */
+#define CY_CAPSENSE_BUTTON1_RX0_TX0_ID (0u)
+
+/* Button1 sensor element IDs */
+#define CY_CAPSENSE_BUTTON1_RX0_ID (0u)
+#define CY_CAPSENSE_BUTTON1_TX0_ID (1u)
+
+/* LinearSlider0 sensor names */
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_ID (0u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_ID (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_ID (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_ID (3u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_ID (4u)
+
+typedef struct
+{
+ cy_stc_capsense_common_context_t commonContext;
+ cy_stc_capsense_widget_context_t widgetContext[3];
+ cy_stc_capsense_sensor_context_t sensorContext[7];
+ cy_stc_capsense_position_t position[1];
+} cy_stc_capsense_tuner_t;
+
+extern cy_stc_capsense_tuner_t cy_capsense_tuner;
+
+extern cy_stc_capsense_context_t cy_capsense_context;
+
+/* RAM Data structure register definitions */
+#if (CY_CAPSENSE_MW_VERSION < 300)
+#define CY_CAPSENSE_CONFIG_ID_VALUE (cy_capsense_tuner.commonContext.configId)
+#define CY_CAPSENSE_CONFIG_ID_OFFSET (0u)
+#define CY_CAPSENSE_CONFIG_ID_SIZE (2u)
+#define CY_CAPSENSE_CONFIG_ID_PARAM_ID (0x02000000u)
+
+#define CY_CAPSENSE_TUNER_CMD_VALUE (cy_capsense_tuner.commonContext.tunerCmd)
+#define CY_CAPSENSE_TUNER_CMD_OFFSET (2u)
+#define CY_CAPSENSE_TUNER_CMD_SIZE (2u)
+#define CY_CAPSENSE_TUNER_CMD_PARAM_ID (0x02000002u)
+
+#define CY_CAPSENSE_SCAN_COUNTER_VALUE (cy_capsense_tuner.commonContext.scanCounter)
+#define CY_CAPSENSE_SCAN_COUNTER_OFFSET (4u)
+#define CY_CAPSENSE_SCAN_COUNTER_SIZE (2u)
+#define CY_CAPSENSE_SCAN_COUNTER_PARAM_ID (0x02000004u)
+
+#define CY_CAPSENSE_TUNER_ST_VALUE (cy_capsense_tuner.commonContext.tunerSt)
+#define CY_CAPSENSE_TUNER_ST_OFFSET (6u)
+#define CY_CAPSENSE_TUNER_ST_SIZE (1u)
+#define CY_CAPSENSE_TUNER_ST_PARAM_ID (0x01000006u)
+
+#define CY_CAPSENSE_INITDONE_VALUE (cy_capsense_tuner.commonContext.initDone)
+#define CY_CAPSENSE_INITDONE_OFFSET (7u)
+#define CY_CAPSENSE_INITDONE_SIZE (1u)
+#define CY_CAPSENSE_INITDONE_PARAM_ID (0x01000007u)
+
+#define CY_CAPSENSE_PTRSSCALLBACK_VALUE (cy_capsense_tuner.commonContext.ptrSSCallback)
+#define CY_CAPSENSE_PTRSSCALLBACK_OFFSET (8u)
+#define CY_CAPSENSE_PTRSSCALLBACK_SIZE (4u)
+#define CY_CAPSENSE_PTRSSCALLBACK_PARAM_ID (0x03000008u)
+
+#define CY_CAPSENSE_PTREOSCALLBACK_VALUE (cy_capsense_tuner.commonContext.ptrEOSCallback)
+#define CY_CAPSENSE_PTREOSCALLBACK_OFFSET (12u)
+#define CY_CAPSENSE_PTREOSCALLBACK_SIZE (4u)
+#define CY_CAPSENSE_PTREOSCALLBACK_PARAM_ID (0x0300000cu)
+
+#define CY_CAPSENSE_PTRTUNERSENDCALLBACK_VALUE (cy_capsense_tuner.commonContext.ptrTunerSendCallback)
+#define CY_CAPSENSE_PTRTUNERSENDCALLBACK_OFFSET (16u)
+#define CY_CAPSENSE_PTRTUNERSENDCALLBACK_SIZE (4u)
+#define CY_CAPSENSE_PTRTUNERSENDCALLBACK_PARAM_ID (0x03000010u)
+
+#define CY_CAPSENSE_PTRTUNERRECEIVECALLBACK_VALUE (cy_capsense_tuner.commonContext.ptrTunerReceiveCallback)
+#define CY_CAPSENSE_PTRTUNERRECEIVECALLBACK_OFFSET (20u)
+#define CY_CAPSENSE_PTRTUNERRECEIVECALLBACK_SIZE (4u)
+#define CY_CAPSENSE_PTRTUNERRECEIVECALLBACK_PARAM_ID (0x03000014u)
+
+#define CY_CAPSENSE_STATUS_VALUE (cy_capsense_tuner.commonContext.status)
+#define CY_CAPSENSE_STATUS_OFFSET (24u)
+#define CY_CAPSENSE_STATUS_SIZE (4u)
+#define CY_CAPSENSE_STATUS_PARAM_ID (0x03000018u)
+
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_VALUE (cy_capsense_tuner.commonContext.timestampInterval)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_OFFSET (28u)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_SIZE (4u)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_PARAM_ID (0x0300001cu)
+
+#define CY_CAPSENSE_TIMESTAMP_VALUE (cy_capsense_tuner.commonContext.timestamp)
+#define CY_CAPSENSE_TIMESTAMP_OFFSET (32u)
+#define CY_CAPSENSE_TIMESTAMP_SIZE (4u)
+#define CY_CAPSENSE_TIMESTAMP_PARAM_ID (0x03000020u)
+
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_VALUE (cy_capsense_tuner.commonContext.modCsdClk)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_OFFSET (36u)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_SIZE (1u)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_PARAM_ID (0x01000024u)
+
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_VALUE (cy_capsense_tuner.commonContext.modCsxClk)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_OFFSET (37u)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_SIZE (1u)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_PARAM_ID (0x01000025u)
+
+#define CY_CAPSENSE_TUNER_CNT_VALUE (cy_capsense_tuner.commonContext.tunerCnt)
+#define CY_CAPSENSE_TUNER_CNT_OFFSET (38u)
+#define CY_CAPSENSE_TUNER_CNT_SIZE (1u)
+#define CY_CAPSENSE_TUNER_CNT_PARAM_ID (0x01000026u)
+
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[0].fingerCap)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_OFFSET (40u)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_PARAM_ID (0x06000028u)
+
+#define CY_CAPSENSE_BUTTON0_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[0].sigPFC)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_OFFSET (42u)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_PARAM_ID (0x0600002au)
+
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_VALUE (cy_capsense_tuner.widgetContext[0].resolution)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_OFFSET (44u)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_PARAM_ID (0x0600002cu)
+
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[0].maxRawCount)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_OFFSET (46u)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_PARAM_ID (0x0600002eu)
+
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[0].fingerTh)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_OFFSET (48u)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_PARAM_ID (0x06000030u)
+
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[0].proxTh)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_OFFSET (50u)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_PARAM_ID (0x06000032u)
+
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[0].lowBslnRst)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_OFFSET (52u)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_PARAM_ID (0x06000034u)
+
+#define CY_CAPSENSE_BUTTON0_TX_CLK_VALUE (cy_capsense_tuner.widgetContext[0].snsClk)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_OFFSET (54u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_PARAM_ID (0x06000036u)
+
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[0].rowSnsClk)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_OFFSET (56u)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_PARAM_ID (0x06000038u)
+
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[0].gestureDetected)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_OFFSET (58u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_PARAM_ID (0x0200003au)
+
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[0].gestureDirection)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_OFFSET (60u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_PARAM_ID (0x0200003cu)
+
+#define CY_CAPSENSE_BUTTON0_XDELTA_VALUE (cy_capsense_tuner.widgetContext[0].xDelta)
+#define CY_CAPSENSE_BUTTON0_XDELTA_OFFSET (62u)
+#define CY_CAPSENSE_BUTTON0_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_XDELTA_PARAM_ID (0x0200003eu)
+
+#define CY_CAPSENSE_BUTTON0_YDELTA_VALUE (cy_capsense_tuner.widgetContext[0].yDelta)
+#define CY_CAPSENSE_BUTTON0_YDELTA_OFFSET (64u)
+#define CY_CAPSENSE_BUTTON0_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_YDELTA_PARAM_ID (0x02000040u)
+
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[0].noiseTh)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_OFFSET (66u)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_PARAM_ID (0x05000042u)
+
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[0].nNoiseTh)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_OFFSET (67u)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_PARAM_ID (0x05000043u)
+
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[0].hysteresis)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_OFFSET (68u)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_PARAM_ID (0x05000044u)
+
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[0].onDebounce)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_OFFSET (69u)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_PARAM_ID (0x05000045u)
+
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[0].snsClkSource)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_OFFSET (70u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_PARAM_ID (0x05000046u)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[0])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_OFFSET (71u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_PARAM_ID (0x05000047u)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[1])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_OFFSET (72u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_PARAM_ID (0x05000048u)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[2])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_OFFSET (73u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_PARAM_ID (0x05000049u)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[0].idacGainIndex)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_OFFSET (74u)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_PARAM_ID (0x0500004au)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[0])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_OFFSET (75u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_PARAM_ID (0x0500004bu)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[1])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_OFFSET (76u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_PARAM_ID (0x0500004cu)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[2])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_OFFSET (77u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_PARAM_ID (0x0500004du)
+
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[0].bslnCoeff)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_OFFSET (78u)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_PARAM_ID (0x0500004eu)
+
+#define CY_CAPSENSE_BUTTON0_STATUS_VALUE (cy_capsense_tuner.widgetContext[0].status)
+#define CY_CAPSENSE_BUTTON0_STATUS_OFFSET (79u)
+#define CY_CAPSENSE_BUTTON0_STATUS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_STATUS_PARAM_ID (0x0100004fu)
+
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[0].wdTouch.ptrPosition)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_OFFSET (80u)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_PARAM_ID (0x03000050u)
+
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[0].wdTouch.numPosition)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_OFFSET (84u)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_PARAM_ID (0x01000054u)
+
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[1].fingerCap)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_OFFSET (88u)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_PARAM_ID (0x06010058u)
+
+#define CY_CAPSENSE_BUTTON1_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[1].sigPFC)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_OFFSET (90u)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_PARAM_ID (0x0601005au)
+
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_VALUE (cy_capsense_tuner.widgetContext[1].resolution)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_OFFSET (92u)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_PARAM_ID (0x0601005cu)
+
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[1].maxRawCount)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_OFFSET (94u)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_PARAM_ID (0x0601005eu)
+
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[1].fingerTh)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_OFFSET (96u)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_PARAM_ID (0x06010060u)
+
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[1].proxTh)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_OFFSET (98u)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_PARAM_ID (0x06010062u)
+
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[1].lowBslnRst)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_OFFSET (100u)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_PARAM_ID (0x06010064u)
+
+#define CY_CAPSENSE_BUTTON1_TX_CLK_VALUE (cy_capsense_tuner.widgetContext[1].snsClk)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_OFFSET (102u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_PARAM_ID (0x06010066u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[1].rowSnsClk)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_OFFSET (104u)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_PARAM_ID (0x06010068u)
+
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[1].gestureDetected)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_OFFSET (106u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_PARAM_ID (0x0201006au)
+
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[1].gestureDirection)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_OFFSET (108u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_PARAM_ID (0x0201006cu)
+
+#define CY_CAPSENSE_BUTTON1_XDELTA_VALUE (cy_capsense_tuner.widgetContext[1].xDelta)
+#define CY_CAPSENSE_BUTTON1_XDELTA_OFFSET (110u)
+#define CY_CAPSENSE_BUTTON1_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_XDELTA_PARAM_ID (0x0201006eu)
+
+#define CY_CAPSENSE_BUTTON1_YDELTA_VALUE (cy_capsense_tuner.widgetContext[1].yDelta)
+#define CY_CAPSENSE_BUTTON1_YDELTA_OFFSET (112u)
+#define CY_CAPSENSE_BUTTON1_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_YDELTA_PARAM_ID (0x02010070u)
+
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[1].noiseTh)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_OFFSET (114u)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_PARAM_ID (0x05010072u)
+
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[1].nNoiseTh)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_OFFSET (115u)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_PARAM_ID (0x05010073u)
+
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[1].hysteresis)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_OFFSET (116u)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_PARAM_ID (0x05010074u)
+
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[1].onDebounce)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_OFFSET (117u)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_PARAM_ID (0x05010075u)
+
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[1].snsClkSource)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_OFFSET (118u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_PARAM_ID (0x05010076u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[0])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_OFFSET (119u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_PARAM_ID (0x05010077u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[1])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_OFFSET (120u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_PARAM_ID (0x05010078u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[2])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_OFFSET (121u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_PARAM_ID (0x05010079u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[1].idacGainIndex)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_OFFSET (122u)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_PARAM_ID (0x0501007au)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[0])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_OFFSET (123u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_PARAM_ID (0x0501007bu)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[1])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_OFFSET (124u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_PARAM_ID (0x0501007cu)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[2])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_OFFSET (125u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_PARAM_ID (0x0501007du)
+
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[1].bslnCoeff)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_OFFSET (126u)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_PARAM_ID (0x0501007eu)
+
+#define CY_CAPSENSE_BUTTON1_STATUS_VALUE (cy_capsense_tuner.widgetContext[1].status)
+#define CY_CAPSENSE_BUTTON1_STATUS_OFFSET (127u)
+#define CY_CAPSENSE_BUTTON1_STATUS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_STATUS_PARAM_ID (0x0101007fu)
+
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[1].wdTouch.ptrPosition)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_OFFSET (128u)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_PARAM_ID (0x03010080u)
+
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[1].wdTouch.numPosition)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_OFFSET (132u)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_PARAM_ID (0x01010084u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[2].fingerCap)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_OFFSET (136u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_PARAM_ID (0x06020088u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[2].sigPFC)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_OFFSET (138u)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_PARAM_ID (0x0602008au)
+
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_VALUE (cy_capsense_tuner.widgetContext[2].resolution)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_OFFSET (140u)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_PARAM_ID (0x0602008cu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[2].maxRawCount)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_OFFSET (142u)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_PARAM_ID (0x0602008eu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[2].fingerTh)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_OFFSET (144u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_PARAM_ID (0x02020090u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[2].proxTh)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_OFFSET (146u)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_PARAM_ID (0x02020092u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[2].lowBslnRst)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_OFFSET (148u)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_PARAM_ID (0x06020094u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[2].snsClk)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_OFFSET (150u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_PARAM_ID (0x06020096u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[2].rowSnsClk)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_OFFSET (152u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_PARAM_ID (0x06020098u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[2].gestureDetected)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_OFFSET (154u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_PARAM_ID (0x0202009au)
+
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[2].gestureDirection)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_OFFSET (156u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_PARAM_ID (0x0202009cu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_VALUE (cy_capsense_tuner.widgetContext[2].xDelta)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_OFFSET (158u)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_PARAM_ID (0x0202009eu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_VALUE (cy_capsense_tuner.widgetContext[2].yDelta)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_OFFSET (160u)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_PARAM_ID (0x020200a0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[2].noiseTh)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_OFFSET (162u)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_PARAM_ID (0x010200a2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[2].nNoiseTh)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_OFFSET (163u)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_PARAM_ID (0x010200a3u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[2].hysteresis)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_OFFSET (164u)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_PARAM_ID (0x010200a4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[2].onDebounce)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_OFFSET (165u)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_PARAM_ID (0x050200a5u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[2].snsClkSource)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_OFFSET (166u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_PARAM_ID (0x050200a6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[0])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_OFFSET (167u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_PARAM_ID (0x050200a7u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[1])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_OFFSET (168u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_PARAM_ID (0x050200a8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[2])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_OFFSET (169u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_PARAM_ID (0x050200a9u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[2].idacGainIndex)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_OFFSET (170u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_PARAM_ID (0x050200aau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[0])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_OFFSET (171u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_PARAM_ID (0x050200abu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[1])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_OFFSET (172u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_PARAM_ID (0x050200acu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[2])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_OFFSET (173u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_PARAM_ID (0x050200adu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[2].bslnCoeff)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_OFFSET (174u)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_PARAM_ID (0x050200aeu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_VALUE (cy_capsense_tuner.widgetContext[2].status)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_OFFSET (175u)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_PARAM_ID (0x010200afu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[2].wdTouch.ptrPosition)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_OFFSET (176u)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_PARAM_ID (0x030200b0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[2].wdTouch.numPosition)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_OFFSET (180u)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_PARAM_ID (0x010200b4u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_VALUE (cy_capsense_tuner.sensorContext[0].raw)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_OFFSET (184u)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_PARAM_ID (0x020000b8u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[0].bsln)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_OFFSET (186u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_PARAM_ID (0x020000bau)
+
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[0].diff)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_OFFSET (188u)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_PARAM_ID (0x020000bcu)
+
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[0].status)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_OFFSET (190u)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_PARAM_ID (0x010000beu)
+
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[0].negBslnRstCnt)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_OFFSET (191u)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010000bfu)
+
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[0].idacComp)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_OFFSET (192u)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_PARAM_ID (0x010000c0u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[0].bslnExt)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_OFFSET (193u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_PARAM_ID (0x010000c1u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_VALUE (cy_capsense_tuner.sensorContext[1].raw)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_OFFSET (194u)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_PARAM_ID (0x020100c2u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[1].bsln)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_OFFSET (196u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_PARAM_ID (0x020100c4u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[1].diff)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_OFFSET (198u)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_PARAM_ID (0x020100c6u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[1].status)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_OFFSET (200u)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_PARAM_ID (0x010100c8u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[1].negBslnRstCnt)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_OFFSET (201u)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010100c9u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[1].idacComp)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_OFFSET (202u)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_PARAM_ID (0x010100cau)
+
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[1].bslnExt)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_OFFSET (203u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_PARAM_ID (0x010100cbu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_VALUE (cy_capsense_tuner.sensorContext[2].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_OFFSET (204u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_PARAM_ID (0x020200ccu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[2].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_OFFSET (206u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_PARAM_ID (0x020200ceu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[2].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_OFFSET (208u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_PARAM_ID (0x020200d0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[2].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_OFFSET (210u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_PARAM_ID (0x010200d2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[2].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_OFFSET (211u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200d3u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[2].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_OFFSET (212u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_PARAM_ID (0x010200d4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[2].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_OFFSET (213u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_PARAM_ID (0x010200d5u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_VALUE (cy_capsense_tuner.sensorContext[3].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_OFFSET (214u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_PARAM_ID (0x020200d6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_VALUE (cy_capsense_tuner.sensorContext[3].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_OFFSET (216u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_PARAM_ID (0x020200d8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_VALUE (cy_capsense_tuner.sensorContext[3].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_OFFSET (218u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_PARAM_ID (0x020200dau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_VALUE (cy_capsense_tuner.sensorContext[3].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_OFFSET (220u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_PARAM_ID (0x010200dcu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[3].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_OFFSET (221u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200ddu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_VALUE (cy_capsense_tuner.sensorContext[3].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_OFFSET (222u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_PARAM_ID (0x010200deu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[3].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_OFFSET (223u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_PARAM_ID (0x010200dfu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_VALUE (cy_capsense_tuner.sensorContext[4].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_OFFSET (224u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_PARAM_ID (0x020200e0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_VALUE (cy_capsense_tuner.sensorContext[4].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_OFFSET (226u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_PARAM_ID (0x020200e2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_VALUE (cy_capsense_tuner.sensorContext[4].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_OFFSET (228u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_PARAM_ID (0x020200e4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_VALUE (cy_capsense_tuner.sensorContext[4].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_OFFSET (230u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_PARAM_ID (0x010200e6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[4].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_OFFSET (231u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200e7u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_VALUE (cy_capsense_tuner.sensorContext[4].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_OFFSET (232u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_PARAM_ID (0x010200e8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[4].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_OFFSET (233u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_PARAM_ID (0x010200e9u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_VALUE (cy_capsense_tuner.sensorContext[5].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_OFFSET (234u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_PARAM_ID (0x020200eau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_VALUE (cy_capsense_tuner.sensorContext[5].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_OFFSET (236u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_PARAM_ID (0x020200ecu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_VALUE (cy_capsense_tuner.sensorContext[5].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_OFFSET (238u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_PARAM_ID (0x020200eeu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_VALUE (cy_capsense_tuner.sensorContext[5].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_OFFSET (240u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_PARAM_ID (0x010200f0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[5].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_OFFSET (241u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200f1u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_VALUE (cy_capsense_tuner.sensorContext[5].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_OFFSET (242u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_PARAM_ID (0x010200f2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[5].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_OFFSET (243u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_PARAM_ID (0x010200f3u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_VALUE (cy_capsense_tuner.sensorContext[6].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_OFFSET (244u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_PARAM_ID (0x020200f4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_VALUE (cy_capsense_tuner.sensorContext[6].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_OFFSET (246u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_PARAM_ID (0x020200f6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_VALUE (cy_capsense_tuner.sensorContext[6].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_OFFSET (248u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_PARAM_ID (0x020200f8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_VALUE (cy_capsense_tuner.sensorContext[6].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_OFFSET (250u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_PARAM_ID (0x010200fau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[6].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_OFFSET (251u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200fbu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_VALUE (cy_capsense_tuner.sensorContext[6].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_OFFSET (252u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_PARAM_ID (0x010200fcu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[6].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_OFFSET (253u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_PARAM_ID (0x010200fdu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_X0_VALUE (cy_capsense_tuner.position[0].x)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_OFFSET (254u)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_PARAM_ID (0x020200feu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_VALUE (cy_capsense_tuner.position[0].y)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_OFFSET (256u)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_PARAM_ID (0x02020100u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_VALUE (cy_capsense_tuner.position[0].z)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_OFFSET (258u)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_PARAM_ID (0x02020102u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_VALUE (cy_capsense_tuner.position[0].id)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_OFFSET (260u)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_PARAM_ID (0x02020104u)
+
+#else /* CY_CAPSENSE_MW_VERSION >= 300 */
+#define CY_CAPSENSE_CONFIG_ID_VALUE (cy_capsense_tuner.commonContext.configId)
+#define CY_CAPSENSE_CONFIG_ID_OFFSET (0u)
+#define CY_CAPSENSE_CONFIG_ID_SIZE (2u)
+#define CY_CAPSENSE_CONFIG_ID_PARAM_ID (0x02000000u)
+
+#define CY_CAPSENSE_TUNER_CMD_VALUE (cy_capsense_tuner.commonContext.tunerCmd)
+#define CY_CAPSENSE_TUNER_CMD_OFFSET (2u)
+#define CY_CAPSENSE_TUNER_CMD_SIZE (2u)
+#define CY_CAPSENSE_TUNER_CMD_PARAM_ID (0x02000002u)
+
+#define CY_CAPSENSE_SCAN_COUNTER_VALUE (cy_capsense_tuner.commonContext.scanCounter)
+#define CY_CAPSENSE_SCAN_COUNTER_OFFSET (4u)
+#define CY_CAPSENSE_SCAN_COUNTER_SIZE (2u)
+#define CY_CAPSENSE_SCAN_COUNTER_PARAM_ID (0x02000004u)
+
+#define CY_CAPSENSE_TUNER_ST_VALUE (cy_capsense_tuner.commonContext.tunerSt)
+#define CY_CAPSENSE_TUNER_ST_OFFSET (6u)
+#define CY_CAPSENSE_TUNER_ST_SIZE (1u)
+#define CY_CAPSENSE_TUNER_ST_PARAM_ID (0x01000006u)
+
+#define CY_CAPSENSE_INITDONE_VALUE (cy_capsense_tuner.commonContext.initDone)
+#define CY_CAPSENSE_INITDONE_OFFSET (7u)
+#define CY_CAPSENSE_INITDONE_SIZE (1u)
+#define CY_CAPSENSE_INITDONE_PARAM_ID (0x01000007u)
+
+#define CY_CAPSENSE_STATUS_VALUE (cy_capsense_tuner.commonContext.status)
+#define CY_CAPSENSE_STATUS_OFFSET (8u)
+#define CY_CAPSENSE_STATUS_SIZE (4u)
+#define CY_CAPSENSE_STATUS_PARAM_ID (0x03000008u)
+
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_VALUE (cy_capsense_tuner.commonContext.timestampInterval)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_OFFSET (12u)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_SIZE (4u)
+#define CY_CAPSENSE_TIMESTAMPINTERVAL_PARAM_ID (0x0300000cu)
+
+#define CY_CAPSENSE_TIMESTAMP_VALUE (cy_capsense_tuner.commonContext.timestamp)
+#define CY_CAPSENSE_TIMESTAMP_OFFSET (16u)
+#define CY_CAPSENSE_TIMESTAMP_SIZE (4u)
+#define CY_CAPSENSE_TIMESTAMP_PARAM_ID (0x03000010u)
+
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_VALUE (cy_capsense_tuner.commonContext.modCsdClk)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_OFFSET (20u)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_SIZE (1u)
+#define CY_CAPSENSE_CSD_MOD_CLK_DIVIDER_PARAM_ID (0x01000014u)
+
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_VALUE (cy_capsense_tuner.commonContext.modCsxClk)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_OFFSET (21u)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_SIZE (1u)
+#define CY_CAPSENSE_CSX_MOD_CLK_DIVIDER_PARAM_ID (0x01000015u)
+
+#define CY_CAPSENSE_TUNER_CNT_VALUE (cy_capsense_tuner.commonContext.tunerCnt)
+#define CY_CAPSENSE_TUNER_CNT_OFFSET (22u)
+#define CY_CAPSENSE_TUNER_CNT_SIZE (1u)
+#define CY_CAPSENSE_TUNER_CNT_PARAM_ID (0x01000016u)
+
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[0].fingerCap)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_OFFSET (24u)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_FINGER_CP_PARAM_ID (0x06000018u)
+
+#define CY_CAPSENSE_BUTTON0_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[0].sigPFC)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_OFFSET (26u)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_SIGPFC_PARAM_ID (0x0600001au)
+
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_VALUE (cy_capsense_tuner.widgetContext[0].resolution)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_OFFSET (28u)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_NUM_CONV_PARAM_ID (0x0600001cu)
+
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[0].maxRawCount)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_OFFSET (30u)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_MAX_RAW_COUNT_PARAM_ID (0x0600001eu)
+
+#define CY_CAPSENSE_BUTTON0_ROW_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[0].maxRawCountRow)
+#define CY_CAPSENSE_BUTTON0_ROW_MAX_RAW_COUNT_OFFSET (32u)
+#define CY_CAPSENSE_BUTTON0_ROW_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_ROW_MAX_RAW_COUNT_PARAM_ID (0x06000020u)
+
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[0].fingerTh)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_OFFSET (34u)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_FINGER_TH_PARAM_ID (0x06000022u)
+
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[0].proxTh)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_OFFSET (36u)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_PROX_TOUCH_TH_PARAM_ID (0x06000024u)
+
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[0].lowBslnRst)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_OFFSET (38u)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_LOW_BSLN_RST_PARAM_ID (0x06000026u)
+
+#define CY_CAPSENSE_BUTTON0_TX_CLK_VALUE (cy_capsense_tuner.widgetContext[0].snsClk)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_OFFSET (40u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_PARAM_ID (0x06000028u)
+
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[0].rowSnsClk)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_OFFSET (42u)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_ROW_SNS_CLK_PARAM_ID (0x0600002au)
+
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[0].gestureDetected)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_OFFSET (44u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DETECTED_PARAM_ID (0x0200002cu)
+
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[0].gestureDirection)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_OFFSET (46u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_GESTURE_DIRECTION_PARAM_ID (0x0200002eu)
+
+#define CY_CAPSENSE_BUTTON0_XDELTA_VALUE (cy_capsense_tuner.widgetContext[0].xDelta)
+#define CY_CAPSENSE_BUTTON0_XDELTA_OFFSET (48u)
+#define CY_CAPSENSE_BUTTON0_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_XDELTA_PARAM_ID (0x02000030u)
+
+#define CY_CAPSENSE_BUTTON0_YDELTA_VALUE (cy_capsense_tuner.widgetContext[0].yDelta)
+#define CY_CAPSENSE_BUTTON0_YDELTA_OFFSET (50u)
+#define CY_CAPSENSE_BUTTON0_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_YDELTA_PARAM_ID (0x02000032u)
+
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[0].noiseTh)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_OFFSET (52u)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_NOISE_TH_PARAM_ID (0x06000034u)
+
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[0].nNoiseTh)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_OFFSET (54u)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_NNOISE_TH_PARAM_ID (0x06000036u)
+
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[0].hysteresis)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_OFFSET (56u)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_HYSTERESIS_PARAM_ID (0x06000038u)
+
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[0].onDebounce)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_OFFSET (58u)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ON_DEBOUNCE_PARAM_ID (0x0500003au)
+
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[0].snsClkSource)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_OFFSET (59u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_TX_CLK_SOURCE_PARAM_ID (0x0500003bu)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[0])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_OFFSET (60u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD0_PARAM_ID (0x0500003cu)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[1])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_OFFSET (61u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD1_PARAM_ID (0x0500003du)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[0].idacMod[2])
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_OFFSET (62u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_MOD2_PARAM_ID (0x0500003eu)
+
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[0].idacGainIndex)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_OFFSET (63u)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_IDAC_GAIN_INDEX_PARAM_ID (0x0500003fu)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[0])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_OFFSET (64u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD0_PARAM_ID (0x05000040u)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[1])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_OFFSET (65u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD1_PARAM_ID (0x05000041u)
+
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[0].rowIdacMod[2])
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_OFFSET (66u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_ROW_IDAC_MOD2_PARAM_ID (0x05000042u)
+
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[0].bslnCoeff)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_OFFSET (67u)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_REGULAR_IIR_BL_N_PARAM_ID (0x05000043u)
+
+#define CY_CAPSENSE_BUTTON0_STATUS_VALUE (cy_capsense_tuner.widgetContext[0].status)
+#define CY_CAPSENSE_BUTTON0_STATUS_OFFSET (68u)
+#define CY_CAPSENSE_BUTTON0_STATUS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_STATUS_PARAM_ID (0x01000044u)
+
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[0].wdTouch.ptrPosition)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_OFFSET (72u)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_BUTTON0_PTRPOSITION_PARAM_ID (0x03000048u)
+
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[0].wdTouch.numPosition)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_OFFSET (76u)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_NUM_POSITIONS_PARAM_ID (0x0100004cu)
+
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[1].fingerCap)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_OFFSET (80u)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_FINGER_CP_PARAM_ID (0x06010050u)
+
+#define CY_CAPSENSE_BUTTON1_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[1].sigPFC)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_OFFSET (82u)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_SIGPFC_PARAM_ID (0x06010052u)
+
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_VALUE (cy_capsense_tuner.widgetContext[1].resolution)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_OFFSET (84u)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_NUM_CONV_PARAM_ID (0x06010054u)
+
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[1].maxRawCount)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_OFFSET (86u)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_MAX_RAW_COUNT_PARAM_ID (0x06010056u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[1].maxRawCountRow)
+#define CY_CAPSENSE_BUTTON1_ROW_MAX_RAW_COUNT_OFFSET (88u)
+#define CY_CAPSENSE_BUTTON1_ROW_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_ROW_MAX_RAW_COUNT_PARAM_ID (0x06010058u)
+
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[1].fingerTh)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_OFFSET (90u)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_FINGER_TH_PARAM_ID (0x0601005au)
+
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[1].proxTh)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_OFFSET (92u)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_PROX_TOUCH_TH_PARAM_ID (0x0601005cu)
+
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[1].lowBslnRst)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_OFFSET (94u)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_LOW_BSLN_RST_PARAM_ID (0x0601005eu)
+
+#define CY_CAPSENSE_BUTTON1_TX_CLK_VALUE (cy_capsense_tuner.widgetContext[1].snsClk)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_OFFSET (96u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_PARAM_ID (0x06010060u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[1].rowSnsClk)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_OFFSET (98u)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_ROW_SNS_CLK_PARAM_ID (0x06010062u)
+
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[1].gestureDetected)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_OFFSET (100u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DETECTED_PARAM_ID (0x02010064u)
+
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[1].gestureDirection)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_OFFSET (102u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_GESTURE_DIRECTION_PARAM_ID (0x02010066u)
+
+#define CY_CAPSENSE_BUTTON1_XDELTA_VALUE (cy_capsense_tuner.widgetContext[1].xDelta)
+#define CY_CAPSENSE_BUTTON1_XDELTA_OFFSET (104u)
+#define CY_CAPSENSE_BUTTON1_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_XDELTA_PARAM_ID (0x02010068u)
+
+#define CY_CAPSENSE_BUTTON1_YDELTA_VALUE (cy_capsense_tuner.widgetContext[1].yDelta)
+#define CY_CAPSENSE_BUTTON1_YDELTA_OFFSET (106u)
+#define CY_CAPSENSE_BUTTON1_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_YDELTA_PARAM_ID (0x0201006au)
+
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[1].noiseTh)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_OFFSET (108u)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_NOISE_TH_PARAM_ID (0x0601006cu)
+
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[1].nNoiseTh)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_OFFSET (110u)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_NNOISE_TH_PARAM_ID (0x0601006eu)
+
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[1].hysteresis)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_OFFSET (112u)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_HYSTERESIS_PARAM_ID (0x06010070u)
+
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[1].onDebounce)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_OFFSET (114u)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ON_DEBOUNCE_PARAM_ID (0x05010072u)
+
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[1].snsClkSource)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_OFFSET (115u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_TX_CLK_SOURCE_PARAM_ID (0x05010073u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[0])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_OFFSET (116u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD0_PARAM_ID (0x05010074u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[1])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_OFFSET (117u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD1_PARAM_ID (0x05010075u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[1].idacMod[2])
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_OFFSET (118u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_MOD2_PARAM_ID (0x05010076u)
+
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[1].idacGainIndex)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_OFFSET (119u)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_IDAC_GAIN_INDEX_PARAM_ID (0x05010077u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[0])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_OFFSET (120u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD0_PARAM_ID (0x05010078u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[1])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_OFFSET (121u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD1_PARAM_ID (0x05010079u)
+
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[1].rowIdacMod[2])
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_OFFSET (122u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_ROW_IDAC_MOD2_PARAM_ID (0x0501007au)
+
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[1].bslnCoeff)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_OFFSET (123u)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_REGULAR_IIR_BL_N_PARAM_ID (0x0501007bu)
+
+#define CY_CAPSENSE_BUTTON1_STATUS_VALUE (cy_capsense_tuner.widgetContext[1].status)
+#define CY_CAPSENSE_BUTTON1_STATUS_OFFSET (124u)
+#define CY_CAPSENSE_BUTTON1_STATUS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_STATUS_PARAM_ID (0x0101007cu)
+
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[1].wdTouch.ptrPosition)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_OFFSET (128u)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_BUTTON1_PTRPOSITION_PARAM_ID (0x03010080u)
+
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[1].wdTouch.numPosition)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_OFFSET (132u)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_NUM_POSITIONS_PARAM_ID (0x01010084u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_VALUE (cy_capsense_tuner.widgetContext[2].fingerCap)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_OFFSET (136u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_CP_PARAM_ID (0x06020088u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_VALUE (cy_capsense_tuner.widgetContext[2].sigPFC)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_OFFSET (138u)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SIGPFC_PARAM_ID (0x0602008au)
+
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_VALUE (cy_capsense_tuner.widgetContext[2].resolution)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_OFFSET (140u)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_RESOLUTION_PARAM_ID (0x0602008cu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[2].maxRawCount)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_OFFSET (142u)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_MAX_RAW_COUNT_PARAM_ID (0x0602008eu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_MAX_RAW_COUNT_VALUE (cy_capsense_tuner.widgetContext[2].maxRawCountRow)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_MAX_RAW_COUNT_OFFSET (144u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_MAX_RAW_COUNT_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_MAX_RAW_COUNT_PARAM_ID (0x06020090u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_VALUE (cy_capsense_tuner.widgetContext[2].fingerTh)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_OFFSET (146u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_FINGER_TH_PARAM_ID (0x02020092u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_VALUE (cy_capsense_tuner.widgetContext[2].proxTh)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_OFFSET (148u)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_PROX_TOUCH_TH_PARAM_ID (0x02020094u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_VALUE (cy_capsense_tuner.widgetContext[2].lowBslnRst)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_OFFSET (150u)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_LOW_BSLN_RST_PARAM_ID (0x06020096u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[2].snsClk)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_OFFSET (152u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_PARAM_ID (0x06020098u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_VALUE (cy_capsense_tuner.widgetContext[2].rowSnsClk)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_OFFSET (154u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_SNS_CLK_PARAM_ID (0x0602009au)
+
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_VALUE (cy_capsense_tuner.widgetContext[2].gestureDetected)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_OFFSET (156u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DETECTED_PARAM_ID (0x0202009cu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_VALUE (cy_capsense_tuner.widgetContext[2].gestureDirection)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_OFFSET (158u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_GESTURE_DIRECTION_PARAM_ID (0x0202009eu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_VALUE (cy_capsense_tuner.widgetContext[2].xDelta)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_OFFSET (160u)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_XDELTA_PARAM_ID (0x020200a0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_VALUE (cy_capsense_tuner.widgetContext[2].yDelta)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_OFFSET (162u)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_YDELTA_PARAM_ID (0x020200a2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_VALUE (cy_capsense_tuner.widgetContext[2].noiseTh)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_OFFSET (164u)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_NOISE_TH_PARAM_ID (0x020200a4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_VALUE (cy_capsense_tuner.widgetContext[2].nNoiseTh)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_OFFSET (166u)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_NNOISE_TH_PARAM_ID (0x020200a6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_VALUE (cy_capsense_tuner.widgetContext[2].hysteresis)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_OFFSET (168u)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_HYSTERESIS_PARAM_ID (0x020200a8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_VALUE (cy_capsense_tuner.widgetContext[2].onDebounce)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_OFFSET (170u)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ON_DEBOUNCE_PARAM_ID (0x050200aau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_VALUE (cy_capsense_tuner.widgetContext[2].snsClkSource)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_OFFSET (171u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS_CLK_SOURCE_PARAM_ID (0x050200abu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[0])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_OFFSET (172u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD0_PARAM_ID (0x050200acu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[1])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_OFFSET (173u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD1_PARAM_ID (0x050200adu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[2].idacMod[2])
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_OFFSET (174u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_MOD2_PARAM_ID (0x050200aeu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_VALUE (cy_capsense_tuner.widgetContext[2].idacGainIndex)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_OFFSET (175u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_IDAC_GAIN_INDEX_PARAM_ID (0x050200afu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[0])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_OFFSET (176u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD0_PARAM_ID (0x050200b0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[1])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_OFFSET (177u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD1_PARAM_ID (0x050200b1u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_VALUE (cy_capsense_tuner.widgetContext[2].rowIdacMod[2])
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_OFFSET (178u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_ROW_IDAC_MOD2_PARAM_ID (0x050200b2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_VALUE (cy_capsense_tuner.widgetContext[2].bslnCoeff)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_OFFSET (179u)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_REGULAR_IIR_BL_N_PARAM_ID (0x050200b3u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_VALUE (cy_capsense_tuner.widgetContext[2].status)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_OFFSET (180u)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_STATUS_PARAM_ID (0x010200b4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_VALUE (cy_capsense_tuner.widgetContext[2].wdTouch.ptrPosition)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_OFFSET (184u)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_SIZE (4u)
+#define CY_CAPSENSE_LINEARSLIDER0_PTRPOSITION_PARAM_ID (0x030200b8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_VALUE (cy_capsense_tuner.widgetContext[2].wdTouch.numPosition)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_OFFSET (188u)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_POSITIONS_PARAM_ID (0x010200bcu)
+
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_VALUE (cy_capsense_tuner.sensorContext[0].raw)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_OFFSET (192u)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_RAW0_PARAM_ID (0x020000c0u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[0].bsln)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_OFFSET (194u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN0_PARAM_ID (0x020000c2u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[0].diff)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_OFFSET (196u)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON0_RX0_DIFF0_PARAM_ID (0x020000c4u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[0].status)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_OFFSET (198u)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_STATUS0_PARAM_ID (0x010000c6u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[0].negBslnRstCnt)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_OFFSET (199u)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010000c7u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[0].idacComp)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_OFFSET (200u)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_IDAC0_PARAM_ID (0x010000c8u)
+
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[0].bslnExt)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_OFFSET (201u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON0_RX0_BSLN_EXT0_PARAM_ID (0x010000c9u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_VALUE (cy_capsense_tuner.sensorContext[1].raw)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_OFFSET (202u)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_RAW0_PARAM_ID (0x020100cau)
+
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[1].bsln)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_OFFSET (204u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN0_PARAM_ID (0x020100ccu)
+
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[1].diff)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_OFFSET (206u)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_BUTTON1_RX0_DIFF0_PARAM_ID (0x020100ceu)
+
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[1].status)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_OFFSET (208u)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_STATUS0_PARAM_ID (0x010100d0u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[1].negBslnRstCnt)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_OFFSET (209u)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010100d1u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[1].idacComp)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_OFFSET (210u)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_IDAC0_PARAM_ID (0x010100d2u)
+
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[1].bslnExt)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_OFFSET (211u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_BUTTON1_RX0_BSLN_EXT0_PARAM_ID (0x010100d3u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_VALUE (cy_capsense_tuner.sensorContext[2].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_OFFSET (212u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_RAW0_PARAM_ID (0x020200d4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_VALUE (cy_capsense_tuner.sensorContext[2].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_OFFSET (214u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN0_PARAM_ID (0x020200d6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_VALUE (cy_capsense_tuner.sensorContext[2].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_OFFSET (216u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_DIFF0_PARAM_ID (0x020200d8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_VALUE (cy_capsense_tuner.sensorContext[2].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_OFFSET (218u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_STATUS0_PARAM_ID (0x010200dau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[2].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_OFFSET (219u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200dbu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_VALUE (cy_capsense_tuner.sensorContext[2].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_OFFSET (220u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_IDAC0_PARAM_ID (0x010200dcu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[2].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_OFFSET (221u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_BSLN_EXT0_PARAM_ID (0x010200ddu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_VALUE (cy_capsense_tuner.sensorContext[3].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_OFFSET (222u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_RAW0_PARAM_ID (0x020200deu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_VALUE (cy_capsense_tuner.sensorContext[3].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_OFFSET (224u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN0_PARAM_ID (0x020200e0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_VALUE (cy_capsense_tuner.sensorContext[3].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_OFFSET (226u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_DIFF0_PARAM_ID (0x020200e2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_VALUE (cy_capsense_tuner.sensorContext[3].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_OFFSET (228u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_STATUS0_PARAM_ID (0x010200e4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[3].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_OFFSET (229u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200e5u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_VALUE (cy_capsense_tuner.sensorContext[3].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_OFFSET (230u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_IDAC0_PARAM_ID (0x010200e6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[3].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_OFFSET (231u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_BSLN_EXT0_PARAM_ID (0x010200e7u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_VALUE (cy_capsense_tuner.sensorContext[4].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_OFFSET (232u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_RAW0_PARAM_ID (0x020200e8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_VALUE (cy_capsense_tuner.sensorContext[4].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_OFFSET (234u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN0_PARAM_ID (0x020200eau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_VALUE (cy_capsense_tuner.sensorContext[4].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_OFFSET (236u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_DIFF0_PARAM_ID (0x020200ecu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_VALUE (cy_capsense_tuner.sensorContext[4].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_OFFSET (238u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_STATUS0_PARAM_ID (0x010200eeu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[4].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_OFFSET (239u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200efu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_VALUE (cy_capsense_tuner.sensorContext[4].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_OFFSET (240u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_IDAC0_PARAM_ID (0x010200f0u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[4].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_OFFSET (241u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_BSLN_EXT0_PARAM_ID (0x010200f1u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_VALUE (cy_capsense_tuner.sensorContext[5].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_OFFSET (242u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_RAW0_PARAM_ID (0x020200f2u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_VALUE (cy_capsense_tuner.sensorContext[5].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_OFFSET (244u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN0_PARAM_ID (0x020200f4u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_VALUE (cy_capsense_tuner.sensorContext[5].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_OFFSET (246u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_DIFF0_PARAM_ID (0x020200f6u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_VALUE (cy_capsense_tuner.sensorContext[5].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_OFFSET (248u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_STATUS0_PARAM_ID (0x010200f8u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[5].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_OFFSET (249u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_PARAM_ID (0x010200f9u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_VALUE (cy_capsense_tuner.sensorContext[5].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_OFFSET (250u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_IDAC0_PARAM_ID (0x010200fau)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[5].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_OFFSET (251u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_BSLN_EXT0_PARAM_ID (0x010200fbu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_VALUE (cy_capsense_tuner.sensorContext[6].raw)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_OFFSET (252u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_RAW0_PARAM_ID (0x020200fcu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_VALUE (cy_capsense_tuner.sensorContext[6].bsln)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_OFFSET (254u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN0_PARAM_ID (0x020200feu)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_VALUE (cy_capsense_tuner.sensorContext[6].diff)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_OFFSET (256u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_DIFF0_PARAM_ID (0x02020100u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_VALUE (cy_capsense_tuner.sensorContext[6].status)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_OFFSET (258u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_STATUS0_PARAM_ID (0x01020102u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_VALUE (cy_capsense_tuner.sensorContext[6].negBslnRstCnt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_OFFSET (259u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_PARAM_ID (0x01020103u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_VALUE (cy_capsense_tuner.sensorContext[6].idacComp)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_OFFSET (260u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_IDAC0_PARAM_ID (0x01020104u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_VALUE (cy_capsense_tuner.sensorContext[6].bslnExt)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_OFFSET (261u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_SIZE (1u)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_BSLN_EXT0_PARAM_ID (0x01020105u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_X0_VALUE (cy_capsense_tuner.position[0].x)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_OFFSET (262u)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_X0_PARAM_ID (0x02020106u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_VALUE (cy_capsense_tuner.position[0].y)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_OFFSET (264u)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_Y0_PARAM_ID (0x02020108u)
+
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_VALUE (cy_capsense_tuner.position[0].z)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_OFFSET (266u)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_Z0_PARAM_ID (0x0202010au)
+
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_VALUE (cy_capsense_tuner.position[0].id)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_OFFSET (268u)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_SIZE (2u)
+#define CY_CAPSENSE_LINEARSLIDER0_ID0_PARAM_ID (0x0202010cu)
+
+#endif
+/* cy_capsense_context */
+#define CY_CAPSENSE_COMMON_CONFIG_PTR_VALUE (cy_capsense_context.ptrCommonConfig)
+#define CY_CAPSENSE_COMMON_CONFIG_PTR_SIZE (sizeof(cy_capsense_context.ptrCommonConfig))
+
+#define CY_CAPSENSE_COMMON_CONTEXT_PTR_VALUE (cy_capsense_context.ptrCommonContext)
+#define CY_CAPSENSE_COMMON_CONTEXT_PTR_SIZE (sizeof(cy_capsense_context.ptrCommonContext))
+
+#define CY_CAPSENSE_INTERNAL_CONTEXT_PTR_VALUE (cy_capsense_context.ptrInternalContext)
+#define CY_CAPSENSE_INTERNAL_CONTEXT_PTR_SIZE (sizeof(cy_capsense_context.ptrInternalContext))
+
+#define CY_CAPSENSE_WD_CONFIG_PTR_VALUE (cy_capsense_context.ptrWdConfig)
+#define CY_CAPSENSE_WD_CONFIG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig))
+
+#define CY_CAPSENSE_WD_CONTEXT_PTR_VALUE (cy_capsense_context.ptrWdContext)
+#define CY_CAPSENSE_WD_CONTEXT_PTR_SIZE (sizeof(cy_capsense_context.ptrWdContext))
+
+#define CY_CAPSENSE_PIN_CONFIG_PTR_VALUE (cy_capsense_context.ptrPinConfig)
+#define CY_CAPSENSE_PIN_CONFIG_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig))
+
+#define CY_CAPSENSE_SHIELD_PIN_CONFIG_PTR_VALUE (cy_capsense_context.ptrShieldPinConfig)
+#define CY_CAPSENSE_SHIELD_PIN_CONFIG_PTR_SIZE (sizeof(cy_capsense_context.ptrShieldPinConfig))
+
+#define CY_CAPSENSE_ACTIVE_SCAN_SNS_PTR_VALUE (cy_capsense_context.ptrActiveScanSns)
+#define CY_CAPSENSE_ACTIVE_SCAN_SNS_PTR_SIZE (sizeof(cy_capsense_context.ptrActiveScanSns))
+
+#if (CY_CAPSENSE_MW_VERSION < 300)
+#define CY_CAPSENSE_FPTR_CONFIG_PTR_VALUE (cy_capsense_context.ptrFptrConfig)
+#define CY_CAPSENSE_FPTR_CONFIG_PTR_SIZE (sizeof(cy_capsense_context.ptrFptrConfig))
+#endif
+
+#define CY_CAPSENSE_BIST_CONTEXT_PTR_VALUE (cy_capsense_context.ptrBistContext)
+#define CY_CAPSENSE_BIST_CONTEXT_PTR_SIZE (sizeof(cy_capsense_context.ptrBistContext))
+
+/* cy_capsense_commonConfig */
+#define CY_CAPSENSE_CPU_CLK_HZ_VALUE (cy_capsense_context.ptrCommonConfig->cpuClkHz)
+#define CY_CAPSENSE_CPU_CLK_HZ_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->cpuClkHz))
+
+#define CY_CAPSENSE_PERI_CLK_HZ_VALUE (cy_capsense_context.ptrCommonConfig->periClkHz)
+#define CY_CAPSENSE_PERI_CLK_HZ_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->periClkHz))
+
+#define CY_CAPSENSE_VDDA_VALUE (cy_capsense_context.ptrCommonConfig->vdda)
+#define CY_CAPSENSE_VDDA_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->vdda))
+
+#define CY_CAPSENSE_NUM_PIN_VALUE (cy_capsense_context.ptrCommonConfig->numPin)
+#define CY_CAPSENSE_NUM_PIN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->numPin))
+
+#define CY_CAPSENSE_NUM_SNS_VALUE (cy_capsense_context.ptrCommonConfig->numSns)
+#define CY_CAPSENSE_NUM_SNS_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->numSns))
+
+#define CY_CAPSENSE_NUM_WD_VALUE (cy_capsense_context.ptrCommonConfig->numWd)
+#define CY_CAPSENSE_NUM_WD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->numWd))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSD_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdEn)
+#define CY_CAPSENSE_CSD_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdEn))
+
+#define CY_CAPSENSE_CSX_EN_VALUE (cy_capsense_context.ptrCommonConfig->csxEn)
+#define CY_CAPSENSE_CSX_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxEn))
+
+#if (CY_CAPSENSE_MW_VERSION < 300)
+#define CY_CAPSENSE_MFS_EN_VALUE (cy_capsense_context.ptrCommonConfig->mfsEn)
+#define CY_CAPSENSE_MFS_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->mfsEn))
+#endif
+
+#define CY_CAPSENSE_BIST_EN_VALUE (cy_capsense_context.ptrCommonConfig->bistEn)
+#define CY_CAPSENSE_BIST_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->bistEn))
+
+#define CY_CAPSENSE_POSITION_FILTER_EN_VALUE (cy_capsense_context.ptrCommonConfig->positionFilterEn)
+#define CY_CAPSENSE_POSITION_FILTER_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->positionFilterEn))
+#endif
+
+#define CY_CAPSENSE_PERI_DIVIDER_TYPE_VALUE (cy_capsense_context.ptrCommonConfig->periDividerType)
+#define CY_CAPSENSE_PERI_DIVIDER_TYPE_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->periDividerType))
+
+#define CY_CAPSENSE_PERI_DIVIDER_INDEX_VALUE (cy_capsense_context.ptrCommonConfig->periDividerIndex)
+#define CY_CAPSENSE_PERI_DIVIDER_INDEX_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->periDividerIndex))
+
+#define CY_CAPSENSE_ANALOG_WAKEUP_DELAY_VALUE (cy_capsense_context.ptrCommonConfig->analogWakeupDelay)
+#define CY_CAPSENSE_ANALOG_WAKEUP_DELAY_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->analogWakeupDelay))
+
+#define CY_CAPSENSE_SS_IREF_SOURCE_VALUE (cy_capsense_context.ptrCommonConfig->ssIrefSource)
+#define CY_CAPSENSE_SS_IREF_SOURCE_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->ssIrefSource))
+
+#define CY_CAPSENSE_SS_VREF_SOURCE_VALUE (cy_capsense_context.ptrCommonConfig->ssVrefSource)
+#define CY_CAPSENSE_SS_VREF_SOURCE_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->ssVrefSource))
+
+#define CY_CAPSENSE_PROX_TOUCH_COEFF_VALUE (cy_capsense_context.ptrCommonConfig->proxTouchCoeff)
+#define CY_CAPSENSE_PROX_TOUCH_COEFF_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->proxTouchCoeff))
+
+#define CY_CAPSENSE_SW_SENSOR_AUTO_RESET_EN_VALUE (cy_capsense_context.ptrCommonConfig->swSensorAutoResetEn)
+#define CY_CAPSENSE_SW_SENSOR_AUTO_RESET_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->swSensorAutoResetEn))
+
+#define CY_CAPSENSE_PORT_CMOD_PAD_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portCmodPadNum)
+#define CY_CAPSENSE_PORT_CMOD_PAD_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCmodPadNum))
+
+#define CY_CAPSENSE_PIN_CMOD_PAD_VALUE (cy_capsense_context.ptrCommonConfig->pinCmodPad)
+#define CY_CAPSENSE_PIN_CMOD_PAD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCmodPad))
+
+#define CY_CAPSENSE_PORT_CSH_PAD_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portCshPadNum)
+#define CY_CAPSENSE_PORT_CSH_PAD_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCshPadNum))
+
+#define CY_CAPSENSE_PIN_CSH_PAD_VALUE (cy_capsense_context.ptrCommonConfig->pinCshPad)
+#define CY_CAPSENSE_PIN_CSH_PAD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCshPad))
+
+#define CY_CAPSENSE_PORT_SHIELD_PAD_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portShieldPadNum)
+#define CY_CAPSENSE_PORT_SHIELD_PAD_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portShieldPadNum))
+
+#define CY_CAPSENSE_PIN_SHIELD_PAD_VALUE (cy_capsense_context.ptrCommonConfig->pinShieldPad)
+#define CY_CAPSENSE_PIN_SHIELD_PAD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinShieldPad))
+
+#define CY_CAPSENSE_PORT_VREF_EXT_PAD_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portVrefExtPadNum)
+#define CY_CAPSENSE_PORT_VREF_EXT_PAD_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portVrefExtPadNum))
+
+#define CY_CAPSENSE_PIN_VREF_EXT_PAD_VALUE (cy_capsense_context.ptrCommonConfig->pinVrefExtPad)
+#define CY_CAPSENSE_PIN_VREF_EXT_PAD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinVrefExtPad))
+
+#define CY_CAPSENSE_PORT_CMOD_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portCmodNum)
+#define CY_CAPSENSE_PORT_CMOD_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCmodNum))
+
+#define CY_CAPSENSE_IDAC_GAIN_TABLE_PTR_VALUE (&cy_capsense_context.ptrCommonConfig->idacGainTable[0u])
+#define CY_CAPSENSE_IDAC_GAIN_TABLE_PTR_SIZE (sizeof(&cy_capsense_context.ptrCommonConfig->idacGainTable[0u]))
+
+#define CY_CAPSENSE_PTR_CSD_BASE_VALUE (cy_capsense_context.ptrCommonConfig->ptrCsdBase)
+#define CY_CAPSENSE_PTR_CSD_BASE_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->ptrCsdBase))
+
+#define CY_CAPSENSE_PTR_CSD_CONTEXT_VALUE (cy_capsense_context.ptrCommonConfig->ptrCsdContext)
+#define CY_CAPSENSE_PTR_CSD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->ptrCsdContext))
+
+#define CY_CAPSENSE_PORT_CMOD_VALUE (cy_capsense_context.ptrCommonConfig->portCmod)
+#define CY_CAPSENSE_PORT_CMOD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCmod))
+
+#define CY_CAPSENSE_PORT_CSH_VALUE (cy_capsense_context.ptrCommonConfig->portCsh)
+#define CY_CAPSENSE_PORT_CSH_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCsh))
+
+#define CY_CAPSENSE_PORT_CINT_A_VALUE (cy_capsense_context.ptrCommonConfig->portCintA)
+#define CY_CAPSENSE_PORT_CINT_A_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCintA))
+
+#define CY_CAPSENSE_PORT_CINT_B_VALUE (cy_capsense_context.ptrCommonConfig->portCintB)
+#define CY_CAPSENSE_PORT_CINT_B_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCintB))
+
+#define CY_CAPSENSE_PIN_CMOD_VALUE (cy_capsense_context.ptrCommonConfig->pinCmod)
+#define CY_CAPSENSE_PIN_CMOD_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCmod))
+
+#define CY_CAPSENSE_PORT_CSH_NUM_VALUE (cy_capsense_context.ptrCommonConfig->portCshNum)
+#define CY_CAPSENSE_PORT_CSH_NUM_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->portCshNum))
+
+#define CY_CAPSENSE_PIN_CSH_VALUE (cy_capsense_context.ptrCommonConfig->pinCsh)
+#define CY_CAPSENSE_PIN_CSH_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCsh))
+
+#define CY_CAPSENSE_PIN_CINT_A_VALUE (cy_capsense_context.ptrCommonConfig->pinCintA)
+#define CY_CAPSENSE_PIN_CINT_A_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCintA))
+
+#define CY_CAPSENSE_PIN_CINT_B_VALUE (cy_capsense_context.ptrCommonConfig->pinCintB)
+#define CY_CAPSENSE_PIN_CINT_B_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->pinCintB))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSD_SHIELD_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdShieldEn)
+#define CY_CAPSENSE_CSD_SHIELD_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdShieldEn))
+#endif
+
+#define CY_CAPSENSE_CSD_INACTIVE_SNS_CONNECTION_VALUE (cy_capsense_context.ptrCommonConfig->csdInactiveSnsConnection)
+#define CY_CAPSENSE_CSD_INACTIVE_SNS_CONNECTION_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdInactiveSnsConnection))
+
+#if (CY_CAPSENSE_MW_VERSION >= 300)
+#define CY_CAPSENSE_CSX_INACTIVE_SNS_CONNECTION_VALUE (cy_capsense_context.ptrCommonConfig->csxInactiveSnsConnection)
+#define CY_CAPSENSE_CSX_INACTIVE_SNS_CONNECTION_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxInactiveSnsConnection))
+#endif
+
+#define CY_CAPSENSE_CSD_SHIELD_DELAY_VALUE (cy_capsense_context.ptrCommonConfig->csdShieldDelay)
+#define CY_CAPSENSE_CSD_SHIELD_DELAY_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdShieldDelay))
+
+#define CY_CAPSENSE_CSD_VREF_VALUE (cy_capsense_context.ptrCommonConfig->csdVref)
+#define CY_CAPSENSE_CSD_VREF_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdVref))
+
+#define CY_CAPSENSE_CSD_R_CONST_VALUE (cy_capsense_context.ptrCommonConfig->csdRConst)
+#define CY_CAPSENSE_CSD_R_CONST_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdRConst))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSD_C_TANK_SHIELD_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdCTankShieldEn)
+#define CY_CAPSENSE_CSD_C_TANK_SHIELD_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdCTankShieldEn))
+#endif
+
+#define CY_CAPSENSE_CSD_SHIELD_NUM_PIN_VALUE (cy_capsense_context.ptrCommonConfig->csdShieldNumPin)
+#define CY_CAPSENSE_CSD_SHIELD_NUM_PIN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdShieldNumPin))
+
+#define CY_CAPSENSE_CSD_SHIELD_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csdShieldSwRes)
+#define CY_CAPSENSE_CSD_SHIELD_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdShieldSwRes))
+
+#define CY_CAPSENSE_CSD_INIT_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csdInitSwRes)
+#define CY_CAPSENSE_CSD_INIT_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdInitSwRes))
+
+#define CY_CAPSENSE_CSD_CHARGE_TRANSFER_VALUE (cy_capsense_context.ptrCommonConfig->csdChargeTransfer)
+#define CY_CAPSENSE_CSD_CHARGE_TRANSFER_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdChargeTransfer))
+
+#define CY_CAPSENSE_CSD_RAW_TARGET_VALUE (cy_capsense_context.ptrCommonConfig->csdRawTarget)
+#define CY_CAPSENSE_CSD_RAW_TARGET_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdRawTarget))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSD_AUTOTUNE_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdAutotuneEn)
+#define CY_CAPSENSE_CSD_AUTOTUNE_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdAutotuneEn))
+
+#define CY_CAPSENSE_CSD_IDAC_AUTOCAL_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacAutocalEn)
+#define CY_CAPSENSE_CSD_IDAC_AUTOCAL_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacAutocalEn))
+
+#define CY_CAPSENSE_CSD_IDAC_AUTO_GAIN_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacAutoGainEn)
+#define CY_CAPSENSE_CSD_IDAC_AUTO_GAIN_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacAutoGainEn))
+#endif
+
+#define CY_CAPSENSE_CSD_CALIBRATION_ERROR_VALUE (cy_capsense_context.ptrCommonConfig->csdCalibrationError)
+#define CY_CAPSENSE_CSD_CALIBRATION_ERROR_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdCalibrationError))
+
+#define CY_CAPSENSE_CSD_IDAC_GAIN_INIT_INDEX_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacGainInitIndex)
+#define CY_CAPSENSE_CSD_IDAC_GAIN_INIT_INDEX_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacGainInitIndex))
+
+#define CY_CAPSENSE_CSD_IDAC_MIN_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacMin)
+#define CY_CAPSENSE_CSD_IDAC_MIN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacMin))
+
+#define CY_CAPSENSE_CSD_IDAC_COMP_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacCompEn)
+#define CY_CAPSENSE_CSD_IDAC_COMP_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacCompEn))
+
+#define CY_CAPSENSE_CSD_FINE_INIT_TIME_VALUE (cy_capsense_context.ptrCommonConfig->csdFineInitTime)
+#define CY_CAPSENSE_CSD_FINE_INIT_TIME_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdFineInitTime))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSD_IDAC_ROW_COL_ALIGN_EN_VALUE (cy_capsense_context.ptrCommonConfig->csdIdacRowColAlignEn)
+#define CY_CAPSENSE_CSD_IDAC_ROW_COL_ALIGN_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdIdacRowColAlignEn))
+#endif
+
+#define CY_CAPSENSE_CSD_MFS_DIVIDER_OFFSET_F1_VALUE (cy_capsense_context.ptrCommonConfig->csdMfsDividerOffsetF1)
+#define CY_CAPSENSE_CSD_MFS_DIVIDER_OFFSET_F1_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdMfsDividerOffsetF1))
+
+#define CY_CAPSENSE_CSD_MFS_DIVIDER_OFFSET_F2_VALUE (cy_capsense_context.ptrCommonConfig->csdMfsDividerOffsetF2)
+#define CY_CAPSENSE_CSD_MFS_DIVIDER_OFFSET_F2_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csdMfsDividerOffsetF2))
+
+#define CY_CAPSENSE_CSX_RAW_TARGET_VALUE (cy_capsense_context.ptrCommonConfig->csxRawTarget)
+#define CY_CAPSENSE_CSX_RAW_TARGET_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxRawTarget))
+
+#if (CY_CAPSENSE_MW_VERSION < 400)
+#define CY_CAPSENSE_CSX_IDAC_GAIN_INIT_INDEX_VALUE (cy_capsense_context.ptrCommonConfig->csxIdacGainInitIndex)
+#define CY_CAPSENSE_CSX_IDAC_GAIN_INIT_INDEX_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxIdacGainInitIndex))
+
+#define CY_CAPSENSE_CSX_REF_GAIN_VALUE (cy_capsense_context.ptrCommonConfig->csxRefGain)
+#define CY_CAPSENSE_CSX_REF_GAIN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxRefGain))
+
+#define CY_CAPSENSE_CSX_IDAC_AUTOCAL_EN_VALUE (cy_capsense_context.ptrCommonConfig->csxIdacAutocalEn)
+#define CY_CAPSENSE_CSX_IDAC_AUTOCAL_EN_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxIdacAutocalEn))
+#endif
+
+#define CY_CAPSENSE_CSX_CALIBRATION_ERROR_VALUE (cy_capsense_context.ptrCommonConfig->csxCalibrationError)
+#define CY_CAPSENSE_CSX_CALIBRATION_ERROR_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxCalibrationError))
+
+#define CY_CAPSENSE_CSX_FINE_INIT_TIME_VALUE (cy_capsense_context.ptrCommonConfig->csxFineInitTime)
+#define CY_CAPSENSE_CSX_FINE_INIT_TIME_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxFineInitTime))
+
+#define CY_CAPSENSE_CSX_INIT_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csxInitSwRes)
+#define CY_CAPSENSE_CSX_INIT_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxInitSwRes))
+
+#define CY_CAPSENSE_CSX_SCAN_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csxScanSwRes)
+#define CY_CAPSENSE_CSX_SCAN_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxScanSwRes))
+
+#define CY_CAPSENSE_CSX_INIT_SHIELD_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csxInitShieldSwRes)
+#define CY_CAPSENSE_CSX_INIT_SHIELD_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxInitShieldSwRes))
+
+#define CY_CAPSENSE_CSX_SCAN_SHIELD_SW_RES_VALUE (cy_capsense_context.ptrCommonConfig->csxScanShieldSwRes)
+#define CY_CAPSENSE_CSX_SCAN_SHIELD_SW_RES_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxScanShieldSwRes))
+
+#define CY_CAPSENSE_CSX_MFS_DIVIDER_OFFSET_F1_VALUE (cy_capsense_context.ptrCommonConfig->csxMfsDividerOffsetF1)
+#define CY_CAPSENSE_CSX_MFS_DIVIDER_OFFSET_F1_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxMfsDividerOffsetF1))
+
+#define CY_CAPSENSE_CSX_MFS_DIVIDER_OFFSET_F2_VALUE (cy_capsense_context.ptrCommonConfig->csxMfsDividerOffsetF2)
+#define CY_CAPSENSE_CSX_MFS_DIVIDER_OFFSET_F2_SIZE (sizeof(cy_capsense_context.ptrCommonConfig->csxMfsDividerOffsetF2))
+
+/* cy_capsense_widgetConfig */
+#define CY_CAPSENSE_BUTTON0_PTR_WD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrWdContext)
+#define CY_CAPSENSE_BUTTON0_PTR_WD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrWdContext))
+#define CY_CAPSENSE_BUTTON0_PTR_SNS_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrSnsContext)
+#define CY_CAPSENSE_BUTTON0_PTR_SNS_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrSnsContext))
+#define CY_CAPSENSE_BUTTON0_PTR_ELTD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrEltdConfig)
+#define CY_CAPSENSE_BUTTON0_PTR_ELTD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrEltdConfig))
+#define CY_CAPSENSE_BUTTON0_PTR_ELTD_CAPACITANCE_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrEltdCapacitance)
+#define CY_CAPSENSE_BUTTON0_PTR_ELTD_CAPACITANCE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrEltdCapacitance))
+#define CY_CAPSENSE_BUTTON0_PTR_BSLN_INV_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrBslnInv)
+#define CY_CAPSENSE_BUTTON0_PTR_BSLN_INV_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrBslnInv))
+#define CY_CAPSENSE_BUTTON0_PTR_NOISE_ENVELOPE_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrNoiseEnvelope)
+#define CY_CAPSENSE_BUTTON0_PTR_NOISE_ENVELOPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrNoiseEnvelope))
+#define CY_CAPSENSE_BUTTON0_PTR_RAW_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrRawFilterHistory)
+#define CY_CAPSENSE_BUTTON0_PTR_RAW_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrRawFilterHistory))
+#define CY_CAPSENSE_BUTTON0_PTR_RAW_FILTER_HISTORY_LOW_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrRawFilterHistoryLow)
+#define CY_CAPSENSE_BUTTON0_PTR_RAW_FILTER_HISTORY_LOW_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrRawFilterHistoryLow))
+#define CY_CAPSENSE_BUTTON0_IIR_COEFF_VALUE (cy_capsense_context.ptrWdConfig[0u].iirCoeff)
+#define CY_CAPSENSE_BUTTON0_IIR_COEFF_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].iirCoeff))
+#define CY_CAPSENSE_BUTTON0_PTR_DEBOUNCE_ARR_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrDebounceArr)
+#define CY_CAPSENSE_BUTTON0_PTR_DEBOUNCE_ARR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrDebounceArr))
+#define CY_CAPSENSE_BUTTON0_PTR_DIPLEX_TABLE_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrDiplexTable)
+#define CY_CAPSENSE_BUTTON0_PTR_DIPLEX_TABLE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrDiplexTable))
+#define CY_CAPSENSE_BUTTON0_CENTROID_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].centroidConfig)
+#define CY_CAPSENSE_BUTTON0_CENTROID_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].centroidConfig))
+#define CY_CAPSENSE_BUTTON0_X_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[0u].xResolution)
+#define CY_CAPSENSE_BUTTON0_X_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].xResolution))
+#define CY_CAPSENSE_BUTTON0_Y_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[0u].yResolution)
+#define CY_CAPSENSE_BUTTON0_Y_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].yResolution))
+#define CY_CAPSENSE_BUTTON0_NUM_SNS_VALUE (cy_capsense_context.ptrWdConfig[0u].numSns)
+#define CY_CAPSENSE_BUTTON0_NUM_SNS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].numSns))
+#define CY_CAPSENSE_BUTTON0_NUM_COLS_VALUE (cy_capsense_context.ptrWdConfig[0u].numCols)
+#define CY_CAPSENSE_BUTTON0_NUM_COLS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].numCols))
+#define CY_CAPSENSE_BUTTON0_NUM_ROWS_VALUE (cy_capsense_context.ptrWdConfig[0u].numRows)
+#define CY_CAPSENSE_BUTTON0_NUM_ROWS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].numRows))
+#define CY_CAPSENSE_BUTTON0_PTR_POS_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrPosFilterHistory)
+#define CY_CAPSENSE_BUTTON0_PTR_POS_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrPosFilterHistory))
+#define CY_CAPSENSE_BUTTON0_PTR_CSX_TOUCH_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrCsxTouchHistory)
+#define CY_CAPSENSE_BUTTON0_PTR_CSX_TOUCH_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrCsxTouchHistory))
+#define CY_CAPSENSE_BUTTON0_PTR_CSX_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrCsxTouchBuffer)
+#define CY_CAPSENSE_BUTTON0_PTR_CSX_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrCsxTouchBuffer))
+#define CY_CAPSENSE_BUTTON0_PTR_CSD_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrCsdTouchBuffer)
+#define CY_CAPSENSE_BUTTON0_PTR_CSD_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrCsdTouchBuffer))
+#define CY_CAPSENSE_BUTTON0_PTR_GESTURE_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrGestureConfig)
+#define CY_CAPSENSE_BUTTON0_PTR_GESTURE_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrGestureConfig))
+#define CY_CAPSENSE_BUTTON0_PTR_GESTURE_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrGestureContext)
+#define CY_CAPSENSE_BUTTON0_PTR_GESTURE_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrGestureContext))
+#define CY_CAPSENSE_BUTTON0_BALLISTIC_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].ballisticConfig)
+#define CY_CAPSENSE_BUTTON0_BALLISTIC_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ballisticConfig))
+#define CY_CAPSENSE_BUTTON0_PTR_BALLISTIC_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[0u].ptrBallisticContext)
+#define CY_CAPSENSE_BUTTON0_PTR_BALLISTIC_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].ptrBallisticContext))
+#define CY_CAPSENSE_BUTTON0_AIIR_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].aiirConfig)
+#define CY_CAPSENSE_BUTTON0_AIIR_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].aiirConfig))
+#define CY_CAPSENSE_BUTTON0_ADV_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].advConfig)
+#define CY_CAPSENSE_BUTTON0_ADV_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].advConfig))
+#define CY_CAPSENSE_BUTTON0_POS_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].posFilterConfig)
+#define CY_CAPSENSE_BUTTON0_POS_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].posFilterConfig))
+#define CY_CAPSENSE_BUTTON0_RAW_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[0u].rawFilterConfig)
+#define CY_CAPSENSE_BUTTON0_RAW_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].rawFilterConfig))
+#define CY_CAPSENSE_BUTTON0_SENSE_METHOD_VALUE (cy_capsense_context.ptrWdConfig[0u].senseMethod)
+#define CY_CAPSENSE_BUTTON0_SENSE_METHOD_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].senseMethod))
+#define CY_CAPSENSE_BUTTON0_WD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[0u].wdType)
+#define CY_CAPSENSE_BUTTON0_WD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0u].wdType))
+
+#define CY_CAPSENSE_BUTTON1_PTR_WD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrWdContext)
+#define CY_CAPSENSE_BUTTON1_PTR_WD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrWdContext))
+#define CY_CAPSENSE_BUTTON1_PTR_SNS_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrSnsContext)
+#define CY_CAPSENSE_BUTTON1_PTR_SNS_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrSnsContext))
+#define CY_CAPSENSE_BUTTON1_PTR_ELTD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrEltdConfig)
+#define CY_CAPSENSE_BUTTON1_PTR_ELTD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrEltdConfig))
+#define CY_CAPSENSE_BUTTON1_PTR_ELTD_CAPACITANCE_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrEltdCapacitance)
+#define CY_CAPSENSE_BUTTON1_PTR_ELTD_CAPACITANCE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrEltdCapacitance))
+#define CY_CAPSENSE_BUTTON1_PTR_BSLN_INV_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrBslnInv)
+#define CY_CAPSENSE_BUTTON1_PTR_BSLN_INV_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrBslnInv))
+#define CY_CAPSENSE_BUTTON1_PTR_NOISE_ENVELOPE_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrNoiseEnvelope)
+#define CY_CAPSENSE_BUTTON1_PTR_NOISE_ENVELOPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrNoiseEnvelope))
+#define CY_CAPSENSE_BUTTON1_PTR_RAW_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrRawFilterHistory)
+#define CY_CAPSENSE_BUTTON1_PTR_RAW_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrRawFilterHistory))
+#define CY_CAPSENSE_BUTTON1_PTR_RAW_FILTER_HISTORY_LOW_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrRawFilterHistoryLow)
+#define CY_CAPSENSE_BUTTON1_PTR_RAW_FILTER_HISTORY_LOW_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrRawFilterHistoryLow))
+#define CY_CAPSENSE_BUTTON1_IIR_COEFF_VALUE (cy_capsense_context.ptrWdConfig[1u].iirCoeff)
+#define CY_CAPSENSE_BUTTON1_IIR_COEFF_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].iirCoeff))
+#define CY_CAPSENSE_BUTTON1_PTR_DEBOUNCE_ARR_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrDebounceArr)
+#define CY_CAPSENSE_BUTTON1_PTR_DEBOUNCE_ARR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrDebounceArr))
+#define CY_CAPSENSE_BUTTON1_PTR_DIPLEX_TABLE_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrDiplexTable)
+#define CY_CAPSENSE_BUTTON1_PTR_DIPLEX_TABLE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrDiplexTable))
+#define CY_CAPSENSE_BUTTON1_CENTROID_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].centroidConfig)
+#define CY_CAPSENSE_BUTTON1_CENTROID_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].centroidConfig))
+#define CY_CAPSENSE_BUTTON1_X_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[1u].xResolution)
+#define CY_CAPSENSE_BUTTON1_X_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].xResolution))
+#define CY_CAPSENSE_BUTTON1_Y_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[1u].yResolution)
+#define CY_CAPSENSE_BUTTON1_Y_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].yResolution))
+#define CY_CAPSENSE_BUTTON1_NUM_SNS_VALUE (cy_capsense_context.ptrWdConfig[1u].numSns)
+#define CY_CAPSENSE_BUTTON1_NUM_SNS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].numSns))
+#define CY_CAPSENSE_BUTTON1_NUM_COLS_VALUE (cy_capsense_context.ptrWdConfig[1u].numCols)
+#define CY_CAPSENSE_BUTTON1_NUM_COLS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].numCols))
+#define CY_CAPSENSE_BUTTON1_NUM_ROWS_VALUE (cy_capsense_context.ptrWdConfig[1u].numRows)
+#define CY_CAPSENSE_BUTTON1_NUM_ROWS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].numRows))
+#define CY_CAPSENSE_BUTTON1_PTR_POS_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrPosFilterHistory)
+#define CY_CAPSENSE_BUTTON1_PTR_POS_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrPosFilterHistory))
+#define CY_CAPSENSE_BUTTON1_PTR_CSX_TOUCH_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrCsxTouchHistory)
+#define CY_CAPSENSE_BUTTON1_PTR_CSX_TOUCH_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrCsxTouchHistory))
+#define CY_CAPSENSE_BUTTON1_PTR_CSX_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrCsxTouchBuffer)
+#define CY_CAPSENSE_BUTTON1_PTR_CSX_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrCsxTouchBuffer))
+#define CY_CAPSENSE_BUTTON1_PTR_CSD_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrCsdTouchBuffer)
+#define CY_CAPSENSE_BUTTON1_PTR_CSD_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrCsdTouchBuffer))
+#define CY_CAPSENSE_BUTTON1_PTR_GESTURE_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrGestureConfig)
+#define CY_CAPSENSE_BUTTON1_PTR_GESTURE_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrGestureConfig))
+#define CY_CAPSENSE_BUTTON1_PTR_GESTURE_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrGestureContext)
+#define CY_CAPSENSE_BUTTON1_PTR_GESTURE_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrGestureContext))
+#define CY_CAPSENSE_BUTTON1_BALLISTIC_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].ballisticConfig)
+#define CY_CAPSENSE_BUTTON1_BALLISTIC_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ballisticConfig))
+#define CY_CAPSENSE_BUTTON1_PTR_BALLISTIC_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[1u].ptrBallisticContext)
+#define CY_CAPSENSE_BUTTON1_PTR_BALLISTIC_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].ptrBallisticContext))
+#define CY_CAPSENSE_BUTTON1_AIIR_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].aiirConfig)
+#define CY_CAPSENSE_BUTTON1_AIIR_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].aiirConfig))
+#define CY_CAPSENSE_BUTTON1_ADV_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].advConfig)
+#define CY_CAPSENSE_BUTTON1_ADV_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].advConfig))
+#define CY_CAPSENSE_BUTTON1_POS_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].posFilterConfig)
+#define CY_CAPSENSE_BUTTON1_POS_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].posFilterConfig))
+#define CY_CAPSENSE_BUTTON1_RAW_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[1u].rawFilterConfig)
+#define CY_CAPSENSE_BUTTON1_RAW_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].rawFilterConfig))
+#define CY_CAPSENSE_BUTTON1_SENSE_METHOD_VALUE (cy_capsense_context.ptrWdConfig[1u].senseMethod)
+#define CY_CAPSENSE_BUTTON1_SENSE_METHOD_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].senseMethod))
+#define CY_CAPSENSE_BUTTON1_WD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[1u].wdType)
+#define CY_CAPSENSE_BUTTON1_WD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1u].wdType))
+
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_WD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrWdContext)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_WD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrWdContext))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_SNS_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrSnsContext)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_SNS_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrSnsContext))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_ELTD_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrEltdConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_ELTD_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrEltdConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_ELTD_CAPACITANCE_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrEltdCapacitance)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_ELTD_CAPACITANCE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrEltdCapacitance))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_BSLN_INV_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrBslnInv)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_BSLN_INV_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrBslnInv))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_NOISE_ENVELOPE_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrNoiseEnvelope)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_NOISE_ENVELOPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrNoiseEnvelope))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_RAW_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrRawFilterHistory)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_RAW_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrRawFilterHistory))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_RAW_FILTER_HISTORY_LOW_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrRawFilterHistoryLow)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_RAW_FILTER_HISTORY_LOW_SIZE \
+ (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrRawFilterHistoryLow))
+#define CY_CAPSENSE_LINEARSLIDER0_IIR_COEFF_VALUE (cy_capsense_context.ptrWdConfig[2u].iirCoeff)
+#define CY_CAPSENSE_LINEARSLIDER0_IIR_COEFF_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].iirCoeff))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_DEBOUNCE_ARR_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrDebounceArr)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_DEBOUNCE_ARR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrDebounceArr))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_DIPLEX_TABLE_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrDiplexTable)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_DIPLEX_TABLE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrDiplexTable))
+#define CY_CAPSENSE_LINEARSLIDER0_CENTROID_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].centroidConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_CENTROID_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].centroidConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_X_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[2u].xResolution)
+#define CY_CAPSENSE_LINEARSLIDER0_X_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].xResolution))
+#define CY_CAPSENSE_LINEARSLIDER0_Y_RESOLUTION_VALUE (cy_capsense_context.ptrWdConfig[2u].yResolution)
+#define CY_CAPSENSE_LINEARSLIDER0_Y_RESOLUTION_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].yResolution))
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_SNS_VALUE (cy_capsense_context.ptrWdConfig[2u].numSns)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_SNS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].numSns))
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_COLS_VALUE (cy_capsense_context.ptrWdConfig[2u].numCols)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_COLS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].numCols))
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_ROWS_VALUE (cy_capsense_context.ptrWdConfig[2u].numRows)
+#define CY_CAPSENSE_LINEARSLIDER0_NUM_ROWS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].numRows))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_POS_FILTER_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrPosFilterHistory)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_POS_FILTER_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrPosFilterHistory))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSX_TOUCH_HISTORY_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrCsxTouchHistory)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSX_TOUCH_HISTORY_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrCsxTouchHistory))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSX_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrCsxTouchBuffer)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSX_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrCsxTouchBuffer))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSD_TOUCH_BUFFER_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrCsdTouchBuffer)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_CSD_TOUCH_BUFFER_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrCsdTouchBuffer))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_GESTURE_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrGestureConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_GESTURE_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrGestureConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_GESTURE_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrGestureContext)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_GESTURE_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrGestureContext))
+#define CY_CAPSENSE_LINEARSLIDER0_BALLISTIC_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].ballisticConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_BALLISTIC_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ballisticConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_BALLISTIC_CONTEXT_VALUE (cy_capsense_context.ptrWdConfig[2u].ptrBallisticContext)
+#define CY_CAPSENSE_LINEARSLIDER0_PTR_BALLISTIC_CONTEXT_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].ptrBallisticContext))
+#define CY_CAPSENSE_LINEARSLIDER0_AIIR_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].aiirConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_AIIR_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].aiirConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_ADV_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].advConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_ADV_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].advConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_POS_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].posFilterConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_POS_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].posFilterConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_RAW_FILTER_CONFIG_VALUE (cy_capsense_context.ptrWdConfig[2u].rawFilterConfig)
+#define CY_CAPSENSE_LINEARSLIDER0_RAW_FILTER_CONFIG_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].rawFilterConfig))
+#define CY_CAPSENSE_LINEARSLIDER0_SENSE_METHOD_VALUE (cy_capsense_context.ptrWdConfig[2u].senseMethod)
+#define CY_CAPSENSE_LINEARSLIDER0_SENSE_METHOD_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].senseMethod))
+#define CY_CAPSENSE_LINEARSLIDER0_WD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2u].wdType)
+#define CY_CAPSENSE_LINEARSLIDER0_WD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2u].wdType))
+
+/* cy_capsense_pinConfig */
+#define CY_CAPSENSE_BUTTON0_RX0_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[0].pcPtr)
+#define CY_CAPSENSE_BUTTON0_RX0_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[0].pcPtr))
+#define CY_CAPSENSE_BUTTON0_RX0_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[0].pinNumber)
+#define CY_CAPSENSE_BUTTON0_RX0_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[0].pinNumber))
+
+#define CY_CAPSENSE_BUTTON0_TX_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[1].pcPtr)
+#define CY_CAPSENSE_BUTTON0_TX_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[1].pcPtr))
+#define CY_CAPSENSE_BUTTON0_TX_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[1].pinNumber)
+#define CY_CAPSENSE_BUTTON0_TX_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[1].pinNumber))
+
+#define CY_CAPSENSE_BUTTON1_RX0_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[2].pcPtr)
+#define CY_CAPSENSE_BUTTON1_RX0_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[2].pcPtr))
+#define CY_CAPSENSE_BUTTON1_RX0_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[2].pinNumber)
+#define CY_CAPSENSE_BUTTON1_RX0_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[2].pinNumber))
+
+#define CY_CAPSENSE_BUTTON1_TX_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[3].pcPtr)
+#define CY_CAPSENSE_BUTTON1_TX_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[3].pcPtr))
+#define CY_CAPSENSE_BUTTON1_TX_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[3].pinNumber)
+#define CY_CAPSENSE_BUTTON1_TX_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[3].pinNumber))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[4].pcPtr)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[4].pcPtr))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[4].pinNumber)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[4].pinNumber))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[5].pcPtr)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[5].pcPtr))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[5].pinNumber)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[5].pinNumber))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[6].pcPtr)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[6].pcPtr))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[6].pinNumber)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[6].pinNumber))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[7].pcPtr)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[7].pcPtr))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[7].pinNumber)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[7].pinNumber))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_PIN0_PC_PTR_VALUE (cy_capsense_context.ptrPinConfig[8].pcPtr)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_PIN0_PC_PTR_SIZE (sizeof(cy_capsense_context.ptrPinConfig[8].pcPtr))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_PIN0_NUMBER_VALUE (cy_capsense_context.ptrPinConfig[8].pinNumber)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_PIN0_NUMBER_SIZE (sizeof(cy_capsense_context.ptrPinConfig[8].pinNumber))
+
+/* cy_capsense_electrodeConfig */
+#define CY_CAPSENSE_BUTTON0_RX0_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].ptrPin)
+#define CY_CAPSENSE_BUTTON0_RX0_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].ptrPin))
+#define CY_CAPSENSE_BUTTON0_RX0_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].type)
+#define CY_CAPSENSE_BUTTON0_RX0_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].type))
+#define CY_CAPSENSE_BUTTON0_RX0_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].numPins)
+#define CY_CAPSENSE_BUTTON0_RX0_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[0].numPins))
+
+#define CY_CAPSENSE_BUTTON0_TX_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].ptrPin)
+#define CY_CAPSENSE_BUTTON0_TX_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].ptrPin))
+#define CY_CAPSENSE_BUTTON0_TX_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].type)
+#define CY_CAPSENSE_BUTTON0_TX_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].type))
+#define CY_CAPSENSE_BUTTON0_TX_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].numPins)
+#define CY_CAPSENSE_BUTTON0_TX_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[0].ptrEltdConfig[1].numPins))
+
+#define CY_CAPSENSE_BUTTON1_RX0_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].ptrPin)
+#define CY_CAPSENSE_BUTTON1_RX0_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].ptrPin))
+#define CY_CAPSENSE_BUTTON1_RX0_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].type)
+#define CY_CAPSENSE_BUTTON1_RX0_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].type))
+#define CY_CAPSENSE_BUTTON1_RX0_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].numPins)
+#define CY_CAPSENSE_BUTTON1_RX0_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[0].numPins))
+
+#define CY_CAPSENSE_BUTTON1_TX_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].ptrPin)
+#define CY_CAPSENSE_BUTTON1_TX_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].ptrPin))
+#define CY_CAPSENSE_BUTTON1_TX_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].type)
+#define CY_CAPSENSE_BUTTON1_TX_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].type))
+#define CY_CAPSENSE_BUTTON1_TX_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].numPins)
+#define CY_CAPSENSE_BUTTON1_TX_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[1].ptrEltdConfig[1].numPins))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].ptrPin)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].ptrPin))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].type)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].type))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].numPins)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS0_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[0].numPins))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].ptrPin)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].ptrPin))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].type)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].type))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].numPins)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS1_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[1].numPins))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].ptrPin)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].ptrPin))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].type)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].type))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].numPins)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS2_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[2].numPins))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].ptrPin)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].ptrPin))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].type)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].type))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].numPins)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS3_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[3].numPins))
+
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_CFG_PTR_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].ptrPin)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_CFG_PTR_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].ptrPin))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_ELTD_TYPE_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].type)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_ELTD_TYPE_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].type))
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NUM_PINS_VALUE (cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].numPins)
+#define CY_CAPSENSE_LINEARSLIDER0_SNS4_NUM_PINS_SIZE (sizeof(cy_capsense_context.ptrWdConfig[2].ptrEltdConfig[4].numPins))
+
+#if ((CY_CAPSENSE_PERI_CLK / 2) > 50000000)
+#warning The maximum CSD modulator clock frequency is 50 MHz: increase CSD modulator clock divider to meet the valid operation conditions
+#endif
+
+#if ((CY_CAPSENSE_PERI_CLK / 2) > 50000000)
+#warning The maximum CSX modulator clock frequency is 50 MHz: increase CSX modulator clock divider to meet the valid operation conditions
+#endif
+
+#if ((CY_CAPSENSE_PERI_CLK / 2 / 32) > 3000000)
+#warning The maximum Tx clock frequency is 3 MHz: increase Tx clock divider for widget Button0 to meet the valid operation conditions
+#endif
+
+#if ((CY_CAPSENSE_PERI_CLK / 2 / 32) > 3000000)
+#warning The maximum Tx clock frequency is 3 MHz: increase Tx clock divider for widget Button1 to meet the valid operation conditions
+#endif
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CY_CAPSENSE_CORE == __CORTEX_M */
+
+#endif /* !defined(CY_DISABLE_CAPSENSE) */
+
+#endif /* (defined(COMPONENT_MW_CAPSENSE) || !defined(COMPONENT_MW_CORE_MAKE)) */
+
+#endif /* CYCFG_CAPSENSE_H */
+
+/* [] END OF FILE */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.timestamp b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.timestamp
new file mode 100644
index 00000000000000..1f1e351cf22890
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense.timestamp
@@ -0,0 +1,26 @@
+/*******************************************************************************
+* File Name: cycfg_capsense.timestamp
+*
+* Description:
+* Sentinel file for determining if generated source is up to date.
+* This file was automatically generated and should not be modified.
+* CAPSENSE Configurator 6.10.0.3796
+*
+********************************************************************************
+* Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+* an affiliate of Cypress Semiconductor Corporation.
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_defines.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_defines.h
new file mode 100644
index 00000000000000..570294dcd562e1
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_defines.h
@@ -0,0 +1,159 @@
+/*******************************************************************************
+ * File Name: cycfg_capsense_defines.h
+ *
+ * Description:
+ * CAPSENSE configuration defines.
+ *
+ * Note: This file is required for the CAPSENSE Middleware Library to build
+ * successfully.
+ *
+ * This file should not be modified. It was automatically generated by
+ * CAPSENSE Configurator 6.10.0.3796
+ *
+ ********************************************************************************
+ * Copyright 2024, Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+#if !defined(CYCFG_CAPSENSE_DEFINES_H)
+#define CYCFG_CAPSENSE_DEFINES_H
+
+#include <stddef.h>
+
+/* General */
+#define CY_CAPSENSE_WIDGET_COUNT (3u)
+#define CY_CAPSENSE_ACTIVE_WIDGET_COUNT (CY_CAPSENSE_WIDGET_COUNT)
+#define CY_CAPSENSE_LP_WIDGET_COUNT (0u)
+#define CY_CAPSENSE_TOTAL_WIDGET_COUNT (CY_CAPSENSE_WIDGET_COUNT)
+#define CY_CAPSENSE_SENSOR_COUNT (7u)
+#define CY_CAPSENSE_ELTD_COUNT (9u)
+#define CY_CAPSENSE_PIN_COUNT (9u)
+#define CY_CAPSENSE_SHIELD_PIN_COUNT (0u)
+#define CY_CAPSENSE_POSITION_SIZE (1u)
+#define CY_CAPSENSE_DEBOUNCE_SIZE (3u)
+#define CY_CAPSENSE_NOISE_ENVELOPE_SIZE (5u)
+#define CY_CAPSENSE_MFS_CH_NUMBER (1u)
+#define CY_CAPSENSE_RAW_HISTORY_SIZE (0u)
+#define CY_CAPSENSE_IIR_HISTORY_LOW_SIZE (0u)
+#define CY_CAPSENSE_RAW_ALP_HISTORY_SIZE (0u)
+#define CY_CAPSENSE_POSITION_FILTER_HISTORY_SIZE (0u)
+#define CY_CAPSENSE_TOUCH_FILTER_HISTORY_SIZE (0u)
+#define CY_CAPSENSE_DIPLEX_SIZE (0u)
+#define CY_CAPSENSE_CSD_TOUCHPAD_MAX_SENSORS_SIZE (0u)
+#define CY_CAPSENSE_CSX_TOUCH_BUFFER_ENABLE (0u)
+#define CY_CAPSENSE_CSX_TOUCH_HISTORY_SIZE (0u)
+#define CY_CAPSENSE_BALLISTIC_WIDGET_COUNT (0u)
+#define CY_CAPSENSE_GESTURE_WIDGET_COUNT (0u)
+
+/* Sensing Methods */
+#define CY_CAPSENSE_CSD_EN (1u)
+#define CY_CAPSENSE_CSX_EN (1u)
+#define CY_CAPSENSE_ISX_EN (0u)
+#define CY_CAPSENSE_CSD_CALIBRATION_EN (1u)
+#define CY_CAPSENSE_CSX_CALIBRATION_EN (1u)
+#define CY_CAPSENSE_SMARTSENSE_FULL_EN (1u)
+#define CY_CAPSENSE_SMARTSENSE_HW_EN (0u)
+#define CY_CAPSENSE_SMARTSENSE_DISABLED (0u)
+#define CY_CAPSENSE_CSD_AUTOTUNE_EN (CY_CAPSENSE_SMARTSENSE_FULL_EN | CY_CAPSENSE_SMARTSENSE_HW_EN)
+#define CY_CAPSENSE_CSD_SHIELD_EN (0u)
+#define CY_CAPSENSE_CSD_SHIELD_CAP_EN (0u)
+#define CY_CAPSENSE_CSD_CHARGE_TRANSFER (0u)
+#define CY_CAPSENSE_CSD_IDAC_COMP_EN (1u)
+#define CY_CAPSENSE_CSD_IDAC_AUTO_GAIN_EN (1u)
+#define CY_CAPSENSE_CSD_IDAC_ROW_COL_ALIGN_EN (1u)
+#define CY_CAPSENSE_LFSR_EN (1u)
+#define CY_CAPSENSE_LFSR_AUTO_EN (1u)
+#define CY_CAPSENSE_CLOCK_SOURCE_AUTO_EN (1u)
+
+/* Filtering */
+#define CY_CAPSENSE_ADAPTIVE_FILTER_EN (0u)
+#define CY_CAPSENSE_BALLISTIC_MULTIPLIER_EN (0u)
+#define CY_CAPSENSE_RAWCOUNT_FILTER_EN (0u)
+#define CY_CAPSENSE_RC_ALP_FILTER_EN (0u)
+#define CY_CAPSENSE_REGULAR_RC_IIR_FILTER_EN (0u)
+#define CY_CAPSENSE_REGULAR_RC_MEDIAN_FILTER_EN (0u)
+#define CY_CAPSENSE_REGULAR_RC_AVERAGE_FILTER_EN (0u)
+#define CY_CAPSENSE_REGULAR_RC_ALP_FILTER_EN (0u)
+#define CY_CAPSENSE_REGULAR_RC_FILTER_EN \
+ (CY_CAPSENSE_REGULAR_RC_IIR_FILTER_EN | CY_CAPSENSE_REGULAR_RC_MEDIAN_FILTER_EN | CY_CAPSENSE_REGULAR_RC_AVERAGE_FILTER_EN | \
+ CY_CAPSENSE_REGULAR_RC_ALP_FILTER_EN)
+#define CY_CAPSENSE_PROX_RC_IIR_FILTER_EN (0u)
+#define CY_CAPSENSE_PROX_RC_MEDIAN_FILTER_EN (0u)
+#define CY_CAPSENSE_PROX_RC_AVERAGE_FILTER_EN (0u)
+#define CY_CAPSENSE_PROX_RC_ALP_FILTER_EN (0u)
+#define CY_CAPSENSE_PROX_RC_FILTER_EN \
+ (CY_CAPSENSE_PROX_RC_IIR_FILTER_EN | CY_CAPSENSE_PROX_RC_MEDIAN_FILTER_EN | CY_CAPSENSE_PROX_RC_AVERAGE_FILTER_EN | \
+ CY_CAPSENSE_PROX_RC_ALP_FILTER_EN)
+#define CY_CAPSENSE_POSITION_FILTER_EN (0u)
+#define CY_CAPSENSE_CSD_POSITION_FILTER_EN (0u)
+#define CY_CAPSENSE_CSX_POSITION_FILTER_EN (0u)
+#define CY_CAPSENSE_POS_IIR_FILTER_EN (0u)
+#define CY_CAPSENSE_POS_MEDIAN_FILTER_EN (0u)
+#define CY_CAPSENSE_POS_AVERAGE_FILTER_EN (0u)
+#define CY_CAPSENSE_POS_JITTER_FILTER_EN (0u)
+
+/* Widgets */
+#define CY_CAPSENSE_CSD_BUTTON_EN (0u)
+#define CY_CAPSENSE_CSD_MATRIX_EN (0u)
+#define CY_CAPSENSE_CSD_SLIDER_EN (1u)
+#define CY_CAPSENSE_CSD_TOUCHPAD_EN (0u)
+#define CY_CAPSENSE_CSD_PROXIMITY_EN (0u)
+#define CY_CAPSENSE_CSX_BUTTON_EN (1u)
+#define CY_CAPSENSE_CSX_SLIDER_EN (0u)
+#define CY_CAPSENSE_CSX_MATRIX_EN (0u)
+#define CY_CAPSENSE_CSX_TOUCHPAD_EN (0u)
+#define CY_CAPSENSE_ISX_BUTTON_EN (0u)
+#define CY_CAPSENSE_ISX_PROXIMITY_EN (0u)
+#define CY_CAPSENSE_ISX_LINEAR_SLIDER_EN (0u)
+#define CY_CAPSENSE_ISX_DIPLEX_SLIDER_EN (0u)
+#define CY_CAPSENSE_ADVANCED_CENTROID_5X5_EN (0u)
+#define CY_CAPSENSE_CSD_LINEAR_SLIDER_EN (1u)
+#define CY_CAPSENSE_CSD_RADIAL_SLIDER_EN (0u)
+#define CY_CAPSENSE_CSD_DIPLEX_SLIDER_EN (0u)
+#define CY_CAPSENSE_CSX_LINEAR_SLIDER_EN (0u)
+#define CY_CAPSENSE_CSX_DIPLEX_SLIDER_EN (0u)
+#define CY_CAPSENSE_GANGED_SNS_EN (0u)
+#define CY_CAPSENSE_CSD_GANGED_SNS_EN (0u)
+#define CY_CAPSENSE_CSX_GANGED_SNS_EN (0u)
+#define CY_CAPSENSE_BUTTON_EN (1u)
+#define CY_CAPSENSE_MATRIX_EN (0u)
+#define CY_CAPSENSE_SLIDER_EN (1u)
+#define CY_CAPSENSE_LINEAR_SLIDER_EN (1u)
+#define CY_CAPSENSE_RADIAL_SLIDER_EN (0u)
+#define CY_CAPSENSE_DIPLEX_SLIDER_EN (0u)
+#define CY_CAPSENSE_TOUCHPAD_EN (0u)
+#define CY_CAPSENSE_PROXIMITY_EN (0u)
+
+/* Features */
+#define CY_CAPSENSE_GESTURE_EN (0u)
+#define CY_CAPSENSE_MULTI_FREQUENCY_SCAN_EN (0u)
+#define CY_CAPSENSE_MULTI_FREQUENCY_WIDGET_EN (0u)
+#define CY_CAPSENSE_SNS_AUTO_RESET_EN (0u)
+
+/* Self-test */
+#define CY_CAPSENSE_BIST_EN (0u)
+#define CY_CAPSENSE_TST_WDGT_CRC_EN (0u)
+#define CY_CAPSENSE_TST_BSLN_INTEGRITY_EN (0u)
+#define CY_CAPSENSE_TST_RAW_INTEGRITY_EN (0u)
+#define CY_CAPSENSE_TST_SNS_SHORT_EN (0u)
+#define CY_CAPSENSE_TST_SNS_CAP_EN (0u)
+#define CY_CAPSENSE_TST_SH_CAP_EN (0u)
+#define CY_CAPSENSE_TST_EXTERNAL_CAP_EN (0u)
+#define CY_CAPSENSE_TST_VDDA_EN (0u)
+
+#endif /* CYCFG_CAPSENSE_DEFINES_H */
+
+/* [] END OF FILE */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_tuner_regmap.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_tuner_regmap.h
new file mode 100644
index 00000000000000..650ac462f4ee74
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_capsense_tuner_regmap.h
@@ -0,0 +1,972 @@
+/*******************************************************************************
+ * File Name: cycfg_capsense_tuner_regmap.h
+ *
+ * Description:
+ * CAPSENSE Tuner register map configuration.
+ * This file should not be modified. It was automatically generated by
+ * CAPSENSE Configurator 6.10.0.3796
+ *
+ ********************************************************************************
+ * Copyright 2024, Cypress Semiconductor Corporation (an Infineon company)
+ * or an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *******************************************************************************/
+
+#if !defined(CYCFG_CAPSENSE_TUNER_REGMAP_H)
+#define CYCFG_CAPSENSE_TUNER_REGMAP_H
+
+#include "cy_capsense_common.h"
+
+#if !defined(CY_CAPSENSE_MW_VERSION)
+#define CY_CAPSENSE_TUNER_MW_VERSION (200)
+#else
+#define CY_CAPSENSE_TUNER_MW_VERSION (CY_CAPSENSE_MW_VERSION)
+#endif
+
+/* RAM Data structure register definitions */
+#if (CY_CAPSENSE_TUNER_MW_VERSION < 300)
+#define CY_CAPSENSE_TUNER_CONFIG_ID_OFFSET (0u)
+#define CY_CAPSENSE_TUNER_CONFIG_ID_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_TUNER_CMD_OFFSET (2u)
+#define CY_CAPSENSE_TUNER_TUNER_CMD_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_SCAN_COUNTER_OFFSET (4u)
+#define CY_CAPSENSE_TUNER_SCAN_COUNTER_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_TUNER_ST_OFFSET (6u)
+#define CY_CAPSENSE_TUNER_TUNER_ST_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_INITDONE_OFFSET (7u)
+#define CY_CAPSENSE_TUNER_INITDONE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_PTRSSCALLBACK_OFFSET (8u)
+#define CY_CAPSENSE_TUNER_PTRSSCALLBACK_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_PTREOSCALLBACK_OFFSET (12u)
+#define CY_CAPSENSE_TUNER_PTREOSCALLBACK_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_PTRTUNERSENDCALLBACK_OFFSET (16u)
+#define CY_CAPSENSE_TUNER_PTRTUNERSENDCALLBACK_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_PTRTUNERRECEIVECALLBACK_OFFSET (20u)
+#define CY_CAPSENSE_TUNER_PTRTUNERRECEIVECALLBACK_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_STATUS_OFFSET (24u)
+#define CY_CAPSENSE_TUNER_STATUS_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_TIMESTAMPINTERVAL_OFFSET (28u)
+#define CY_CAPSENSE_TUNER_TIMESTAMPINTERVAL_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_TIMESTAMP_OFFSET (32u)
+#define CY_CAPSENSE_TUNER_TIMESTAMP_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_CSD_MOD_CLK_DIVIDER_OFFSET (36u)
+#define CY_CAPSENSE_TUNER_CSD_MOD_CLK_DIVIDER_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_CSX_MOD_CLK_DIVIDER_OFFSET (37u)
+#define CY_CAPSENSE_TUNER_CSX_MOD_CLK_DIVIDER_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_TUNER_CNT_OFFSET (38u)
+#define CY_CAPSENSE_TUNER_TUNER_CNT_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_CP_OFFSET (40u)
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_SIGPFC_OFFSET (42u)
+#define CY_CAPSENSE_TUNER_BUTTON0_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_CONV_OFFSET (44u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_CONV_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_MAX_RAW_COUNT_OFFSET (46u)
+#define CY_CAPSENSE_TUNER_BUTTON0_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_TH_OFFSET (48u)
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_PROX_TOUCH_TH_OFFSET (50u)
+#define CY_CAPSENSE_TUNER_BUTTON0_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_LOW_BSLN_RST_OFFSET (52u)
+#define CY_CAPSENSE_TUNER_BUTTON0_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_OFFSET (54u)
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_SNS_CLK_OFFSET (56u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DETECTED_OFFSET (58u)
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DIRECTION_OFFSET (60u)
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_XDELTA_OFFSET (62u)
+#define CY_CAPSENSE_TUNER_BUTTON0_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_YDELTA_OFFSET (64u)
+#define CY_CAPSENSE_TUNER_BUTTON0_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NOISE_TH_OFFSET (66u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NNOISE_TH_OFFSET (67u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NNOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_HYSTERESIS_OFFSET (68u)
+#define CY_CAPSENSE_TUNER_BUTTON0_HYSTERESIS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ON_DEBOUNCE_OFFSET (69u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SOURCE_OFFSET (70u)
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD0_OFFSET (71u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD1_OFFSET (72u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD2_OFFSET (73u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_GAIN_INDEX_OFFSET (74u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD0_OFFSET (75u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD1_OFFSET (76u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD2_OFFSET (77u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_REGULAR_IIR_BL_N_OFFSET (78u)
+#define CY_CAPSENSE_TUNER_BUTTON0_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_STATUS_OFFSET (79u)
+#define CY_CAPSENSE_TUNER_BUTTON0_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_PTRPOSITION_OFFSET (80u)
+#define CY_CAPSENSE_TUNER_BUTTON0_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_POSITIONS_OFFSET (84u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_CP_OFFSET (88u)
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_SIGPFC_OFFSET (90u)
+#define CY_CAPSENSE_TUNER_BUTTON1_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_CONV_OFFSET (92u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_CONV_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_MAX_RAW_COUNT_OFFSET (94u)
+#define CY_CAPSENSE_TUNER_BUTTON1_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_TH_OFFSET (96u)
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_PROX_TOUCH_TH_OFFSET (98u)
+#define CY_CAPSENSE_TUNER_BUTTON1_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_LOW_BSLN_RST_OFFSET (100u)
+#define CY_CAPSENSE_TUNER_BUTTON1_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_OFFSET (102u)
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_SNS_CLK_OFFSET (104u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DETECTED_OFFSET (106u)
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DIRECTION_OFFSET (108u)
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_XDELTA_OFFSET (110u)
+#define CY_CAPSENSE_TUNER_BUTTON1_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_YDELTA_OFFSET (112u)
+#define CY_CAPSENSE_TUNER_BUTTON1_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NOISE_TH_OFFSET (114u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NNOISE_TH_OFFSET (115u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NNOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_HYSTERESIS_OFFSET (116u)
+#define CY_CAPSENSE_TUNER_BUTTON1_HYSTERESIS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ON_DEBOUNCE_OFFSET (117u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SOURCE_OFFSET (118u)
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD0_OFFSET (119u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD1_OFFSET (120u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD2_OFFSET (121u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_GAIN_INDEX_OFFSET (122u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD0_OFFSET (123u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD1_OFFSET (124u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD2_OFFSET (125u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_REGULAR_IIR_BL_N_OFFSET (126u)
+#define CY_CAPSENSE_TUNER_BUTTON1_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_STATUS_OFFSET (127u)
+#define CY_CAPSENSE_TUNER_BUTTON1_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_PTRPOSITION_OFFSET (128u)
+#define CY_CAPSENSE_TUNER_BUTTON1_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_POSITIONS_OFFSET (132u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_CP_OFFSET (136u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SIGPFC_OFFSET (138u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_RESOLUTION_OFFSET (140u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_RESOLUTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_MAX_RAW_COUNT_OFFSET (142u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_TH_OFFSET (144u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PROX_TOUCH_TH_OFFSET (146u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_LOW_BSLN_RST_OFFSET (148u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_OFFSET (150u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_SNS_CLK_OFFSET (152u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DETECTED_OFFSET (154u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DIRECTION_OFFSET (156u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_XDELTA_OFFSET (158u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_YDELTA_OFFSET (160u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NOISE_TH_OFFSET (162u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NNOISE_TH_OFFSET (163u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NNOISE_TH_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_HYSTERESIS_OFFSET (164u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_HYSTERESIS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ON_DEBOUNCE_OFFSET (165u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SOURCE_OFFSET (166u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD0_OFFSET (167u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD1_OFFSET (168u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD2_OFFSET (169u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_GAIN_INDEX_OFFSET (170u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD0_OFFSET (171u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD1_OFFSET (172u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD2_OFFSET (173u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_REGULAR_IIR_BL_N_OFFSET (174u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_STATUS_OFFSET (175u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PTRPOSITION_OFFSET (176u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NUM_POSITIONS_OFFSET (180u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_RAW0_OFFSET (184u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN0_OFFSET (186u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_DIFF0_OFFSET (188u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_STATUS0_OFFSET (190u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_NEG_BSLN_RST_CNT0_OFFSET (191u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_IDAC0_OFFSET (192u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN_EXT0_OFFSET (193u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_RAW0_OFFSET (194u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN0_OFFSET (196u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_DIFF0_OFFSET (198u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_STATUS0_OFFSET (200u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_NEG_BSLN_RST_CNT0_OFFSET (201u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_IDAC0_OFFSET (202u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN_EXT0_OFFSET (203u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_RAW0_OFFSET (204u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN0_OFFSET (206u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_DIFF0_OFFSET (208u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_STATUS0_OFFSET (210u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_OFFSET (211u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_IDAC0_OFFSET (212u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN_EXT0_OFFSET (213u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_RAW0_OFFSET (214u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN0_OFFSET (216u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_DIFF0_OFFSET (218u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_STATUS0_OFFSET (220u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_OFFSET (221u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_IDAC0_OFFSET (222u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN_EXT0_OFFSET (223u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_RAW0_OFFSET (224u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN0_OFFSET (226u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_DIFF0_OFFSET (228u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_STATUS0_OFFSET (230u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_OFFSET (231u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_IDAC0_OFFSET (232u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN_EXT0_OFFSET (233u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_RAW0_OFFSET (234u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN0_OFFSET (236u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_DIFF0_OFFSET (238u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_STATUS0_OFFSET (240u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_OFFSET (241u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_IDAC0_OFFSET (242u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN_EXT0_OFFSET (243u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_RAW0_OFFSET (244u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN0_OFFSET (246u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_DIFF0_OFFSET (248u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_STATUS0_OFFSET (250u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_OFFSET (251u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_IDAC0_OFFSET (252u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN_EXT0_OFFSET (253u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_X0_OFFSET (254u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_X0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Y0_OFFSET (256u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Y0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Z0_OFFSET (258u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Z0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ID0_OFFSET (260u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ID0_SIZE (2u)
+
+#else /* CY_CAPSENSE_TUNER_MW_VERSION >= 300 */
+#define CY_CAPSENSE_TUNER_CONFIG_ID_OFFSET (0u)
+#define CY_CAPSENSE_TUNER_CONFIG_ID_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_TUNER_CMD_OFFSET (2u)
+#define CY_CAPSENSE_TUNER_TUNER_CMD_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_SCAN_COUNTER_OFFSET (4u)
+#define CY_CAPSENSE_TUNER_SCAN_COUNTER_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_TUNER_ST_OFFSET (6u)
+#define CY_CAPSENSE_TUNER_TUNER_ST_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_INITDONE_OFFSET (7u)
+#define CY_CAPSENSE_TUNER_INITDONE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_STATUS_OFFSET (8u)
+#define CY_CAPSENSE_TUNER_STATUS_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_TIMESTAMPINTERVAL_OFFSET (12u)
+#define CY_CAPSENSE_TUNER_TIMESTAMPINTERVAL_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_TIMESTAMP_OFFSET (16u)
+#define CY_CAPSENSE_TUNER_TIMESTAMP_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_CSD_MOD_CLK_DIVIDER_OFFSET (20u)
+#define CY_CAPSENSE_TUNER_CSD_MOD_CLK_DIVIDER_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_CSX_MOD_CLK_DIVIDER_OFFSET (21u)
+#define CY_CAPSENSE_TUNER_CSX_MOD_CLK_DIVIDER_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_TUNER_CNT_OFFSET (22u)
+#define CY_CAPSENSE_TUNER_TUNER_CNT_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_CP_OFFSET (24u)
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_SIGPFC_OFFSET (26u)
+#define CY_CAPSENSE_TUNER_BUTTON0_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_CONV_OFFSET (28u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_CONV_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_MAX_RAW_COUNT_OFFSET (30u)
+#define CY_CAPSENSE_TUNER_BUTTON0_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_MAX_RAW_COUNT_OFFSET (32u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_TH_OFFSET (34u)
+#define CY_CAPSENSE_TUNER_BUTTON0_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_PROX_TOUCH_TH_OFFSET (36u)
+#define CY_CAPSENSE_TUNER_BUTTON0_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_LOW_BSLN_RST_OFFSET (38u)
+#define CY_CAPSENSE_TUNER_BUTTON0_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_OFFSET (40u)
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_SNS_CLK_OFFSET (42u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DETECTED_OFFSET (44u)
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DIRECTION_OFFSET (46u)
+#define CY_CAPSENSE_TUNER_BUTTON0_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_XDELTA_OFFSET (48u)
+#define CY_CAPSENSE_TUNER_BUTTON0_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_YDELTA_OFFSET (50u)
+#define CY_CAPSENSE_TUNER_BUTTON0_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NOISE_TH_OFFSET (52u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NNOISE_TH_OFFSET (54u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NNOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_HYSTERESIS_OFFSET (56u)
+#define CY_CAPSENSE_TUNER_BUTTON0_HYSTERESIS_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ON_DEBOUNCE_OFFSET (58u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SOURCE_OFFSET (59u)
+#define CY_CAPSENSE_TUNER_BUTTON0_TX_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD0_OFFSET (60u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD1_OFFSET (61u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD2_OFFSET (62u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_GAIN_INDEX_OFFSET (63u)
+#define CY_CAPSENSE_TUNER_BUTTON0_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD0_OFFSET (64u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD1_OFFSET (65u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD2_OFFSET (66u)
+#define CY_CAPSENSE_TUNER_BUTTON0_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_REGULAR_IIR_BL_N_OFFSET (67u)
+#define CY_CAPSENSE_TUNER_BUTTON0_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_STATUS_OFFSET (68u)
+#define CY_CAPSENSE_TUNER_BUTTON0_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_PTRPOSITION_OFFSET (72u)
+#define CY_CAPSENSE_TUNER_BUTTON0_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_POSITIONS_OFFSET (76u)
+#define CY_CAPSENSE_TUNER_BUTTON0_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_CP_OFFSET (80u)
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_SIGPFC_OFFSET (82u)
+#define CY_CAPSENSE_TUNER_BUTTON1_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_CONV_OFFSET (84u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_CONV_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_MAX_RAW_COUNT_OFFSET (86u)
+#define CY_CAPSENSE_TUNER_BUTTON1_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_MAX_RAW_COUNT_OFFSET (88u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_TH_OFFSET (90u)
+#define CY_CAPSENSE_TUNER_BUTTON1_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_PROX_TOUCH_TH_OFFSET (92u)
+#define CY_CAPSENSE_TUNER_BUTTON1_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_LOW_BSLN_RST_OFFSET (94u)
+#define CY_CAPSENSE_TUNER_BUTTON1_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_OFFSET (96u)
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_SNS_CLK_OFFSET (98u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DETECTED_OFFSET (100u)
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DIRECTION_OFFSET (102u)
+#define CY_CAPSENSE_TUNER_BUTTON1_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_XDELTA_OFFSET (104u)
+#define CY_CAPSENSE_TUNER_BUTTON1_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_YDELTA_OFFSET (106u)
+#define CY_CAPSENSE_TUNER_BUTTON1_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NOISE_TH_OFFSET (108u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NNOISE_TH_OFFSET (110u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NNOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_HYSTERESIS_OFFSET (112u)
+#define CY_CAPSENSE_TUNER_BUTTON1_HYSTERESIS_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ON_DEBOUNCE_OFFSET (114u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SOURCE_OFFSET (115u)
+#define CY_CAPSENSE_TUNER_BUTTON1_TX_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD0_OFFSET (116u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD1_OFFSET (117u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD2_OFFSET (118u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_GAIN_INDEX_OFFSET (119u)
+#define CY_CAPSENSE_TUNER_BUTTON1_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD0_OFFSET (120u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD1_OFFSET (121u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD2_OFFSET (122u)
+#define CY_CAPSENSE_TUNER_BUTTON1_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_REGULAR_IIR_BL_N_OFFSET (123u)
+#define CY_CAPSENSE_TUNER_BUTTON1_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_STATUS_OFFSET (124u)
+#define CY_CAPSENSE_TUNER_BUTTON1_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_PTRPOSITION_OFFSET (128u)
+#define CY_CAPSENSE_TUNER_BUTTON1_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_POSITIONS_OFFSET (132u)
+#define CY_CAPSENSE_TUNER_BUTTON1_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_CP_OFFSET (136u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_CP_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SIGPFC_OFFSET (138u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SIGPFC_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_RESOLUTION_OFFSET (140u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_RESOLUTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_MAX_RAW_COUNT_OFFSET (142u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_MAX_RAW_COUNT_OFFSET (144u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_MAX_RAW_COUNT_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_TH_OFFSET (146u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_FINGER_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PROX_TOUCH_TH_OFFSET (148u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PROX_TOUCH_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_LOW_BSLN_RST_OFFSET (150u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_LOW_BSLN_RST_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_OFFSET (152u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_SNS_CLK_OFFSET (154u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_SNS_CLK_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DETECTED_OFFSET (156u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DETECTED_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DIRECTION_OFFSET (158u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_GESTURE_DIRECTION_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_XDELTA_OFFSET (160u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_XDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_YDELTA_OFFSET (162u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_YDELTA_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NOISE_TH_OFFSET (164u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NNOISE_TH_OFFSET (166u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NNOISE_TH_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_HYSTERESIS_OFFSET (168u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_HYSTERESIS_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ON_DEBOUNCE_OFFSET (170u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ON_DEBOUNCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SOURCE_OFFSET (171u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS_CLK_SOURCE_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD0_OFFSET (172u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD1_OFFSET (173u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD2_OFFSET (174u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_GAIN_INDEX_OFFSET (175u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_IDAC_GAIN_INDEX_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD0_OFFSET (176u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD1_OFFSET (177u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD1_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD2_OFFSET (178u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ROW_IDAC_MOD2_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_REGULAR_IIR_BL_N_OFFSET (179u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_REGULAR_IIR_BL_N_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_STATUS_OFFSET (180u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_STATUS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PTRPOSITION_OFFSET (184u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_PTRPOSITION_SIZE (4u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NUM_POSITIONS_OFFSET (188u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_NUM_POSITIONS_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_RAW0_OFFSET (192u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN0_OFFSET (194u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_DIFF0_OFFSET (196u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_STATUS0_OFFSET (198u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_NEG_BSLN_RST_CNT0_OFFSET (199u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_IDAC0_OFFSET (200u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN_EXT0_OFFSET (201u)
+#define CY_CAPSENSE_TUNER_BUTTON0_RX0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_RAW0_OFFSET (202u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN0_OFFSET (204u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_DIFF0_OFFSET (206u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_STATUS0_OFFSET (208u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_NEG_BSLN_RST_CNT0_OFFSET (209u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_IDAC0_OFFSET (210u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN_EXT0_OFFSET (211u)
+#define CY_CAPSENSE_TUNER_BUTTON1_RX0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_RAW0_OFFSET (212u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN0_OFFSET (214u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_DIFF0_OFFSET (216u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_STATUS0_OFFSET (218u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_OFFSET (219u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_IDAC0_OFFSET (220u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN_EXT0_OFFSET (221u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS0_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_RAW0_OFFSET (222u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN0_OFFSET (224u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_DIFF0_OFFSET (226u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_STATUS0_OFFSET (228u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_OFFSET (229u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_IDAC0_OFFSET (230u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN_EXT0_OFFSET (231u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS1_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_RAW0_OFFSET (232u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN0_OFFSET (234u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_DIFF0_OFFSET (236u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_STATUS0_OFFSET (238u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_OFFSET (239u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_IDAC0_OFFSET (240u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN_EXT0_OFFSET (241u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS2_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_RAW0_OFFSET (242u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN0_OFFSET (244u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_DIFF0_OFFSET (246u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_STATUS0_OFFSET (248u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_OFFSET (249u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_IDAC0_OFFSET (250u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN_EXT0_OFFSET (251u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS3_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_RAW0_OFFSET (252u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_RAW0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN0_OFFSET (254u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_DIFF0_OFFSET (256u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_DIFF0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_STATUS0_OFFSET (258u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_STATUS0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_OFFSET (259u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_NEG_BSLN_RST_CNT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_IDAC0_OFFSET (260u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_IDAC0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN_EXT0_OFFSET (261u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_SNS4_BSLN_EXT0_SIZE (1u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_X0_OFFSET (262u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_X0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Y0_OFFSET (264u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Y0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Z0_OFFSET (266u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_Z0_SIZE (2u)
+
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ID0_OFFSET (268u)
+#define CY_CAPSENSE_TUNER_LINEARSLIDER0_ID0_SIZE (2u)
+
+#endif
+
+#endif /* CYCFG_CAPSENSE_TUNER_REGMAP_H */
+
+/* [] END OF FILE */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.c
new file mode 100644
index 00000000000000..d8298c696d8dde
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.c
@@ -0,0 +1,69 @@
+/*******************************************************************************
+ * File Name: cycfg_clocks.c
+ *
+ * Description:
+ * Clock configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_clocks.h"
+
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t peri_0_div_16_15_obj = {
+ .type = CYHAL_RSC_CLOCK,
+ .block_num = peri_0_div_16_15_HW,
+ .channel_num = peri_0_div_16_15_NUM,
+};
+const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj = {
+ .type = CYHAL_RSC_CLOCK,
+ .block_num = CYBSP_CSD_CLK_DIV_HW,
+ .channel_num = CYBSP_CSD_CLK_DIV_NUM,
+};
+const cyhal_resource_inst_t CYBSP_TRACE_CLK_DIV_obj = {
+ .type = CYHAL_RSC_CLOCK,
+ .block_num = CYBSP_TRACE_CLK_DIV_HW,
+ .channel_num = CYBSP_TRACE_CLK_DIV_NUM,
+};
+#endif // defined (CY_USING_HAL)
+
+void init_cycfg_clocks(void)
+{
+ Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_16_BIT, 15U);
+ Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 15U, 0U);
+ Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 15U);
+ Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 0U);
+ Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 0U, 0U);
+ Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 0U);
+ Cy_SysClk_PeriphDisableDivider(CY_SYSCLK_DIV_8_BIT, 7U);
+ Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 7U, 0U);
+ Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 7U);
+}
+
+void reserve_cycfg_clocks(void)
+{
+#if defined(CY_USING_HAL)
+ cyhal_hwmgr_reserve(&peri_0_div_16_15_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_CLK_DIV_obj);
+ cyhal_hwmgr_reserve(&CYBSP_TRACE_CLK_DIV_obj);
+#endif // defined (CY_USING_HAL)
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.h
new file mode 100644
index 00000000000000..8d5d6cf34f40b6
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_clocks.h
@@ -0,0 +1,69 @@
+/*******************************************************************************
+ * File Name: cycfg_clocks.h
+ *
+ * Description:
+ * Clock configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_CLOCKS_H)
+#define CYCFG_CLOCKS_H
+
+#include "cy_sysclk.h"
+#include "cycfg_notices.h"
+#if defined(CY_USING_HAL)
+#include "cyhal_hwmgr.h"
+#endif // defined (CY_USING_HAL)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define peri_0_div_16_15_ENABLED 1U
+#define peri_0_div_16_15_HW CY_SYSCLK_DIV_16_BIT
+#define peri_0_div_16_15_NUM 15U
+#define CYBSP_CSD_CLK_DIV_ENABLED 1U
+#define CYBSP_CS_CLK_DIV_ENABLED CYBSP_CSD_CLK_DIV_ENABLED
+#define CYBSP_CSD_CLK_DIV_HW CY_SYSCLK_DIV_8_BIT
+#define CYBSP_CS_CLK_DIV_HW CYBSP_CSD_CLK_DIV_HW
+#define CYBSP_CSD_CLK_DIV_NUM 0U
+#define CYBSP_CS_CLK_DIV_NUM CYBSP_CSD_CLK_DIV_NUM
+#define CYBSP_TRACE_CLK_DIV_ENABLED 1U
+#define CYBSP_TRACE_CLK_DIV_HW CY_SYSCLK_DIV_8_BIT
+#define CYBSP_TRACE_CLK_DIV_NUM 7U
+
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t peri_0_div_16_15_obj;
+extern const cyhal_resource_inst_t CYBSP_CSD_CLK_DIV_obj;
+#define CYBSP_CS_CLK_DIV_obj CYBSP_CSD_CLK_DIV_obj
+extern const cyhal_resource_inst_t CYBSP_TRACE_CLK_DIV_obj;
+#endif // defined (CY_USING_HAL)
+
+void init_cycfg_clocks(void);
+void reserve_cycfg_clocks(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_CLOCKS_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.c
new file mode 100644
index 00000000000000..8c6062f3adaccf
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.c
@@ -0,0 +1,29 @@
+/*******************************************************************************
+ * File Name: cycfg_connectivity_bt.c
+ *
+ * Description:
+ * Connectivity BT configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_connectivity_bt.h"
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.h
new file mode 100644
index 00000000000000..24fbaed1013b81
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_connectivity_bt.h
@@ -0,0 +1,52 @@
+/*******************************************************************************
+ * File Name: cycfg_connectivity_bt.h
+ *
+ * Description:
+ * Connectivity BT configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_CONNECTIVITY_BT_H)
+#define CYCFG_CONNECTIVITY_BT_H
+
+#include "cycfg_notices.h"
+#include "cycfg_pins.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define bt_0_power_0_ENABLED 1U
+#define CYCFG_BT_LP_ENABLED (1u)
+#define CYCFG_BT_WAKE_EVENT_ACTIVE_LOW (0)
+#define CYCFG_BT_WAKE_EVENT_ACTIVE_HIGH (1)
+#define CYCFG_BT_HOST_WAKE_GPIO CYBSP_BT_HOST_WAKE
+#define CYCFG_BT_HOST_WAKE_IRQ_EVENT CYBT_WAKE_ACTIVE_LOW
+#define CYCFG_BT_DEV_WAKE_GPIO CYBSP_BT_DEVICE_WAKE
+#define CYCFG_BT_DEV_WAKE_POLARITY CYBT_WAKE_ACTIVE_LOW
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_CONNECTIVITY_BT_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_notices.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_notices.h
new file mode 100644
index 00000000000000..ac7067c526b175
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_notices.h
@@ -0,0 +1,51 @@
+/*******************************************************************************
+ * File Name: cycfg_notices.h
+ *
+ * Description:
+ * Contains warnings and errors that occurred while generating code for the
+ * design.
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_NOTICES_H)
+#define CYCFG_NOTICES_H
+
+#ifdef CY_SUPPORTS_DEVICE_VALIDATION
+#ifndef CY8C624ABZI_S2D44
+#error \
+ "Unexpected MPN; expected DEVICE:=CY8C624ABZI-S2D44. There may be an inconsistency between the *.modus file and the makefile target configuration device sets."
+#endif
+#endif
+
+#ifdef CY_SUPPORTS_COMPLETE_DEVICE_VALIDATION
+#ifndef CY8C624ABZI_S2D44
+#error \
+ "Unexpected MPN; expected DEVICE:=CY8C624ABZI-S2D44, ADDITIONAL_DEVICES:=CYW43012C0WKWBG. There may be an inconsistency between the *.modus file and the makefile target configuration device sets."
+#endif
+#ifndef CYW43012C0WKWBG
+#error \
+ "Unexpected MPN; expected DEVICE:=CY8C624ABZI-S2D44, ADDITIONAL_DEVICES:=CYW43012C0WKWBG. There may be an inconsistency between the *.modus file and the makefile target configuration device sets."
+#endif
+#endif
+
+#endif /* CYCFG_NOTICES_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.c
new file mode 100644
index 00000000000000..f46d17a4dffcad
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.c
@@ -0,0 +1,38 @@
+/*******************************************************************************
+ * File Name: cycfg_peripherals.c
+ *
+ * Description:
+ * Peripheral Hardware Block configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_peripherals.h"
+
+cy_stc_csd_context_t cy_csd_0_context = {
+ .lockKey = CY_CSD_NONE_KEY,
+};
+
+void init_cycfg_peripherals(void)
+{
+ Cy_SysClk_PeriphAssignDivider(PCLK_CSD_CLOCK, CY_SYSCLK_DIV_8_BIT, 0U);
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.h
new file mode 100644
index 00000000000000..19c98a592ca11e
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_peripherals.h
@@ -0,0 +1,85 @@
+/*******************************************************************************
+ * File Name: cycfg_peripherals.h
+ *
+ * Description:
+ * Peripheral Hardware Block configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_PERIPHERALS_H)
+#define CYCFG_PERIPHERALS_H
+
+#include "cy_csd.h"
+#include "cy_sysclk.h"
+#include "cycfg_notices.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define CYBSP_CSD_ENABLED 1U
+#define CY_CAPSENSE_CORE 4u
+#define CY_CAPSENSE_CPU_CLK 100000000u
+#define CY_CAPSENSE_PERI_CLK 100000000u
+#define CY_CAPSENSE_VDDA_MV 3300u
+#define CY_CAPSENSE_PERI_DIV_TYPE CY_SYSCLK_DIV_8_BIT
+#define CY_CAPSENSE_PERI_DIV_INDEX 0u
+#define Cmod_PORT GPIO_PRT7
+#define CintA_PORT GPIO_PRT7
+#define CintB_PORT GPIO_PRT7
+#define Button0_Rx0_PORT GPIO_PRT1
+#define Button0_Tx_PORT GPIO_PRT8
+#define Button1_Rx0_PORT GPIO_PRT1
+#define Button1_Tx_PORT GPIO_PRT8
+#define LinearSlider0_Sns0_PORT GPIO_PRT8
+#define LinearSlider0_Sns1_PORT GPIO_PRT8
+#define LinearSlider0_Sns2_PORT GPIO_PRT8
+#define LinearSlider0_Sns3_PORT GPIO_PRT8
+#define LinearSlider0_Sns4_PORT GPIO_PRT8
+#define Cmod_PIN 7u
+#define CintA_PIN 1u
+#define CintB_PIN 2u
+#define Button0_Rx0_PIN 0u
+#define Button0_Tx_PIN 1u
+#define Button1_Rx0_PIN 0u
+#define Button1_Tx_PIN 2u
+#define LinearSlider0_Sns0_PIN 3u
+#define LinearSlider0_Sns1_PIN 4u
+#define LinearSlider0_Sns2_PIN 5u
+#define LinearSlider0_Sns3_PIN 6u
+#define LinearSlider0_Sns4_PIN 7u
+#define Cmod_PORT_NUM 7u
+#define CintA_PORT_NUM 7u
+#define CintB_PORT_NUM 7u
+#define CYBSP_CSD_HW CSD0
+#define CYBSP_CSD_IRQ csd_interrupt_IRQn
+
+extern cy_stc_csd_context_t cy_csd_0_context;
+
+void init_cycfg_peripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_PERIPHERALS_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.c
new file mode 100644
index 00000000000000..10c5ff5a8414e4
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.c
@@ -0,0 +1,411 @@
+/*******************************************************************************
+ * File Name: cycfg_pins.c
+ *
+ * Description:
+ * Pin configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_pins.h"
+
+const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_WCO_IN_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_WCO_IN_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_WCO_IN_PORT_NUM,
+ .channel_num = CYBSP_WCO_IN_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_WCO_OUT_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_WCO_OUT_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_WCO_OUT_PORT_NUM,
+ .channel_num = CYBSP_WCO_OUT_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_RX_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_RX_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_RX_PORT_NUM,
+ .channel_num = CYBSP_CSD_RX_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_SWO_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
+ .hsiom = CYBSP_SWO_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_SWO_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_SWO_PORT_NUM,
+ .channel_num = CYBSP_SWO_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_PULLUP,
+ .hsiom = CYBSP_SWDIO_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_SWDIO_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_SWDIO_PORT_NUM,
+ .channel_num = CYBSP_SWDIO_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_PULLDOWN,
+ .hsiom = CYBSP_SWDCK_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_SWDCK_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_SWDCK_PORT_NUM,
+ .channel_num = CYBSP_SWDCK_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CINA_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CINA_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CINA_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CINA_PORT_NUM,
+ .channel_num = CYBSP_CINA_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CINB_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CINB_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CINB_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CINB_PORT_NUM,
+ .channel_num = CYBSP_CINB_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CMOD_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CMOD_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CMOD_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CMOD_PORT_NUM,
+ .channel_num = CYBSP_CMOD_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_BTN0_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_BTN0_PORT_NUM,
+ .channel_num = CYBSP_CSD_BTN0_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_BTN1_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_BTN1_PORT_NUM,
+ .channel_num = CYBSP_CSD_BTN1_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_SLD0_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_SLD0_PORT_NUM,
+ .channel_num = CYBSP_CSD_SLD0_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_SLD1_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_SLD1_PORT_NUM,
+ .channel_num = CYBSP_CSD_SLD1_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_SLD2_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_SLD2_PORT_NUM,
+ .channel_num = CYBSP_CSD_SLD2_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_SLD3_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_SLD3_PORT_NUM,
+ .channel_num = CYBSP_CSD_SLD3_PIN,
+};
+#endif // defined (CY_USING_HAL)
+const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config = {
+ .outVal = 1,
+ .driveMode = CY_GPIO_DM_ANALOG,
+ .hsiom = CYBSP_CSD_SLD4_HSIOM,
+ .intEdge = CY_GPIO_INTR_DISABLE,
+ .intMask = 0UL,
+ .vtrip = CY_GPIO_VTRIP_CMOS,
+ .slewRate = CY_GPIO_SLEW_FAST,
+ .driveSel = CY_GPIO_DRIVE_1_2,
+ .vregEn = 0UL,
+ .ibufMode = 0UL,
+ .vtripSel = 0UL,
+ .vrefSel = 0UL,
+ .vohSel = 0UL,
+};
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj = {
+ .type = CYHAL_RSC_GPIO,
+ .block_num = CYBSP_CSD_SLD4_PORT_NUM,
+ .channel_num = CYBSP_CSD_SLD4_PIN,
+};
+#endif // defined (CY_USING_HAL)
+
+void init_cycfg_pins(void)
+{
+ Cy_GPIO_Pin_Init(CYBSP_SWO_PORT, CYBSP_SWO_PIN, &CYBSP_SWO_config);
+ Cy_GPIO_Pin_Init(CYBSP_SWDIO_PORT, CYBSP_SWDIO_PIN, &CYBSP_SWDIO_config);
+ Cy_GPIO_Pin_Init(CYBSP_SWDCK_PORT, CYBSP_SWDCK_PIN, &CYBSP_SWDCK_config);
+}
+
+void reserve_cycfg_pins(void)
+{
+#if defined(CY_USING_HAL)
+ cyhal_hwmgr_reserve(&CYBSP_WCO_IN_obj);
+ cyhal_hwmgr_reserve(&CYBSP_WCO_OUT_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_RX_obj);
+ cyhal_hwmgr_reserve(&CYBSP_SWO_obj);
+ cyhal_hwmgr_reserve(&CYBSP_SWDIO_obj);
+ cyhal_hwmgr_reserve(&CYBSP_SWDCK_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CINA_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CINB_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CMOD_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_BTN0_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_BTN1_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_SLD0_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_SLD1_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_SLD2_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_SLD3_obj);
+ cyhal_hwmgr_reserve(&CYBSP_CSD_SLD4_obj);
+#endif // defined (CY_USING_HAL)
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.h
new file mode 100644
index 00000000000000..6614740f3e5646
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_pins.h
@@ -0,0 +1,674 @@
+/*******************************************************************************
+ * File Name: cycfg_pins.h
+ *
+ * Description:
+ * Pin configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_PINS_H)
+#define CYCFG_PINS_H
+
+#include "cy_gpio.h"
+#include "cycfg_notices.h"
+#include "cycfg_routing.h"
+#if defined(CY_USING_HAL)
+#include "cyhal_hwmgr.h"
+#endif // defined (CY_USING_HAL)
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define CYBSP_WCO_IN_ENABLED 1U
+#define CYBSP_WCO_IN_PORT GPIO_PRT0
+#define CYBSP_WCO_IN_PORT_NUM 0U
+#define CYBSP_WCO_IN_PIN 0U
+#define CYBSP_WCO_IN_NUM 0U
+#define CYBSP_WCO_IN_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_WCO_IN_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_0_pin_0_HSIOM
+#define ioss_0_port_0_pin_0_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_WCO_IN_HSIOM ioss_0_port_0_pin_0_HSIOM
+#define CYBSP_WCO_IN_IRQ ioss_interrupts_gpio_0_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_WCO_IN_HAL_PORT_PIN P0_0
+#define CYBSP_WCO_IN P0_0
+#define CYBSP_WCO_IN_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_WCO_IN_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_WCO_IN_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#endif // defined (CY_USING_HAL)
+#define CYBSP_WCO_OUT_ENABLED 1U
+#define CYBSP_WCO_OUT_PORT GPIO_PRT0
+#define CYBSP_WCO_OUT_PORT_NUM 0U
+#define CYBSP_WCO_OUT_PIN 1U
+#define CYBSP_WCO_OUT_NUM 1U
+#define CYBSP_WCO_OUT_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_WCO_OUT_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_0_pin_1_HSIOM
+#define ioss_0_port_0_pin_1_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_WCO_OUT_HSIOM ioss_0_port_0_pin_1_HSIOM
+#define CYBSP_WCO_OUT_IRQ ioss_interrupts_gpio_0_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_WCO_OUT_HAL_PORT_PIN P0_1
+#define CYBSP_WCO_OUT P0_1
+#define CYBSP_WCO_OUT_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_WCO_OUT_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_WCO_OUT_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_SW2 (P0_4)
+#define CYBSP_USER_BTN1 CYBSP_SW2
+#define CYBSP_USER_BTN CYBSP_SW2
+#define CYBSP_LED_RGB_GREEN (P0_5)
+#define CYBSP_USER_LED4 CYBSP_LED_RGB_GREEN
+#define CYBSP_A0 (P10_0)
+#define CYBSP_J2_1 CYBSP_A0
+#define CYBSP_A1 (P10_1)
+#define CYBSP_J2_3 CYBSP_A1
+#define CYBSP_A2 (P10_2)
+#define CYBSP_J2_5 CYBSP_A2
+#define CYBSP_A3 (P10_3)
+#define CYBSP_J2_7 CYBSP_A3
+#define CYBSP_A4 (P10_4)
+#define CYBSP_J2_9 CYBSP_A4
+#define CYBSP_A5 (P10_5)
+#define CYBSP_J2_11 CYBSP_A5
+#define CYBSP_A6 (P10_6)
+#define CYBSP_J2_13 CYBSP_A6
+#define CYBSP_POT CYBSP_A6
+#define CYBSP_A7 (P10_7)
+#define CYBSP_J2_15 CYBSP_A7
+#define CYBSP_QSPI_FRAM_SSEL (P11_0)
+#define CYBSP_LED9 (P11_1)
+#define CYBSP_USER_LED2 CYBSP_LED9
+#define CYBSP_QSPI_SS (P11_2)
+#define CYBSP_QSPI_FLASH_SSEL CYBSP_QSPI_SS
+#define CYBSP_QSPI_D3 (P11_3)
+#define CYBSP_QSPI_D2 (P11_4)
+#define CYBSP_QSPI_D1 (P11_5)
+#define CYBSP_QSPI_D0 (P11_6)
+#define CYBSP_QSPI_SCK (P11_7)
+#define CYBSP_SPI_MOSI (P12_0)
+#define CYBSP_D11 CYBSP_SPI_MOSI
+#define CYBSP_SPI_MISO (P12_1)
+#define CYBSP_D12 CYBSP_SPI_MISO
+#define CYBSP_SPI_CLK (P12_2)
+#define CYBSP_D13 CYBSP_SPI_CLK
+#define CYBSP_SPI_CS (P12_3)
+#define CYBSP_D10 CYBSP_SPI_CS
+#define CYBSP_SDHC_CMD (P12_4)
+#define CYBSP_SDHC_CLK (P12_5)
+#define CYBSP_SDHC_IO0 (P13_0)
+#define CYBSP_SDHC_IO1 (P13_1)
+#define CYBSP_SDHC_IO2 (P13_2)
+#define CYBSP_SDHC_IO3 (P13_3)
+#define CYBSP_SDHC_DETECT (P13_7)
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_RX_ENABLED 1U
+#define CYBSP_CS_RX_ENABLED CYBSP_CSD_RX_ENABLED
+#define CYBSP_CS_TX_RX_ENABLED CYBSP_CSD_RX_ENABLED
+#define CYBSP_CSD_RX_PORT GPIO_PRT1
+#define CYBSP_CS_RX_PORT CYBSP_CSD_RX_PORT
+#define CYBSP_CS_TX_RX_PORT CYBSP_CSD_RX_PORT
+#define CYBSP_CSD_RX_PORT_NUM 1U
+#define CYBSP_CS_RX_PORT_NUM CYBSP_CSD_RX_PORT_NUM
+#define CYBSP_CS_TX_RX_PORT_NUM CYBSP_CSD_RX_PORT_NUM
+#define CYBSP_CSD_RX_PIN 0U
+#define CYBSP_CS_RX_PIN CYBSP_CSD_RX_PIN
+#define CYBSP_CS_TX_RX_PIN CYBSP_CSD_RX_PIN
+#define CYBSP_CSD_RX_NUM 0U
+#define CYBSP_CS_RX_NUM CYBSP_CSD_RX_NUM
+#define CYBSP_CS_TX_RX_NUM CYBSP_CSD_RX_NUM
+#define CYBSP_CSD_RX_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_RX_DRIVEMODE CYBSP_CSD_RX_DRIVEMODE
+#define CYBSP_CS_TX_RX_DRIVEMODE CYBSP_CSD_RX_DRIVEMODE
+#define CYBSP_CSD_RX_INIT_DRIVESTATE 1
+#define CYBSP_CS_RX_INIT_DRIVESTATE CYBSP_CSD_RX_INIT_DRIVESTATE
+#define CYBSP_CS_TX_RX_INIT_DRIVESTATE CYBSP_CSD_RX_INIT_DRIVESTATE
+#ifndef ioss_0_port_1_pin_0_HSIOM
+#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_RX_HSIOM ioss_0_port_1_pin_0_HSIOM
+#define CYBSP_CS_RX_HSIOM CYBSP_CSD_RX_HSIOM
+#define CYBSP_CS_TX_RX_HSIOM CYBSP_CSD_RX_HSIOM
+#define CYBSP_CSD_RX_IRQ ioss_interrupts_gpio_1_IRQn
+#define CYBSP_CS_RX_IRQ CYBSP_CSD_RX_IRQ
+#define CYBSP_CS_TX_RX_IRQ CYBSP_CSD_RX_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_RX_HAL_PORT_PIN P1_0
+#define CYBSP_CS_RX_HAL_PORT_PIN CYBSP_CSD_RX_HAL_PORT_PIN
+#define CYBSP_CS_TX_RX_HAL_PORT_PIN CYBSP_CSD_RX_HAL_PORT_PIN
+#define CYBSP_CSD_RX P1_0
+#define CYBSP_CS_RX CYBSP_CSD_RX
+#define CYBSP_CS_TX_RX CYBSP_CSD_RX
+#define CYBSP_CSD_RX_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_RX_HAL_IRQ CYBSP_CSD_RX_HAL_IRQ
+#define CYBSP_CS_TX_RX_HAL_IRQ CYBSP_CSD_RX_HAL_IRQ
+#define CYBSP_CSD_RX_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR
+#define CYBSP_CS_TX_RX_HAL_DIR CYBSP_CSD_RX_HAL_DIR
+#define CYBSP_CSD_RX_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_RX_HAL_DRIVEMODE CYBSP_CSD_RX_HAL_DRIVEMODE
+#define CYBSP_CS_TX_RX_HAL_DRIVEMODE CYBSP_CSD_RX_HAL_DRIVEMODE
+#define CYBSP_LED_RGB_RED (P1_1)
+#define CYBSP_USER_LED3 CYBSP_LED_RGB_RED
+#define CYBSP_SW4 (P1_4)
+#define CYBSP_USER_BTN2 CYBSP_SW4
+#define CYBSP_LED8 (P1_5)
+#define CYBSP_USER_LED1 CYBSP_LED8
+#define CYBSP_USER_LED CYBSP_LED8
+#define CYBSP_WIFI_SDIO_D0 (P2_0)
+#define CYBSP_WIFI_SDIO_D1 (P2_1)
+#define CYBSP_WIFI_SDIO_D2 (P2_2)
+#define CYBSP_WIFI_SDIO_D3 (P2_3)
+#define CYBSP_WIFI_SDIO_CMD (P2_4)
+#define CYBSP_WIFI_SDIO_CLK (P2_5)
+#define CYBSP_WIFI_WL_REG_ON (P2_6)
+#define CYBSP_BT_UART_RX (P3_0)
+#define CYBSP_BT_UART_TX (P3_1)
+#define CYBSP_BT_UART_RTS (P3_2)
+#define CYBSP_BT_UART_CTS (P3_3)
+#define CYBSP_BT_POWER (P3_4)
+#define CYBSP_BT_DEVICE_WAKE (P3_5)
+#define CYBSP_BT_HOST_WAKE (P4_0)
+#define CYBSP_WIFI_HOST_WAKE (P4_1)
+#define CYBSP_DEBUG_UART_RX (P5_0)
+#define CYBSP_D0 CYBSP_DEBUG_UART_RX
+#define CYBSP_DEBUG_UART_TX (P5_1)
+#define CYBSP_D1 CYBSP_DEBUG_UART_TX
+#define CYBSP_DEBUG_UART_RTS (P5_2)
+#define CYBSP_D2 CYBSP_DEBUG_UART_RTS
+#define CYBSP_DEBUG_UART_CTS (P5_3)
+#define CYBSP_D3 CYBSP_DEBUG_UART_CTS
+#define CYBSP_D4 (P5_4)
+#define CYBSP_D5 (P5_5)
+#define CYBSP_D6 (P5_6)
+#define CYBSP_D7 (P5_7)
+#define CYBSP_I2C_SCL (P6_0)
+#define CYBSP_D15 CYBSP_I2C_SCL
+#define CYBSP_I2C_SDA (P6_1)
+#define CYBSP_D14 CYBSP_I2C_SDA
+#endif // defined (CY_USING_HAL)
+#define CYBSP_SWO_ENABLED 1U
+#define CYBSP_SWO_PORT GPIO_PRT6
+#define CYBSP_SWO_PORT_NUM 6U
+#define CYBSP_SWO_PIN 4U
+#define CYBSP_SWO_NUM 4U
+#define CYBSP_SWO_DRIVEMODE CY_GPIO_DM_STRONG_IN_OFF
+#define CYBSP_SWO_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_6_pin_4_HSIOM
+#define ioss_0_port_6_pin_4_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_SWO_HSIOM ioss_0_port_6_pin_4_HSIOM
+#define CYBSP_SWO_IRQ ioss_interrupts_gpio_6_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_SWO_HAL_PORT_PIN P6_4
+#define CYBSP_SWO P6_4
+#define CYBSP_SWO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_SWO_HAL_DIR CYHAL_GPIO_DIR_OUTPUT
+#define CYBSP_SWO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_STRONG
+#endif // defined (CY_USING_HAL)
+#define CYBSP_SWDIO_ENABLED 1U
+#define CYBSP_SWDIO_PORT GPIO_PRT6
+#define CYBSP_SWDIO_PORT_NUM 6U
+#define CYBSP_SWDIO_PIN 6U
+#define CYBSP_SWDIO_NUM 6U
+#define CYBSP_SWDIO_DRIVEMODE CY_GPIO_DM_PULLUP
+#define CYBSP_SWDIO_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_6_pin_6_HSIOM
+#define ioss_0_port_6_pin_6_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_SWDIO_HSIOM ioss_0_port_6_pin_6_HSIOM
+#define CYBSP_SWDIO_IRQ ioss_interrupts_gpio_6_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_SWDIO_HAL_PORT_PIN P6_6
+#define CYBSP_SWDIO P6_6
+#define CYBSP_SWDIO_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_SWDIO_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
+#define CYBSP_SWDIO_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLUP
+#endif // defined (CY_USING_HAL)
+#define CYBSP_SWDCK_ENABLED 1U
+#define CYBSP_SWDCK_PORT GPIO_PRT6
+#define CYBSP_SWDCK_PORT_NUM 6U
+#define CYBSP_SWDCK_PIN 7U
+#define CYBSP_SWDCK_NUM 7U
+#define CYBSP_SWDCK_DRIVEMODE CY_GPIO_DM_PULLDOWN
+#define CYBSP_SWDCK_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_6_pin_7_HSIOM
+#define ioss_0_port_6_pin_7_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_SWDCK_HSIOM ioss_0_port_6_pin_7_HSIOM
+#define CYBSP_SWDCK_IRQ ioss_interrupts_gpio_6_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_SWDCK_HAL_PORT_PIN P6_7
+#define CYBSP_SWDCK P6_7
+#define CYBSP_SWDCK_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_SWDCK_HAL_DIR CYHAL_GPIO_DIR_BIDIRECTIONAL
+#define CYBSP_SWDCK_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_PULLDOWN
+#define CYBSP_TRACE_CLK (P7_0)
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CINA_ENABLED 1U
+#define CYBSP_CINA_PORT GPIO_PRT7
+#define CYBSP_CINA_PORT_NUM 7U
+#define CYBSP_CINA_PIN 1U
+#define CYBSP_CINA_NUM 1U
+#define CYBSP_CINA_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CINA_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_7_pin_1_HSIOM
+#define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CINA_HSIOM ioss_0_port_7_pin_1_HSIOM
+#define CYBSP_CINA_IRQ ioss_interrupts_gpio_7_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_CINA_HAL_PORT_PIN P7_1
+#define CYBSP_CINA P7_1
+#define CYBSP_CINA_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CINA_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CINA_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CINB_ENABLED 1U
+#define CYBSP_CINB_PORT GPIO_PRT7
+#define CYBSP_CINB_PORT_NUM 7U
+#define CYBSP_CINB_PIN 2U
+#define CYBSP_CINB_NUM 2U
+#define CYBSP_CINB_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CINB_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_7_pin_2_HSIOM
+#define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CINB_HSIOM ioss_0_port_7_pin_2_HSIOM
+#define CYBSP_CINB_IRQ ioss_interrupts_gpio_7_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_CINB_HAL_PORT_PIN P7_2
+#define CYBSP_CINB P7_2
+#define CYBSP_CINB_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CINB_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CINB_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_LED_RGB_BLUE (P7_3)
+#define CYBSP_USER_LED5 CYBSP_LED_RGB_BLUE
+#define CYBSP_TRACE_DATA3 (P7_4)
+#define CYBSP_D8 (P7_5)
+#define CYBSP_TRACE_DATA2 CYBSP_D8
+#define CYBSP_D9 (P7_6)
+#define CYBSP_TRACE_DATA1 CYBSP_D9
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CMOD_ENABLED 1U
+#define CYBSP_CMOD_PORT GPIO_PRT7
+#define CYBSP_CMOD_PORT_NUM 7U
+#define CYBSP_CMOD_PIN 7U
+#define CYBSP_CMOD_NUM 7U
+#define CYBSP_CMOD_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CMOD_INIT_DRIVESTATE 1
+#ifndef ioss_0_port_7_pin_7_HSIOM
+#define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CMOD_HSIOM ioss_0_port_7_pin_7_HSIOM
+#define CYBSP_CMOD_IRQ ioss_interrupts_gpio_7_IRQn
+#if defined(CY_USING_HAL)
+#define CYBSP_CMOD_HAL_PORT_PIN P7_7
+#define CYBSP_CMOD P7_7
+#define CYBSP_CMOD_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CMOD_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CMOD_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_BTN0_ENABLED 1U
+#define CYBSP_CS_BTN0_ENABLED CYBSP_CSD_BTN0_ENABLED
+#define CYBSP_CSD_BTN0_PORT GPIO_PRT8
+#define CYBSP_CS_BTN0_PORT CYBSP_CSD_BTN0_PORT
+#define CYBSP_CSD_BTN0_PORT_NUM 8U
+#define CYBSP_CS_BTN0_PORT_NUM CYBSP_CSD_BTN0_PORT_NUM
+#define CYBSP_CSD_BTN0_PIN 1U
+#define CYBSP_CS_BTN0_PIN CYBSP_CSD_BTN0_PIN
+#define CYBSP_CSD_BTN0_NUM 1U
+#define CYBSP_CS_BTN0_NUM CYBSP_CSD_BTN0_NUM
+#define CYBSP_CSD_BTN0_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_BTN0_DRIVEMODE CYBSP_CSD_BTN0_DRIVEMODE
+#define CYBSP_CSD_BTN0_INIT_DRIVESTATE 1
+#define CYBSP_CS_BTN0_INIT_DRIVESTATE CYBSP_CSD_BTN0_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_1_HSIOM
+#define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_BTN0_HSIOM ioss_0_port_8_pin_1_HSIOM
+#define CYBSP_CS_BTN0_HSIOM CYBSP_CSD_BTN0_HSIOM
+#define CYBSP_CSD_BTN0_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_BTN0_IRQ CYBSP_CSD_BTN0_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_BTN0_HAL_PORT_PIN P8_1
+#define CYBSP_CS_BTN0_HAL_PORT_PIN CYBSP_CSD_BTN0_HAL_PORT_PIN
+#define CYBSP_CSD_BTN0 P8_1
+#define CYBSP_CS_BTN0 CYBSP_CSD_BTN0
+#define CYBSP_CSD_BTN0_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_BTN0_HAL_IRQ CYBSP_CSD_BTN0_HAL_IRQ
+#define CYBSP_CSD_BTN0_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_BTN0_HAL_DIR CYBSP_CSD_BTN0_HAL_DIR
+#define CYBSP_CSD_BTN0_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_BTN0_HAL_DRIVEMODE CYBSP_CSD_BTN0_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_BTN1_ENABLED 1U
+#define CYBSP_CS_BTN1_ENABLED CYBSP_CSD_BTN1_ENABLED
+#define CYBSP_CSD_BTN1_PORT GPIO_PRT8
+#define CYBSP_CS_BTN1_PORT CYBSP_CSD_BTN1_PORT
+#define CYBSP_CSD_BTN1_PORT_NUM 8U
+#define CYBSP_CS_BTN1_PORT_NUM CYBSP_CSD_BTN1_PORT_NUM
+#define CYBSP_CSD_BTN1_PIN 2U
+#define CYBSP_CS_BTN1_PIN CYBSP_CSD_BTN1_PIN
+#define CYBSP_CSD_BTN1_NUM 2U
+#define CYBSP_CS_BTN1_NUM CYBSP_CSD_BTN1_NUM
+#define CYBSP_CSD_BTN1_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_BTN1_DRIVEMODE CYBSP_CSD_BTN1_DRIVEMODE
+#define CYBSP_CSD_BTN1_INIT_DRIVESTATE 1
+#define CYBSP_CS_BTN1_INIT_DRIVESTATE CYBSP_CSD_BTN1_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_2_HSIOM
+#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_BTN1_HSIOM ioss_0_port_8_pin_2_HSIOM
+#define CYBSP_CS_BTN1_HSIOM CYBSP_CSD_BTN1_HSIOM
+#define CYBSP_CSD_BTN1_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_BTN1_IRQ CYBSP_CSD_BTN1_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_BTN1_HAL_PORT_PIN P8_2
+#define CYBSP_CS_BTN1_HAL_PORT_PIN CYBSP_CSD_BTN1_HAL_PORT_PIN
+#define CYBSP_CSD_BTN1 P8_2
+#define CYBSP_CS_BTN1 CYBSP_CSD_BTN1
+#define CYBSP_CSD_BTN1_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_BTN1_HAL_IRQ CYBSP_CSD_BTN1_HAL_IRQ
+#define CYBSP_CSD_BTN1_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_BTN1_HAL_DIR CYBSP_CSD_BTN1_HAL_DIR
+#define CYBSP_CSD_BTN1_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_BTN1_HAL_DRIVEMODE CYBSP_CSD_BTN1_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_SLD0_ENABLED 1U
+#define CYBSP_CS_SLD0_ENABLED CYBSP_CSD_SLD0_ENABLED
+#define CYBSP_CSD_SLD0_PORT GPIO_PRT8
+#define CYBSP_CS_SLD0_PORT CYBSP_CSD_SLD0_PORT
+#define CYBSP_CSD_SLD0_PORT_NUM 8U
+#define CYBSP_CS_SLD0_PORT_NUM CYBSP_CSD_SLD0_PORT_NUM
+#define CYBSP_CSD_SLD0_PIN 3U
+#define CYBSP_CS_SLD0_PIN CYBSP_CSD_SLD0_PIN
+#define CYBSP_CSD_SLD0_NUM 3U
+#define CYBSP_CS_SLD0_NUM CYBSP_CSD_SLD0_NUM
+#define CYBSP_CSD_SLD0_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_SLD0_DRIVEMODE CYBSP_CSD_SLD0_DRIVEMODE
+#define CYBSP_CSD_SLD0_INIT_DRIVESTATE 1
+#define CYBSP_CS_SLD0_INIT_DRIVESTATE CYBSP_CSD_SLD0_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_3_HSIOM
+#define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_SLD0_HSIOM ioss_0_port_8_pin_3_HSIOM
+#define CYBSP_CS_SLD0_HSIOM CYBSP_CSD_SLD0_HSIOM
+#define CYBSP_CSD_SLD0_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_SLD0_IRQ CYBSP_CSD_SLD0_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_SLD0_HAL_PORT_PIN P8_3
+#define CYBSP_CS_SLD0_HAL_PORT_PIN CYBSP_CSD_SLD0_HAL_PORT_PIN
+#define CYBSP_CSD_SLD0 P8_3
+#define CYBSP_CS_SLD0 CYBSP_CSD_SLD0
+#define CYBSP_CSD_SLD0_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_SLD0_HAL_IRQ CYBSP_CSD_SLD0_HAL_IRQ
+#define CYBSP_CSD_SLD0_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_SLD0_HAL_DIR CYBSP_CSD_SLD0_HAL_DIR
+#define CYBSP_CSD_SLD0_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_SLD0_HAL_DRIVEMODE CYBSP_CSD_SLD0_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_SLD1_ENABLED 1U
+#define CYBSP_CS_SLD1_ENABLED CYBSP_CSD_SLD1_ENABLED
+#define CYBSP_CSD_SLD1_PORT GPIO_PRT8
+#define CYBSP_CS_SLD1_PORT CYBSP_CSD_SLD1_PORT
+#define CYBSP_CSD_SLD1_PORT_NUM 8U
+#define CYBSP_CS_SLD1_PORT_NUM CYBSP_CSD_SLD1_PORT_NUM
+#define CYBSP_CSD_SLD1_PIN 4U
+#define CYBSP_CS_SLD1_PIN CYBSP_CSD_SLD1_PIN
+#define CYBSP_CSD_SLD1_NUM 4U
+#define CYBSP_CS_SLD1_NUM CYBSP_CSD_SLD1_NUM
+#define CYBSP_CSD_SLD1_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_SLD1_DRIVEMODE CYBSP_CSD_SLD1_DRIVEMODE
+#define CYBSP_CSD_SLD1_INIT_DRIVESTATE 1
+#define CYBSP_CS_SLD1_INIT_DRIVESTATE CYBSP_CSD_SLD1_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_4_HSIOM
+#define ioss_0_port_8_pin_4_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_SLD1_HSIOM ioss_0_port_8_pin_4_HSIOM
+#define CYBSP_CS_SLD1_HSIOM CYBSP_CSD_SLD1_HSIOM
+#define CYBSP_CSD_SLD1_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_SLD1_IRQ CYBSP_CSD_SLD1_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_SLD1_HAL_PORT_PIN P8_4
+#define CYBSP_CS_SLD1_HAL_PORT_PIN CYBSP_CSD_SLD1_HAL_PORT_PIN
+#define CYBSP_CSD_SLD1 P8_4
+#define CYBSP_CS_SLD1 CYBSP_CSD_SLD1
+#define CYBSP_CSD_SLD1_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_SLD1_HAL_IRQ CYBSP_CSD_SLD1_HAL_IRQ
+#define CYBSP_CSD_SLD1_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_SLD1_HAL_DIR CYBSP_CSD_SLD1_HAL_DIR
+#define CYBSP_CSD_SLD1_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_SLD1_HAL_DRIVEMODE CYBSP_CSD_SLD1_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_SLD2_ENABLED 1U
+#define CYBSP_CS_SLD2_ENABLED CYBSP_CSD_SLD2_ENABLED
+#define CYBSP_CSD_SLD2_PORT GPIO_PRT8
+#define CYBSP_CS_SLD2_PORT CYBSP_CSD_SLD2_PORT
+#define CYBSP_CSD_SLD2_PORT_NUM 8U
+#define CYBSP_CS_SLD2_PORT_NUM CYBSP_CSD_SLD2_PORT_NUM
+#define CYBSP_CSD_SLD2_PIN 5U
+#define CYBSP_CS_SLD2_PIN CYBSP_CSD_SLD2_PIN
+#define CYBSP_CSD_SLD2_NUM 5U
+#define CYBSP_CS_SLD2_NUM CYBSP_CSD_SLD2_NUM
+#define CYBSP_CSD_SLD2_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_SLD2_DRIVEMODE CYBSP_CSD_SLD2_DRIVEMODE
+#define CYBSP_CSD_SLD2_INIT_DRIVESTATE 1
+#define CYBSP_CS_SLD2_INIT_DRIVESTATE CYBSP_CSD_SLD2_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_5_HSIOM
+#define ioss_0_port_8_pin_5_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_SLD2_HSIOM ioss_0_port_8_pin_5_HSIOM
+#define CYBSP_CS_SLD2_HSIOM CYBSP_CSD_SLD2_HSIOM
+#define CYBSP_CSD_SLD2_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_SLD2_IRQ CYBSP_CSD_SLD2_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_SLD2_HAL_PORT_PIN P8_5
+#define CYBSP_CS_SLD2_HAL_PORT_PIN CYBSP_CSD_SLD2_HAL_PORT_PIN
+#define CYBSP_CSD_SLD2 P8_5
+#define CYBSP_CS_SLD2 CYBSP_CSD_SLD2
+#define CYBSP_CSD_SLD2_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_SLD2_HAL_IRQ CYBSP_CSD_SLD2_HAL_IRQ
+#define CYBSP_CSD_SLD2_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_SLD2_HAL_DIR CYBSP_CSD_SLD2_HAL_DIR
+#define CYBSP_CSD_SLD2_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_SLD2_HAL_DRIVEMODE CYBSP_CSD_SLD2_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_SLD3_ENABLED 1U
+#define CYBSP_CS_SLD3_ENABLED CYBSP_CSD_SLD3_ENABLED
+#define CYBSP_CSD_SLD3_PORT GPIO_PRT8
+#define CYBSP_CS_SLD3_PORT CYBSP_CSD_SLD3_PORT
+#define CYBSP_CSD_SLD3_PORT_NUM 8U
+#define CYBSP_CS_SLD3_PORT_NUM CYBSP_CSD_SLD3_PORT_NUM
+#define CYBSP_CSD_SLD3_PIN 6U
+#define CYBSP_CS_SLD3_PIN CYBSP_CSD_SLD3_PIN
+#define CYBSP_CSD_SLD3_NUM 6U
+#define CYBSP_CS_SLD3_NUM CYBSP_CSD_SLD3_NUM
+#define CYBSP_CSD_SLD3_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_SLD3_DRIVEMODE CYBSP_CSD_SLD3_DRIVEMODE
+#define CYBSP_CSD_SLD3_INIT_DRIVESTATE 1
+#define CYBSP_CS_SLD3_INIT_DRIVESTATE CYBSP_CSD_SLD3_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_6_HSIOM
+#define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_SLD3_HSIOM ioss_0_port_8_pin_6_HSIOM
+#define CYBSP_CS_SLD3_HSIOM CYBSP_CSD_SLD3_HSIOM
+#define CYBSP_CSD_SLD3_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_SLD3_IRQ CYBSP_CSD_SLD3_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_SLD3_HAL_PORT_PIN P8_6
+#define CYBSP_CS_SLD3_HAL_PORT_PIN CYBSP_CSD_SLD3_HAL_PORT_PIN
+#define CYBSP_CSD_SLD3 P8_6
+#define CYBSP_CS_SLD3 CYBSP_CSD_SLD3
+#define CYBSP_CSD_SLD3_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_SLD3_HAL_IRQ CYBSP_CSD_SLD3_HAL_IRQ
+#define CYBSP_CSD_SLD3_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_SLD3_HAL_DIR CYBSP_CSD_SLD3_HAL_DIR
+#define CYBSP_CSD_SLD3_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_SLD3_HAL_DRIVEMODE CYBSP_CSD_SLD3_HAL_DRIVEMODE
+#endif // defined (CY_USING_HAL)
+#define CYBSP_CSD_SLD4_ENABLED 1U
+#define CYBSP_CS_SLD4_ENABLED CYBSP_CSD_SLD4_ENABLED
+#define CYBSP_CSD_SLD4_PORT GPIO_PRT8
+#define CYBSP_CS_SLD4_PORT CYBSP_CSD_SLD4_PORT
+#define CYBSP_CSD_SLD4_PORT_NUM 8U
+#define CYBSP_CS_SLD4_PORT_NUM CYBSP_CSD_SLD4_PORT_NUM
+#define CYBSP_CSD_SLD4_PIN 7U
+#define CYBSP_CS_SLD4_PIN CYBSP_CSD_SLD4_PIN
+#define CYBSP_CSD_SLD4_NUM 7U
+#define CYBSP_CS_SLD4_NUM CYBSP_CSD_SLD4_NUM
+#define CYBSP_CSD_SLD4_DRIVEMODE CY_GPIO_DM_ANALOG
+#define CYBSP_CS_SLD4_DRIVEMODE CYBSP_CSD_SLD4_DRIVEMODE
+#define CYBSP_CSD_SLD4_INIT_DRIVESTATE 1
+#define CYBSP_CS_SLD4_INIT_DRIVESTATE CYBSP_CSD_SLD4_INIT_DRIVESTATE
+#ifndef ioss_0_port_8_pin_7_HSIOM
+#define ioss_0_port_8_pin_7_HSIOM HSIOM_SEL_GPIO
+#endif
+#define CYBSP_CSD_SLD4_HSIOM ioss_0_port_8_pin_7_HSIOM
+#define CYBSP_CS_SLD4_HSIOM CYBSP_CSD_SLD4_HSIOM
+#define CYBSP_CSD_SLD4_IRQ ioss_interrupts_gpio_8_IRQn
+#define CYBSP_CS_SLD4_IRQ CYBSP_CSD_SLD4_IRQ
+#if defined(CY_USING_HAL)
+#define CYBSP_CSD_SLD4_HAL_PORT_PIN P8_7
+#define CYBSP_CS_SLD4_HAL_PORT_PIN CYBSP_CSD_SLD4_HAL_PORT_PIN
+#define CYBSP_CSD_SLD4 P8_7
+#define CYBSP_CS_SLD4 CYBSP_CSD_SLD4
+#define CYBSP_CSD_SLD4_HAL_IRQ CYHAL_GPIO_IRQ_NONE
+#define CYBSP_CS_SLD4_HAL_IRQ CYBSP_CSD_SLD4_HAL_IRQ
+#define CYBSP_CSD_SLD4_HAL_DIR CYHAL_GPIO_DIR_INPUT
+#define CYBSP_CS_SLD4_HAL_DIR CYBSP_CSD_SLD4_HAL_DIR
+#define CYBSP_CSD_SLD4_HAL_DRIVEMODE CYHAL_GPIO_DRIVE_ANALOG
+#define CYBSP_CS_SLD4_HAL_DRIVEMODE CYBSP_CSD_SLD4_HAL_DRIVEMODE
+#define CYBSP_A8 (P9_0)
+#define CYBSP_J2_2 CYBSP_A8
+#define CYBSP_A9 (P9_1)
+#define CYBSP_J2_4 CYBSP_A9
+#define CYBSP_A10 (P9_2)
+#define CYBSP_J2_6 CYBSP_A10
+#define CYBSP_A11 (P9_3)
+#define CYBSP_J2_8 CYBSP_A11
+#define CYBSP_TRACE_DATA0 CYBSP_A11
+#define CYBSP_A12 (P9_4)
+#define CYBSP_J2_10 CYBSP_A12
+#define CYBSP_A13 (P9_5)
+#define CYBSP_J2_12 CYBSP_A13
+#define CYBSP_A14 (P9_6)
+#define CYBSP_J2_14 CYBSP_A14
+#define CYBSP_A15 (P9_7)
+#define CYBSP_J2_16 CYBSP_A15
+#endif // defined (CY_USING_HAL)
+
+extern const cy_stc_gpio_pin_config_t CYBSP_WCO_IN_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_WCO_IN_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_WCO_OUT_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_WCO_OUT_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_RX_config;
+#define CYBSP_CS_RX_config CYBSP_CSD_RX_config
+#define CYBSP_CS_TX_RX_config CYBSP_CSD_RX_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_RX_obj;
+#define CYBSP_CS_RX_obj CYBSP_CSD_RX_obj
+#define CYBSP_CS_TX_RX_obj CYBSP_CSD_RX_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_SWO_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_SWO_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_SWDIO_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_SWDIO_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_SWDCK_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_SWDCK_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CINA_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CINA_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CINB_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CINB_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CMOD_config;
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CMOD_obj;
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN0_config;
+#define CYBSP_CS_BTN0_config CYBSP_CSD_BTN0_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_BTN0_obj;
+#define CYBSP_CS_BTN0_obj CYBSP_CSD_BTN0_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_BTN1_config;
+#define CYBSP_CS_BTN1_config CYBSP_CSD_BTN1_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_BTN1_obj;
+#define CYBSP_CS_BTN1_obj CYBSP_CSD_BTN1_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD0_config;
+#define CYBSP_CS_SLD0_config CYBSP_CSD_SLD0_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_SLD0_obj;
+#define CYBSP_CS_SLD0_obj CYBSP_CSD_SLD0_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD1_config;
+#define CYBSP_CS_SLD1_config CYBSP_CSD_SLD1_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_SLD1_obj;
+#define CYBSP_CS_SLD1_obj CYBSP_CSD_SLD1_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD2_config;
+#define CYBSP_CS_SLD2_config CYBSP_CSD_SLD2_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_SLD2_obj;
+#define CYBSP_CS_SLD2_obj CYBSP_CSD_SLD2_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD3_config;
+#define CYBSP_CS_SLD3_config CYBSP_CSD_SLD3_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_SLD3_obj;
+#define CYBSP_CS_SLD3_obj CYBSP_CSD_SLD3_obj
+#endif // defined (CY_USING_HAL)
+extern const cy_stc_gpio_pin_config_t CYBSP_CSD_SLD4_config;
+#define CYBSP_CS_SLD4_config CYBSP_CSD_SLD4_config
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t CYBSP_CSD_SLD4_obj;
+#define CYBSP_CS_SLD4_obj CYBSP_CSD_SLD4_obj
+#endif // defined (CY_USING_HAL)
+
+void init_cycfg_pins(void);
+void reserve_cycfg_pins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_PINS_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.c
new file mode 100644
index 00000000000000..7f954aca038238
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.c
@@ -0,0 +1,472 @@
+/*******************************************************************************
+ * File Name: cycfg_qspi_memslot.c
+ *
+ * Description:
+ * Provides definitions of the SMIF-driver memory configuration.
+ * This file was automatically generated and should not be modified.
+ * QSPI Configurator 4.10.0.1343
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_qspi_memslot.h"
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0xECU,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_QUAD,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0x01U,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_QUAD,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 4U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_QUAD,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_PRESENT_1BYTE,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x06U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x04U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0xDCU,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x60U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x34U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_QUAD,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_QUAD,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x35U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x05U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd = {
+ /* The 8-bit command. 1 x I/O read command. */
+ .command = 0x01U,
+ /* The width of the command transfer. */
+ .cmdWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The width of the address transfer. */
+ .addrWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The 8-bit mode byte. This value is 0xFFFFFFFF when there is no mode present. */
+ .mode = 0xFFFFFFFFU,
+ /* The width of the mode command transfer. */
+ .modeWidth = CY_SMIF_WIDTH_SINGLE,
+ /* The number of dummy cycles. A zero value suggests no dummy cycles. */
+ .dummyCycles = 0U,
+ /* The width of the data transfer. */
+ .dataWidth = CY_SMIF_WIDTH_SINGLE,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* The Data rate of data */
+ .dataRate = CY_SMIF_SDR,
+ /* This specifies the presence of the dummy field */
+ .dummyCyclesPresence = CY_SMIF_NOT_PRESENT,
+ /* This specifies the presence of the mode field */
+ .modePresence = CY_SMIF_NOT_PRESENT,
+ /* The high byte of a 16-bit mode. This value is 0x0 when there is no higher byte mode present */
+ .modeH = 0x00,
+ /* The Data rate of mode */
+ .modeRate = CY_SMIF_SDR,
+ /* The Data rate of address */
+ .addrRate = CY_SMIF_SDR,
+ /* This specifies the width of the command field */
+ .cmdPresence = CY_SMIF_PRESENT_1BYTE,
+ /* The high byte of a 16-bit command. This value is 0x0 when there is no higher byte command present */
+ .commandH = 0x00,
+ /* The Data rate of command */
+ .cmdRate = CY_SMIF_SDR,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0 = {
+ /* Specifies the number of address bytes used by the memory slave device. */
+ .numOfAddrBytes = 0x04U,
+ /* The size of the memory. */
+ .memSize = 0x04000000U,
+ /* Specifies the Read command. */
+ .readCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_readCmd,
+ /* Specifies the Write Enable command. */
+ .writeEnCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_writeEnCmd,
+ /* Specifies the Write Disable command. */
+ .writeDisCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_writeDisCmd,
+ /* Specifies the Erase command. */
+ .eraseCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_eraseCmd,
+ /* Specifies the sector size of each erase. */
+ .eraseSize = 0x00040000U,
+ /* Specifies the Chip Erase command. */
+ .chipEraseCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_chipEraseCmd,
+ /* Specifies the Program command. */
+ .programCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_programCmd,
+ /* Specifies the page size for programming. */
+ .programSize = 0x00000200U,
+ /* Specifies the command to read the QE-containing status register. */
+ .readStsRegQeCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_readStsRegQeCmd,
+ /* Specifies the command to read the WIP-containing status register. */
+ .readStsRegWipCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_readStsRegWipCmd,
+ /* Specifies the command to write into the QE-containing status register. */
+ .writeStsRegQeCmd = (cy_stc_smif_mem_cmd_t *) &S25FL512S_SlaveSlot_0_writeStsRegQeCmd,
+ /* The mask for the status register. */
+ .stsRegBusyMask = 0x01U,
+ /* The mask for the status register. */
+ .stsRegQuadEnableMask = 0x02U,
+ /* The max time for the erase type-1 cycle-time in ms. */
+ .eraseTime = 2600U,
+ /* The max time for the chip-erase cycle-time in ms. */
+ .chipEraseTime = 460000U,
+ /* The max time for the page-program cycle-time in us. */
+ .programTime = 1300U,
+#if (CY_SMIF_DRV_VERSION_MAJOR > 1) || (CY_SMIF_DRV_VERSION_MINOR >= 50)
+ /* Points to NULL or to structure with info about sectors for hybrid memory. */
+ .hybridRegionCount = 0U,
+ .hybridRegionInfo = 0,
+#endif
+ /* Specifies the command to read variable latency cycles configuration register */
+ .readLatencyCmd = 0,
+ /* Specifies the command to write variable latency cycles configuration register */
+ .writeLatencyCmd = 0,
+ /* Specifies the address for variable latency cycle address */
+ .latencyCyclesRegAddr = 0x00U,
+ /* Specifies variable latency cycles Mask */
+ .latencyCyclesMask = 0x00U,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /* Specifies data for memory with hybrid sectors */
+ .octalDDREnableSeq = 0,
+ /* Specifies the command to read the OE-containing status register. */
+ .readStsRegOeCmd = 0,
+ /* Specifies the command to write the OE-containing status register. */
+ .writeStsRegOeCmd = 0,
+ /* QE mask for the status registers */
+ .stsRegOctalEnableMask = 0x00U,
+ /* Octal enable register address */
+ .octalEnableRegAddr = 0x00U,
+ /* Frequency of operation used in Octal mode */
+ .freq_of_operation = CY_SMIF_100MHZ_OPERATION,
+#endif
+};
+
+const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0 = {
+ /* Determines the slot number where the memory device is placed. */
+ .slaveSelect = CY_SMIF_SLAVE_SELECT_0,
+/* Flags. */
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ .flags = CY_SMIF_FLAG_SMIF_REV_3 | CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN,
+#else
+ .flags = CY_SMIF_FLAG_MEMORY_MAPPED | CY_SMIF_FLAG_WR_EN,
+#endif /* CY_IP_MXSMIF_VERSION */
+ /* The data-line selection options for a slave device. */
+ .dataSelect = CY_SMIF_DATA_SEL0,
+ /* The base address the memory slave is mapped to in the PSoC memory map.
+ Valid when the memory-mapped mode is enabled. */
+ .baseAddress = 0x18000000U,
+ /* The size allocated in the PSoC memory map, for the memory slave device.
+ The size is allocated from the base address. Valid when the memory mapped mode is enabled. */
+ .memMappedSize = 0x4000000U,
+ /* If this memory device is one of the devices in the dual quad SPI configuration.
+ Valid when the memory mapped mode is enabled. */
+ .dualQuadSlots = 0,
+ /* The configuration of the device. */
+ .deviceCfg = (cy_stc_smif_mem_device_cfg_t *) &deviceCfg_S25FL512S_SlaveSlot_0,
+#if (CY_IP_MXSMIF_VERSION >= 2)
+ /** Continous transfer merge timeout.
+ * After this period the memory device is deselected. A later transfer, even from a
+ * continuous address, starts with the overhead phases (command, address, mode, dummy cycles).
+ * This configuration parameter is available for CAT1B devices. */
+ .mergeTimeout = CY_SMIF_MERGE_TIMEOUT_1_CYCLE,
+#endif /* CY_IP_MXSMIF_VERSION */
+};
+
+const cy_stc_smif_mem_config_t * const smifMemConfigs[CY_SMIF_DEVICE_NUM] = {
+ &S25FL512S_SlaveSlot_0,
+};
+
+const cy_stc_smif_block_config_t smifBlockConfig = {
+ /* The number of SMIF memories defined. */
+ .memCount = CY_SMIF_DEVICE_NUM,
+ /* The pointer to the array of memory config structures of size memCount. */
+ .memConfig = (cy_stc_smif_mem_config_t **) smifMemConfigs,
+ /* The version of the SMIF driver. */
+ .majorVersion = CY_SMIF_DRV_VERSION_MAJOR,
+ /* The version of the SMIF driver. */
+ .minorVersion = CY_SMIF_DRV_VERSION_MINOR,
+};
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.h
new file mode 100644
index 00000000000000..48b280a91b4b7d
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.h
@@ -0,0 +1,68 @@
+/*******************************************************************************
+ * File Name: cycfg_qspi_memslot.h
+ *
+ * Description:
+ * Provides declarations of the SMIF-driver memory configuration.
+ * This file was automatically generated and should not be modified.
+ * QSPI Configurator 4.10.0.1343
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#ifndef CYCFG_QSPI_MEMSLOT_H
+#define CYCFG_QSPI_MEMSLOT_H
+#include "cy_smif_memslot.h"
+
+#define CY_SMIF_CFG_TOOL_VERSION (410)
+
+/* Supported QSPI Driver version */
+#define CY_SMIF_DRV_VERSION_REQUIRED (100)
+
+#if !defined(CY_SMIF_DRV_VERSION)
+#define CY_SMIF_DRV_VERSION (100)
+#endif
+
+/* Check the used Driver version */
+#if (CY_SMIF_DRV_VERSION_REQUIRED > CY_SMIF_DRV_VERSION)
+#error The QSPI Configurator requires a newer version of the PDL. Update the PDL in your project.
+#endif
+
+typedef cy_stc_smif_mem_config_t cy_serial_flash_mem_config_t;
+typedef cy_stc_smif_block_config_t cy_serial_flash_block_config_t;
+
+#define CY_SMIF_DEVICE_NUM 1
+
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeEnCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeDisCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_eraseCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_chipEraseCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_programCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegQeCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_readStsRegWipCmd;
+extern const cy_stc_smif_mem_cmd_t S25FL512S_SlaveSlot_0_writeStsRegQeCmd;
+
+extern const cy_stc_smif_mem_device_cfg_t deviceCfg_S25FL512S_SlaveSlot_0;
+
+extern const cy_stc_smif_mem_config_t S25FL512S_SlaveSlot_0;
+
+extern const cy_stc_smif_mem_config_t * const smifMemConfigs[CY_SMIF_DEVICE_NUM];
+
+extern const cy_stc_smif_block_config_t smifBlockConfig;
+
+#endif /*CYCFG_QSPI_MEMSLOT_H*/
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.timestamp b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.timestamp
new file mode 100644
index 00000000000000..b58d184ac8c9e0
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_qspi_memslot.timestamp
@@ -0,0 +1,26 @@
+/*******************************************************************************
+* File Name: cycfg_qspi_memslot.timestamp
+*
+* Description:
+* Sentinel file for determining if generated source is up to date.
+* This file was automatically generated and should not be modified.
+* QSPI Configurator 4.10.0.1343
+*
+********************************************************************************
+* Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+* an affiliate of Cypress Semiconductor Corporation.
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+* http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+********************************************************************************/
+
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.c
new file mode 100644
index 00000000000000..b7f613092bdbe6
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.c
@@ -0,0 +1,40 @@
+/*******************************************************************************
+ * File Name: cycfg_routing.c
+ *
+ * Description:
+ * Establishes all necessary connections between hardware elements.
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_routing.h"
+#include "cy_device_headers.h"
+#include "cy_trigmux.h"
+#include "stdbool.h"
+
+void init_cycfg_routing(void)
+{
+ HSIOM->AMUX_SPLIT_CTL[2] = HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_AA_SL_Msk | HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_AA_SR_Msk |
+ HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_BB_SL_Msk | HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_BB_SR_Msk;
+ HSIOM->AMUX_SPLIT_CTL[4] = HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_AA_SL_Msk | HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_AA_SR_Msk |
+ HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_BB_SL_Msk | HSIOM_V2_AMUX_SPLIT_CTL_SWITCH_BB_SR_Msk;
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.h
new file mode 100644
index 00000000000000..f6bae4541ba221
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_routing.h
@@ -0,0 +1,61 @@
+/*******************************************************************************
+ * File Name: cycfg_routing.h
+ *
+ * Description:
+ * Establishes all necessary connections between hardware elements.
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_ROUTING_H)
+#define CYCFG_ROUTING_H
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include "cycfg_notices.h"
+
+void init_cycfg_routing(void);
+
+#define ioss_0_port_0_pin_0_ANALOG P0_0_SRSS_WCO_IN
+#define ioss_0_port_0_pin_1_ANALOG P0_1_SRSS_WCO_OUT
+#define ioss_0_port_1_pin_0_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_6_pin_4_HSIOM P6_4_CPUSS_SWJ_SWO_TDO
+#define ioss_0_port_6_pin_6_HSIOM P6_6_CPUSS_SWJ_SWDIO_TMS
+#define ioss_0_port_6_pin_7_HSIOM P6_7_CPUSS_SWJ_SWCLK_TCLK
+#define ioss_0_port_7_pin_1_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_7_pin_2_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_7_pin_7_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_1_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_2_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_3_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_4_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_5_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_6_HSIOM HSIOM_SEL_AMUXA
+#define ioss_0_port_8_pin_7_HSIOM HSIOM_SEL_AMUXA
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_ROUTING_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.c b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.c
new file mode 100644
index 00000000000000..7c180a8e0812aa
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.c
@@ -0,0 +1,1160 @@
+/*******************************************************************************
+ * File Name: cycfg_system.c
+ *
+ * Description:
+ * System configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#include "cycfg_system.h"
+
+#define CY_CFG_SYSCLK_ECO_ERROR 1
+#define CY_CFG_SYSCLK_ALTHF_ERROR 2
+#define CY_CFG_SYSCLK_PLL_ERROR 3
+#define CY_CFG_SYSCLK_FLL_ERROR 4
+#define CY_CFG_SYSCLK_WCO_ERROR 5
+#define CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED 1
+#define CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE CY_SYSTICK_CLOCK_SOURCE_CLK_LF
+#define CY_CFG_SYSCLK_CLKALTSYSTICK_INTERVAL 0
+#define CY_CFG_SYSCLK_CLKALTSYSTICK_FREQUENCY 32768
+#define CY_CFG_SYSCLK_CLKALTSYSTICK_TICKS ((0) / 1000000.0) * 32768
+#define CY_CFG_SYSCLK_CLKBAK_ENABLED 1
+#define CY_CFG_SYSCLK_CLKBAK_SOURCE CY_SYSCLK_BAK_IN_CLKLF
+#define CY_CFG_SYSCLK_CLKFAST_ENABLED 1
+#define CY_CFG_SYSCLK_CLKFAST_DIVIDER 0
+#define CY_CFG_SYSCLK_FLL_ENABLED 1
+#define CY_CFG_SYSCLK_FLL_MULT 500U
+#define CY_CFG_SYSCLK_FLL_REFDIV 20U
+#define CY_CFG_SYSCLK_FLL_CCO_RANGE CY_SYSCLK_FLL_CCO_RANGE4
+#define CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV true
+#define CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE 10U
+#define CY_CFG_SYSCLK_FLL_IGAIN 9U
+#define CY_CFG_SYSCLK_FLL_PGAIN 5U
+#define CY_CFG_SYSCLK_FLL_SETTLING_COUNT 8U
+#define CY_CFG_SYSCLK_FLL_OUTPUT_MODE CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT
+#define CY_CFG_SYSCLK_FLL_CCO_FREQ 355U
+#define CY_CFG_SYSCLK_FLL_OUT_FREQ 100000000
+#define CY_CFG_SYSCLK_CLKHF0_ENABLED 1
+#define CY_CFG_SYSCLK_CLKHF0_DIVIDER CY_SYSCLK_CLKHF_NO_DIVIDE
+#define CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ 100UL
+#define CY_CFG_SYSCLK_CLKHF0_CLKPATH CY_SYSCLK_CLKHF_IN_CLKPATH0
+#define CY_CFG_SYSCLK_ILO_ENABLED 1
+#define CY_CFG_SYSCLK_ILO_HIBERNATE true
+#define CY_CFG_SYSCLK_IMO_ENABLED 1
+#define CY_CFG_SYSCLK_CLKLF_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH0_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH0_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPATH1_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH1_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH1_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPATH2_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH2_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH2_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPATH3_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH3_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH3_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPATH4_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH4_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH4_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPATH5_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPATH5_SOURCE CY_SYSCLK_CLKPATH_IN_IMO
+#define CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM 0UL
+#define CY_CFG_SYSCLK_CLKPERI_ENABLED 1
+#define CY_CFG_SYSCLK_CLKPERI_DIVIDER 0
+#define CY_CFG_SYSCLK_PLL0_ENABLED 1
+#define CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV 30
+#define CY_CFG_SYSCLK_PLL0_REFERENCE_DIV 1
+#define CY_CFG_SYSCLK_PLL0_OUTPUT_DIV 5
+#define CY_CFG_SYSCLK_PLL0_LF_MODE false
+#define CY_CFG_SYSCLK_PLL0_OUTPUT_MODE CY_SYSCLK_FLLPLL_OUTPUT_AUTO
+#define CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ 48000000
+#define CY_CFG_SYSCLK_CLKSLOW_ENABLED 1
+#define CY_CFG_SYSCLK_CLKSLOW_DIVIDER 0
+#define CY_CFG_SYSCLK_CLKTIMER_ENABLED 1
+#define CY_CFG_SYSCLK_CLKTIMER_SOURCE CY_SYSCLK_CLKTIMER_IN_IMO
+#define CY_CFG_SYSCLK_CLKTIMER_DIVIDER 0U
+#define CY_CFG_SYSCLK_WCO_ENABLED 1
+#define CY_CFG_SYSCLK_WCO_IN_PRT GPIO_PRT0
+#define CY_CFG_SYSCLK_WCO_IN_PIN 0U
+#define CY_CFG_SYSCLK_WCO_OUT_PRT GPIO_PRT0
+#define CY_CFG_SYSCLK_WCO_OUT_PIN 1U
+#define CY_CFG_SYSCLK_WCO_BYPASS CY_SYSCLK_WCO_NOT_BYPASSED
+#define CY_CFG_PWR_ENABLED 1
+#define CY_CFG_PWR_INIT 1
+#define CY_CFG_PWR_USING_PMIC 0
+#define CY_CFG_PWR_VBACKUP_USING_VDDD 1
+#define CY_CFG_PWR_LDO_VOLTAGE CY_SYSPM_LDO_VOLTAGE_LP
+#define CY_CFG_PWR_USING_ULP 0
+#define CY_CFG_PWR_REGULATOR_MODE_MIN false
+#define CY_CFG_PWR_BKP_ERROR 6
+
+#if defined(CY_DEVICE_SECURE)
+static cy_stc_pra_system_config_t srss_0_clock_0_secureConfig;
+#endif // defined (CY_DEVICE_SECURE)
+#if (!defined(CY_DEVICE_SECURE))
+static const cy_stc_fll_manual_config_t srss_0_clock_0_fll_0_fllConfig = {
+ .fllMult = 500U,
+ .refDiv = 20U,
+ .ccoRange = CY_SYSCLK_FLL_CCO_RANGE4,
+ .enableOutputDiv = true,
+ .lockTolerance = 10U,
+ .igain = 9U,
+ .pgain = 5U,
+ .settlingCount = 8U,
+ .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_OUTPUT,
+ .cco_Freq = 355U,
+};
+#endif //(!defined(CY_DEVICE_SECURE))
+#if defined(CY_USING_HAL)
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 0U,
+ .channel_num = 0U,
+};
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 1U,
+ .channel_num = 0U,
+};
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 2U,
+ .channel_num = 0U,
+};
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 3U,
+ .channel_num = 0U,
+};
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 4U,
+ .channel_num = 0U,
+};
+const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj = {
+ .type = CYHAL_RSC_CLKPATH,
+ .block_num = 5U,
+ .channel_num = 0U,
+};
+#endif // defined (CY_USING_HAL)
+#if (!defined(CY_DEVICE_SECURE))
+static const cy_stc_pll_manual_config_t srss_0_clock_0_pll_0_pllConfig = {
+ .feedbackDiv = 30,
+ .referenceDiv = 1,
+ .outputDiv = 5,
+ .lfMode = false,
+ .outputMode = CY_SYSCLK_FLLPLL_OUTPUT_AUTO,
+};
+#endif //(!defined(CY_DEVICE_SECURE))
+
+__WEAK void __NO_RETURN cycfg_ClockStartupError(uint32_t error)
+{
+ (void) error; /* Suppress the compiler warning */
+ while (1)
+ ;
+}
+#if (!defined(CY_DEVICE_SECURE))
+__STATIC_INLINE void Cy_SysClk_FllDeInit()
+{
+ Cy_SysClk_FllDisable();
+}
+#endif //(!defined(CY_DEVICE_SECURE))
+#if defined(CY_DEVICE_SECURE)
+void init_cycfg_secure_struct(cy_stc_pra_system_config_t * secure_config)
+{
+#ifdef CY_CFG_PWR_ENABLED
+ secure_config->powerEnable = CY_CFG_PWR_ENABLED;
+#endif /* CY_CFG_PWR_ENABLED */
+
+#ifdef CY_CFG_PWR_USING_LDO
+ secure_config->ldoEnable = CY_CFG_PWR_USING_LDO;
+#endif /* CY_CFG_PWR_USING_LDO */
+
+#ifdef CY_CFG_PWR_USING_PMIC
+ secure_config->pmicEnable = CY_CFG_PWR_USING_PMIC;
+#endif /* CY_CFG_PWR_USING_PMIC */
+
+#ifdef CY_CFG_PWR_VBACKUP_USING_VDDD
+ secure_config->vBackupVDDDEnable = CY_CFG_PWR_VBACKUP_USING_VDDD;
+#endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
+
+#ifdef CY_CFG_PWR_USING_ULP
+ secure_config->ulpEnable = CY_CFG_PWR_USING_ULP;
+#endif /* CY_CFG_PWR_USING_ULP */
+
+#ifdef CY_CFG_SYSCLK_ECO_ENABLED
+ secure_config->ecoEnable = CY_CFG_SYSCLK_ECO_ENABLED;
+#endif /* CY_CFG_SYSCLK_ECO_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
+ secure_config->extClkEnable = CY_CFG_SYSCLK_EXTCLK_ENABLED;
+#endif /* CY_CFG_SYSCLK_EXTCLK_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_ILO_ENABLED
+ secure_config->iloEnable = CY_CFG_SYSCLK_ILO_ENABLED;
+#endif /* CY_CFG_SYSCLK_ILO_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_WCO_ENABLED
+ secure_config->wcoEnable = CY_CFG_SYSCLK_WCO_ENABLED;
+#endif /* CY_CFG_SYSCLK_WCO_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_FLL_ENABLED
+ secure_config->fllEnable = CY_CFG_SYSCLK_FLL_ENABLED;
+#endif /* CY_CFG_SYSCLK_FLL_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_PLL0_ENABLED
+ secure_config->pll0Enable = CY_CFG_SYSCLK_PLL0_ENABLED;
+#endif /* CY_CFG_SYSCLK_PLL0_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_PLL1_ENABLED
+ secure_config->pll1Enable = CY_CFG_SYSCLK_PLL1_ENABLED;
+#endif /* CY_CFG_SYSCLK_PLL1_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
+ secure_config->path0Enable = CY_CFG_SYSCLK_CLKPATH0_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH0_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
+ secure_config->path1Enable = CY_CFG_SYSCLK_CLKPATH1_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH1_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED
+ secure_config->path2Enable = CY_CFG_SYSCLK_CLKPATH2_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH2_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED
+ secure_config->path3Enable = CY_CFG_SYSCLK_CLKPATH3_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH3_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED
+ secure_config->path4Enable = CY_CFG_SYSCLK_CLKPATH4_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH4_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED
+ secure_config->path5Enable = CY_CFG_SYSCLK_CLKPATH5_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPATH5_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
+ secure_config->clkFastEnable = CY_CFG_SYSCLK_CLKFAST_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKFAST_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
+ secure_config->clkPeriEnable = CY_CFG_SYSCLK_CLKPERI_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPERI_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
+ secure_config->clkSlowEnable = CY_CFG_SYSCLK_CLKSLOW_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKSLOW_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF0_ENABLED
+ secure_config->clkHF0Enable = CY_CFG_SYSCLK_CLKHF0_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF0_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
+ secure_config->clkHF1Enable = CY_CFG_SYSCLK_CLKHF1_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF1_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED
+ secure_config->clkHF2Enable = CY_CFG_SYSCLK_CLKHF2_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF2_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED
+ secure_config->clkHF3Enable = CY_CFG_SYSCLK_CLKHF3_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF3_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED
+ secure_config->clkHF4Enable = CY_CFG_SYSCLK_CLKHF4_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF4_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED
+ secure_config->clkHF5Enable = CY_CFG_SYSCLK_CLKHF5_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKHF5_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
+ secure_config->clkPumpEnable = CY_CFG_SYSCLK_CLKPUMP_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKPUMP_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
+ secure_config->clkLFEnable = CY_CFG_SYSCLK_CLKLF_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKLF_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
+ secure_config->clkBakEnable = CY_CFG_SYSCLK_CLKBAK_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKBAK_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
+ secure_config->clkTimerEnable = CY_CFG_SYSCLK_CLKTIMER_ENABLED;
+#endif /* CY_CFG_SYSCLK_CLKTIMER_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
+#error Configuration Error : ALT SYSTICK cannot be enabled for Secure devices.
+#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_PILO_ENABLED
+ secure_config->piloEnable = CY_CFG_SYSCLK_PILO_ENABLED;
+#endif /* CY_CFG_SYSCLK_PILO_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_ENABLED
+ secure_config->clkAltHfEnable = CY_CFG_SYSCLK_ALTHF_ENABLED;
+#endif /* CY_CFG_SYSCLK_ALTHF_ENABLED */
+
+#ifdef CY_CFG_PWR_LDO_VOLTAGE
+ secure_config->ldoVoltage = CY_CFG_PWR_LDO_VOLTAGE;
+#endif /* CY_CFG_PWR_LDO_VOLTAGE */
+
+#ifdef CY_CFG_PWR_REGULATOR_MODE_MIN
+ secure_config->pwrCurrentModeMin = CY_CFG_PWR_REGULATOR_MODE_MIN;
+#endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
+
+#ifdef CY_CFG_PWR_BUCK_VOLTAGE
+ secure_config->buckVoltage = CY_CFG_PWR_BUCK_VOLTAGE;
+#endif /* CY_CFG_PWR_BUCK_VOLTAGE */
+
+#ifdef CY_CFG_SYSCLK_ECO_FREQ
+ secure_config->ecoFreqHz = CY_CFG_SYSCLK_ECO_FREQ;
+#endif /* CY_CFG_SYSCLK_ECO_FREQ */
+
+#ifdef CY_CFG_SYSCLK_ECO_CLOAD
+ secure_config->ecoLoad = CY_CFG_SYSCLK_ECO_CLOAD;
+#endif /* CY_CFG_SYSCLK_ECO_CLOAD */
+
+#ifdef CY_CFG_SYSCLK_ECO_ESR
+ secure_config->ecoEsr = CY_CFG_SYSCLK_ECO_ESR;
+#endif /* CY_CFG_SYSCLK_ECO_ESR */
+
+#ifdef CY_CFG_SYSCLK_ECO_DRIVE_LEVEL
+ secure_config->ecoDriveLevel = CY_CFG_SYSCLK_ECO_DRIVE_LEVEL;
+#endif /* CY_CFG_SYSCLK_ECO_DRIVE_LEVEL */
+
+#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PRT
+ secure_config->ecoInPort = CY_CFG_SYSCLK_ECO_GPIO_IN_PRT;
+#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PRT */
+
+#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT
+ secure_config->ecoOutPort = CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT;
+#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PRT */
+
+#ifdef CY_CFG_SYSCLK_ECO_GPIO_IN_PIN
+ secure_config->ecoInPinNum = CY_CFG_SYSCLK_ECO_GPIO_IN_PIN;
+#endif /* CY_CFG_SYSCLK_ECO_GPIO_IN_PIN */
+
+#ifdef CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN
+ secure_config->ecoOutPinNum = CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN;
+#endif /* CY_CFG_SYSCLK_ECO_GPIO_OUT_PIN */
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
+ secure_config->extClkFreqHz = CY_CFG_SYSCLK_EXTCLK_FREQ;
+#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PRT
+ secure_config->extClkPort = CY_CFG_SYSCLK_EXTCLK_GPIO_PRT;
+#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PRT */
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_PIN
+ secure_config->extClkPinNum = CY_CFG_SYSCLK_EXTCLK_GPIO_PIN;
+#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_PIN */
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM
+ secure_config->extClkHsiom = CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM;
+#endif /* CY_CFG_SYSCLK_EXTCLK_GPIO_HSIOM */
+
+#ifdef CY_CFG_SYSCLK_ILO_HIBERNATE
+ secure_config->iloHibernateON = CY_CFG_SYSCLK_ILO_HIBERNATE;
+#endif /* CY_CFG_SYSCLK_ILO_HIBERNATE */
+
+#ifdef CY_CFG_SYSCLK_WCO_BYPASS
+ secure_config->bypassEnable = CY_CFG_SYSCLK_WCO_BYPASS;
+#endif /* CY_CFG_SYSCLK_WCO_BYPASS */
+
+#ifdef CY_CFG_SYSCLK_WCO_IN_PRT
+ secure_config->wcoInPort = CY_CFG_SYSCLK_WCO_IN_PRT;
+#endif /* CY_CFG_SYSCLK_WCO_IN_PRT */
+
+#ifdef CY_CFG_SYSCLK_WCO_OUT_PRT
+ secure_config->wcoOutPort = CY_CFG_SYSCLK_WCO_OUT_PRT;
+#endif /* CY_CFG_SYSCLK_WCO_OUT_PRT */
+
+#ifdef CY_CFG_SYSCLK_WCO_IN_PIN
+ secure_config->wcoInPinNum = CY_CFG_SYSCLK_WCO_IN_PIN;
+#endif /* CY_CFG_SYSCLK_WCO_IN_PIN */
+
+#ifdef CY_CFG_SYSCLK_WCO_OUT_PIN
+ secure_config->wcoOutPinNum = CY_CFG_SYSCLK_WCO_OUT_PIN;
+#endif /* CY_CFG_SYSCLK_WCO_OUT_PIN */
+
+#ifdef CY_CFG_SYSCLK_FLL_OUT_FREQ
+ secure_config->fllOutFreqHz = CY_CFG_SYSCLK_FLL_OUT_FREQ;
+#endif /* CY_CFG_SYSCLK_FLL_OUT_FREQ */
+
+#ifdef CY_CFG_SYSCLK_FLL_MULT
+ secure_config->fllMult = CY_CFG_SYSCLK_FLL_MULT;
+#endif /* CY_CFG_SYSCLK_FLL_MULT */
+
+#ifdef CY_CFG_SYSCLK_FLL_REFDIV
+ secure_config->fllRefDiv = CY_CFG_SYSCLK_FLL_REFDIV;
+#endif /* CY_CFG_SYSCLK_FLL_REFDIV */
+
+#ifdef CY_CFG_SYSCLK_FLL_CCO_RANGE
+ secure_config->fllCcoRange = CY_CFG_SYSCLK_FLL_CCO_RANGE;
+#endif /* CY_CFG_SYSCLK_FLL_CCO_RANGE */
+
+#ifdef CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV
+ secure_config->enableOutputDiv = CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV;
+#endif /* CY_CFG_SYSCLK_FLL_ENABLE_OUTDIV */
+
+#ifdef CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE
+ secure_config->lockTolerance = CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE;
+#endif /* CY_CFG_SYSCLK_FLL_LOCK_TOLERANCE */
+
+#ifdef CY_CFG_SYSCLK_FLL_IGAIN
+ secure_config->igain = CY_CFG_SYSCLK_FLL_IGAIN;
+#endif /* CY_CFG_SYSCLK_FLL_IGAIN */
+
+#ifdef CY_CFG_SYSCLK_FLL_PGAIN
+ secure_config->pgain = CY_CFG_SYSCLK_FLL_PGAIN;
+#endif /* CY_CFG_SYSCLK_FLL_PGAIN */
+
+#ifdef CY_CFG_SYSCLK_FLL_SETTLING_COUNT
+ secure_config->settlingCount = CY_CFG_SYSCLK_FLL_SETTLING_COUNT;
+#endif /* CY_CFG_SYSCLK_FLL_SETTLING_COUNT */
+
+#ifdef CY_CFG_SYSCLK_FLL_OUTPUT_MODE
+ secure_config->outputMode = CY_CFG_SYSCLK_FLL_OUTPUT_MODE;
+#endif /* CY_CFG_SYSCLK_FLL_OUTPUT_MODE */
+
+#ifdef CY_CFG_SYSCLK_FLL_CCO_FREQ
+ secure_config->ccoFreq = CY_CFG_SYSCLK_FLL_CCO_FREQ;
+#endif /* CY_CFG_SYSCLK_FLL_CCO_FREQ */
+
+#ifdef CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV
+ secure_config->pll0FeedbackDiv = CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV;
+#endif /* CY_CFG_SYSCLK_PLL0_FEEDBACK_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL0_REFERENCE_DIV
+ secure_config->pll0ReferenceDiv = CY_CFG_SYSCLK_PLL0_REFERENCE_DIV;
+#endif /* CY_CFG_SYSCLK_PLL0_REFERENCE_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_DIV
+ secure_config->pll0OutputDiv = CY_CFG_SYSCLK_PLL0_OUTPUT_DIV;
+#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL0_LF_MODE
+ secure_config->pll0LfMode = CY_CFG_SYSCLK_PLL0_LF_MODE;
+#endif /* CY_CFG_SYSCLK_PLL0_LF_MODE */
+
+#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_MODE
+ secure_config->pll0OutputMode = CY_CFG_SYSCLK_PLL0_OUTPUT_MODE;
+#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_MODE */
+
+#ifdef CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ
+ secure_config->pll0OutFreqHz = CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ;
+#endif /* CY_CFG_SYSCLK_PLL0_OUTPUT_FREQ */
+
+#ifdef CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV
+ secure_config->pll1FeedbackDiv = CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV;
+#endif /* CY_CFG_SYSCLK_PLL1_FEEDBACK_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL1_REFERENCE_DIV
+ secure_config->pll1ReferenceDiv = CY_CFG_SYSCLK_PLL1_REFERENCE_DIV;
+#endif /* CY_CFG_SYSCLK_PLL1_REFERENCE_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_DIV
+ secure_config->pll1OutputDiv = CY_CFG_SYSCLK_PLL1_OUTPUT_DIV;
+#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_DIV */
+
+#ifdef CY_CFG_SYSCLK_PLL1_LF_MODE
+ secure_config->pll1LfMode = CY_CFG_SYSCLK_PLL1_LF_MODE;
+#endif /* CY_CFG_SYSCLK_PLL1_LF_MODE */
+
+#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_MODE
+ secure_config->pll1OutputMode = CY_CFG_SYSCLK_PLL1_OUTPUT_MODE;
+#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_MODE */
+
+#ifdef CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ
+ secure_config->pll1OutFreqHz = CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ;
+#endif /* CY_CFG_SYSCLK_PLL1_OUTPUT_FREQ */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH0_SOURCE
+ secure_config->path0Src = CY_CFG_SYSCLK_CLKPATH0_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH0_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH1_SOURCE
+ secure_config->path1Src = CY_CFG_SYSCLK_CLKPATH1_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH1_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH2_SOURCE
+ secure_config->path2Src = CY_CFG_SYSCLK_CLKPATH2_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH2_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH3_SOURCE
+ secure_config->path3Src = CY_CFG_SYSCLK_CLKPATH3_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH3_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH4_SOURCE
+ secure_config->path4Src = CY_CFG_SYSCLK_CLKPATH4_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH4_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPATH5_SOURCE
+ secure_config->path5Src = CY_CFG_SYSCLK_CLKPATH5_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPATH5_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKFAST_DIVIDER
+ secure_config->clkFastDiv = CY_CFG_SYSCLK_CLKFAST_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKFAST_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKPERI_DIVIDER
+ secure_config->clkPeriDiv = CY_CFG_SYSCLK_CLKPERI_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKPERI_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKSLOW_DIVIDER
+ secure_config->clkSlowDiv = CY_CFG_SYSCLK_CLKSLOW_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKSLOW_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF0_CLKPATH
+ secure_config->hf0Source = CY_CFG_SYSCLK_CLKHF0_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF0_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF0_DIVIDER
+ secure_config->hf0Divider = CY_CFG_SYSCLK_CLKHF0_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF0_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ
+ secure_config->hf0OutFreqMHz = CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKHF1_CLKPATH
+ secure_config->hf1Source = CY_CFG_SYSCLK_CLKHF1_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF1_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF1_DIVIDER
+ secure_config->hf1Divider = CY_CFG_SYSCLK_CLKHF1_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF1_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ
+ secure_config->hf1OutFreqMHz = CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF1_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKHF2_CLKPATH
+ secure_config->hf2Source = CY_CFG_SYSCLK_CLKHF2_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF2_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF2_DIVIDER
+ secure_config->hf2Divider = CY_CFG_SYSCLK_CLKHF2_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF2_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ
+ secure_config->hf2OutFreqMHz = CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF2_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKHF3_CLKPATH
+ secure_config->hf3Source = CY_CFG_SYSCLK_CLKHF3_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF3_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF3_DIVIDER
+ secure_config->hf3Divider = CY_CFG_SYSCLK_CLKHF3_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF3_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ
+ secure_config->hf3OutFreqMHz = CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF3_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKHF4_CLKPATH
+ secure_config->hf4Source = CY_CFG_SYSCLK_CLKHF4_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF4_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF4_DIVIDER
+ secure_config->hf4Divider = CY_CFG_SYSCLK_CLKHF4_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF4_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ
+ secure_config->hf4OutFreqMHz = CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF4_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKHF5_CLKPATH
+ secure_config->hf5Source = CY_CFG_SYSCLK_CLKHF5_CLKPATH;
+#endif /* CY_CFG_SYSCLK_CLKHF5_CLKPATH */
+
+#ifdef CY_CFG_SYSCLK_CLKHF5_DIVIDER
+ secure_config->hf5Divider = CY_CFG_SYSCLK_CLKHF5_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKHF5_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ
+ secure_config->hf5OutFreqMHz = CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ;
+#endif /* CY_CFG_SYSCLK_CLKHF5_FREQ_MHZ */
+
+#ifdef CY_CFG_SYSCLK_CLKPUMP_SOURCE
+ secure_config->pumpSource = CY_CFG_SYSCLK_CLKPUMP_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKPUMP_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKPUMP_DIVIDER
+ secure_config->pumpDivider = CY_CFG_SYSCLK_CLKPUMP_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKPUMP_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKLF_SOURCE
+ secure_config->clkLfSource = CY_CFG_SYSCLK_CLKLF_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKLF_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKBAK_SOURCE
+ secure_config->clkBakSource = CY_CFG_SYSCLK_CLKBAK_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKBAK_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKTIMER_SOURCE
+ secure_config->clkTimerSource = CY_CFG_SYSCLK_CLKTIMER_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKTIMER_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_CLKTIMER_DIVIDER
+ secure_config->clkTimerDivider = CY_CFG_SYSCLK_CLKTIMER_DIVIDER;
+#endif /* CY_CFG_SYSCLK_CLKTIMER_DIVIDER */
+
+#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE
+ secure_config->clkSrcAltSysTick = CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE;
+#endif /* CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD
+ secure_config->altHFcLoad = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD;
+#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLOAD */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME
+ secure_config->altHFxtalStartUpTime = CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME;
+#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_TIME */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ
+ secure_config->altHFclkFreq = CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ;
+#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_FREQ */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV
+ secure_config->altHFsysClkDiv = CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV;
+#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_CLK_DIV */
+
+#ifdef CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR
+ secure_config->altHFvoltageReg = CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR;
+#endif /* CY_CFG_SYSCLK_ALTHF_BLE_ECO_VOL_REGULATOR */
+}
+#endif // defined (CY_DEVICE_SECURE)
+__STATIC_INLINE void Cy_SysClk_ClkAltSysTickInit()
+{
+ Cy_SysTick_Init(CY_CFG_SYSCLK_CLKALTSYSTICK_SOURCE, CY_CFG_SYSCLK_CLKALTSYSTICK_TICKS);
+}
+#if (!defined(CY_DEVICE_SECURE))
+__STATIC_INLINE void Cy_SysClk_ClkBakInit()
+{
+ Cy_SysClk_ClkBakSetSource(CY_SYSCLK_BAK_IN_CLKLF);
+}
+__STATIC_INLINE void Cy_SysClk_ClkFastInit()
+{
+ Cy_SysClk_ClkFastSetDivider(0U);
+}
+__STATIC_INLINE void Cy_SysClk_FllInit()
+{
+ if (CY_SYSCLK_SUCCESS != Cy_SysClk_FllManualConfigure(&srss_0_clock_0_fll_0_fllConfig))
+ {
+ cycfg_ClockStartupError(CY_CFG_SYSCLK_FLL_ERROR);
+ }
+ if (CY_SYSCLK_SUCCESS != Cy_SysClk_FllEnable(200000UL))
+ {
+ cycfg_ClockStartupError(CY_CFG_SYSCLK_FLL_ERROR);
+ }
+}
+__STATIC_INLINE void Cy_SysClk_ClkHf0Init()
+{
+ Cy_SysClk_ClkHfSetSource(0U, CY_CFG_SYSCLK_CLKHF0_CLKPATH);
+ Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE);
+}
+__STATIC_INLINE void Cy_SysClk_IloInit()
+{
+ /* The WDT is unlocked in the default startup code */
+ Cy_SysClk_IloEnable();
+ Cy_SysClk_IloHibernateOn(true);
+}
+__STATIC_INLINE void Cy_SysClk_ClkLfInit()
+{
+ /* The WDT is unlocked in the default startup code */
+ Cy_SysClk_ClkLfSetSource(CY_SYSCLK_CLKLF_IN_WCO);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath0Init()
+{
+ Cy_SysClk_ClkPathSetSource(0U, CY_CFG_SYSCLK_CLKPATH0_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath1Init()
+{
+ Cy_SysClk_ClkPathSetSource(1U, CY_CFG_SYSCLK_CLKPATH1_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath2Init()
+{
+ Cy_SysClk_ClkPathSetSource(2U, CY_CFG_SYSCLK_CLKPATH2_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath3Init()
+{
+ Cy_SysClk_ClkPathSetSource(3U, CY_CFG_SYSCLK_CLKPATH3_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath4Init()
+{
+ Cy_SysClk_ClkPathSetSource(4U, CY_CFG_SYSCLK_CLKPATH4_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPath5Init()
+{
+ Cy_SysClk_ClkPathSetSource(5U, CY_CFG_SYSCLK_CLKPATH5_SOURCE);
+}
+__STATIC_INLINE void Cy_SysClk_ClkPeriInit()
+{
+ Cy_SysClk_ClkPeriSetDivider(0U);
+}
+__STATIC_INLINE void Cy_SysClk_Pll0Init()
+{
+ if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllManualConfigure(1U, &srss_0_clock_0_pll_0_pllConfig))
+ {
+ cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR);
+ }
+ if (CY_SYSCLK_SUCCESS != Cy_SysClk_PllEnable(1U, 10000u))
+ {
+ cycfg_ClockStartupError(CY_CFG_SYSCLK_PLL_ERROR);
+ }
+}
+__STATIC_INLINE void Cy_SysClk_ClkSlowInit()
+{
+ Cy_SysClk_ClkSlowSetDivider(0U);
+}
+__STATIC_INLINE void Cy_SysClk_ClkTimerInit()
+{
+ Cy_SysClk_ClkTimerDisable();
+ Cy_SysClk_ClkTimerSetSource(CY_SYSCLK_CLKTIMER_IN_IMO);
+ Cy_SysClk_ClkTimerSetDivider(0U);
+ Cy_SysClk_ClkTimerEnable();
+}
+__STATIC_INLINE void Cy_SysClk_WcoInit()
+{
+ (void) Cy_GPIO_Pin_FastInit(GPIO_PRT0, 0U, 0x00U, 0x00U, HSIOM_SEL_GPIO);
+ (void) Cy_GPIO_Pin_FastInit(GPIO_PRT0, 1U, 0x00U, 0x00U, HSIOM_SEL_GPIO);
+ if (CY_SYSCLK_SUCCESS != Cy_SysClk_WcoEnable(1000000UL))
+ {
+ cycfg_ClockStartupError(CY_CFG_SYSCLK_WCO_ERROR);
+ }
+}
+__STATIC_INLINE void init_cycfg_power(void)
+{
+ /* Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD */
+#if (CY_CFG_PWR_VBACKUP_USING_VDDD)
+#ifdef CY_CFG_SYSCLK_ILO_ENABLED
+ if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)
+ {
+#if CY_CFG_SYSCLK_WCO_ENABLED
+ uint32_t wcoTrim = Cy_SysLib_GetWcoTrim();
+ if (CY_SYSLIB_SUCCESS != Cy_SysLib_ResetBackupDomain())
+ {
+ Cy_SysLib_DelayUs(1U);
+ if (CY_SYSLIB_SUCCESS != Cy_SysLib_GetResetStatus())
+ {
+ cycfg_ClockStartupError(CY_CFG_PWR_BKP_ERROR);
+ }
+ }
+ Cy_SysLib_SetWcoTrim(wcoTrim);
+#else /* CY_CFG_SYSCLK_WCO_ENABLED */
+ (void) Cy_SysLib_ResetBackupDomain();
+#endif /* CY_CFG_SYSCLK_WCO_ENABLED */
+ Cy_SysClk_IloDisable();
+ Cy_SysClk_IloInit();
+ }
+#endif /* CY_CFG_SYSCLK_ILO_ENABLED */
+#endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
+/* Configure core regulator */
+#if !(defined(CY_DEVICE_SECURE))
+#if defined(CY_IP_M4CPUSS)
+#if CY_CFG_PWR_USING_LDO
+ Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP);
+#else
+ Cy_SysPm_BuckEnable(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP);
+#endif /* CY_CFG_PWR_USING_LDO */
+#endif /* defined (CY_IP_M4CPUSS) */
+#if CY_CFG_PWR_REGULATOR_MODE_MIN
+ Cy_SysPm_SystemSetMinRegulatorCurrent();
+#else
+ Cy_SysPm_SystemSetNormalRegulatorCurrent();
+#endif /* CY_CFG_PWR_REGULATOR_MODE_MIN */
+#endif /* !(defined(CY_DEVICE_SECURE)) */
+ /* Configure PMIC */
+ Cy_SysPm_UnlockPmic();
+#if CY_CFG_PWR_USING_PMIC
+ Cy_SysPm_PmicEnableOutput();
+#else
+ Cy_SysPm_PmicDisableOutput();
+#endif /* CY_CFG_PWR_USING_PMIC */
+}
+#endif //(!defined(CY_DEVICE_SECURE))
+
+void init_cycfg_system(void)
+{
+ Cy_SysClk_PeriphAssignDivider(PCLK_CPUSS_CLOCK_TRACE_IN, CY_SYSCLK_DIV_8_BIT, 7U);
+#if defined(CY_DEVICE_SECURE)
+ cy_en_pra_status_t configStatus;
+ init_cycfg_secure_struct(&srss_0_clock_0_secureConfig);
+#if (((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+#if (((CY_CFG_SYSCLK_CLKPATH1_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH1_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 1UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+#if (((CY_CFG_SYSCLK_CLKPATH2_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH2_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 2UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+#if (((CY_CFG_SYSCLK_CLKPATH3_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH3_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 3UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+#if (((CY_CFG_SYSCLK_CLKPATH4_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH4_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 4UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+#if (((CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM >= 3UL) && (CY_CFG_SYSCLK_CLKPATH5_SOURCE_NUM <= 5UL)) && \
+ (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 5UL))
+#error Configuration Error : ALTHF, ILO, PILO cannot drive HF0.
+#endif
+
+ configStatus = CY_PRA_FUNCTION_CALL_RETURN_PARAM(CY_PRA_MSG_TYPE_SYS_CFG_FUNC, CY_PRA_FUNC_INIT_CYCFG_DEVICE,
+ &srss_0_clock_0_secureConfig);
+ if (configStatus != CY_PRA_STATUS_SUCCESS)
+ {
+ cycfg_ClockStartupError(configStatus);
+ }
+#ifdef CY_CFG_SYSCLK_EXTCLK_FREQ
+ Cy_SysClk_ExtClkSetFrequency(CY_CFG_SYSCLK_EXTCLK_FREQ);
+#endif /* CY_CFG_SYSCLK_EXTCLK_FREQ */
+#else /* defined(CY_DEVICE_SECURE) */
+
+ /* Set worst case memory wait states (! ultra low power, 150 MHz), will update at the end */
+ Cy_SysLib_SetWaitStates(false, 150UL);
+#ifdef CY_CFG_PWR_ENABLED
+#ifdef CY_CFG_PWR_INIT
+ init_cycfg_power();
+#else
+#warning Power system will not be configured. Update power personality to v1.20 or later.
+#endif /* CY_CFG_PWR_INIT */
+#endif /* CY_CFG_PWR_ENABLED */
+
+ /* Disable FLL */
+ Cy_SysClk_FllDeInit();
+
+ /* Reset the core clock path to default and disable all the FLLs/PLLs */
+ Cy_SysClk_ClkHfSetDivider(0U, CY_SYSCLK_CLKHF_NO_DIVIDE);
+ Cy_SysClk_ClkFastSetDivider(0U);
+ Cy_SysClk_ClkPeriSetDivider(1U);
+ Cy_SysClk_ClkSlowSetDivider(0U);
+ for (uint32_t pll = CY_SRSS_NUM_PLL; pll > 0UL; --pll) /* PLL 1 is the first PLL. 0 is invalid. */
+ {
+ (void) Cy_SysClk_PllDisable(pll);
+ }
+ Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH1, CY_SYSCLK_CLKPATH_IN_IMO);
+
+ if ((CY_SYSCLK_CLKHF_IN_CLKPATH0 == Cy_SysClk_ClkHfGetSource(0UL)) &&
+ (CY_SYSCLK_CLKPATH_IN_WCO == Cy_SysClk_ClkPathGetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0)))
+ {
+ Cy_SysClk_ClkHfSetSource(0U, CY_SYSCLK_CLKHF_IN_CLKPATH1);
+ }
+
+ Cy_SysClk_ClkPathSetSource(CY_SYSCLK_CLKHF_IN_CLKPATH0, CY_SYSCLK_CLKPATH_IN_IMO);
+ Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH0);
+#ifdef CY_IP_MXBLESS
+ (void) Cy_BLE_EcoReset();
+#endif
+
+/* Enable all source clocks */
+#ifdef CY_CFG_SYSCLK_PILO_ENABLED
+ Cy_SysClk_PiloInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_WCO_ENABLED
+ Cy_SysClk_WcoInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
+ Cy_SysClk_ClkLfInit();
+#endif
+
+#if (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED)
+ Cy_SysClk_AltHfInit();
+#endif /* (defined(CY_IP_M4CPUSS) && CY_CFG_SYSCLK_ALTHF_ENABLED */
+
+#ifdef CY_CFG_SYSCLK_ECO_ENABLED
+ Cy_SysClk_EcoInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_EXTCLK_ENABLED
+ Cy_SysClk_ExtClkInit();
+#endif
+
+/* Configure CPU clock dividers */
+#ifdef CY_CFG_SYSCLK_CLKFAST_ENABLED
+ Cy_SysClk_ClkFastInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKPERI_ENABLED
+ Cy_SysClk_ClkPeriInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKSLOW_ENABLED
+ Cy_SysClk_ClkSlowInit();
+#endif
+
+#if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))
+ /* Configure HFCLK0 to temporarily run from IMO to initialize other clocks */
+ Cy_SysClk_ClkPathSetSource(1UL, CY_SYSCLK_CLKPATH_IN_IMO);
+ Cy_SysClk_ClkHfSetSource(0UL, CY_SYSCLK_CLKHF_IN_CLKPATH1);
+#else
+#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
+ Cy_SysClk_ClkPath1Init();
+#endif
+#endif
+
+/* Configure Path Clocks */
+#ifdef CY_CFG_SYSCLK_CLKPATH0_ENABLED
+ Cy_SysClk_ClkPath0Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH2_ENABLED
+ Cy_SysClk_ClkPath2Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH3_ENABLED
+ Cy_SysClk_ClkPath3Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH4_ENABLED
+ Cy_SysClk_ClkPath4Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH5_ENABLED
+ Cy_SysClk_ClkPath5Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH6_ENABLED
+ Cy_SysClk_ClkPath6Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH7_ENABLED
+ Cy_SysClk_ClkPath7Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH8_ENABLED
+ Cy_SysClk_ClkPath8Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH9_ENABLED
+ Cy_SysClk_ClkPath9Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH10_ENABLED
+ Cy_SysClk_ClkPath10Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH11_ENABLED
+ Cy_SysClk_ClkPath11Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH12_ENABLED
+ Cy_SysClk_ClkPath12Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH13_ENABLED
+ Cy_SysClk_ClkPath13Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH14_ENABLED
+ Cy_SysClk_ClkPath14Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKPATH15_ENABLED
+ Cy_SysClk_ClkPath15Init();
+#endif
+
+/* Configure and enable FLL */
+#ifdef CY_CFG_SYSCLK_FLL_ENABLED
+ Cy_SysClk_FllInit();
+#endif
+
+ Cy_SysClk_ClkHf0Init();
+
+#if ((CY_CFG_SYSCLK_CLKPATH0_SOURCE_NUM == 0x6UL) && (CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM == 0U))
+#ifdef CY_CFG_SYSCLK_CLKPATH1_ENABLED
+ /* Apply the ClkPath1 user setting */
+ Cy_SysClk_ClkPath1Init();
+#endif
+#endif
+
+/* Configure and enable PLLs */
+#ifdef CY_CFG_SYSCLK_PLL0_ENABLED
+ Cy_SysClk_Pll0Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL1_ENABLED
+ Cy_SysClk_Pll1Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL2_ENABLED
+ Cy_SysClk_Pll2Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL3_ENABLED
+ Cy_SysClk_Pll3Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL4_ENABLED
+ Cy_SysClk_Pll4Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL5_ENABLED
+ Cy_SysClk_Pll5Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL6_ENABLED
+ Cy_SysClk_Pll6Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL7_ENABLED
+ Cy_SysClk_Pll7Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL8_ENABLED
+ Cy_SysClk_Pll8Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL9_ENABLED
+ Cy_SysClk_Pll9Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL10_ENABLED
+ Cy_SysClk_Pll10Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL11_ENABLED
+ Cy_SysClk_Pll11Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL12_ENABLED
+ Cy_SysClk_Pll12Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL13_ENABLED
+ Cy_SysClk_Pll13Init();
+#endif
+#ifdef CY_CFG_SYSCLK_PLL14_ENABLED
+ Cy_SysClk_Pll14Init();
+#endif
+
+/* Configure HF clocks */
+#ifdef CY_CFG_SYSCLK_CLKHF1_ENABLED
+ Cy_SysClk_ClkHf1Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF2_ENABLED
+ Cy_SysClk_ClkHf2Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF3_ENABLED
+ Cy_SysClk_ClkHf3Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF4_ENABLED
+ Cy_SysClk_ClkHf4Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF5_ENABLED
+ Cy_SysClk_ClkHf5Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF6_ENABLED
+ Cy_SysClk_ClkHf6Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF7_ENABLED
+ Cy_SysClk_ClkHf7Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF8_ENABLED
+ Cy_SysClk_ClkHf8Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF9_ENABLED
+ Cy_SysClk_ClkHf9Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF10_ENABLED
+ Cy_SysClk_ClkHf10Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF11_ENABLED
+ Cy_SysClk_ClkHf11Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF12_ENABLED
+ Cy_SysClk_ClkHf12Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF13_ENABLED
+ Cy_SysClk_ClkHf13Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF14_ENABLED
+ Cy_SysClk_ClkHf14Init();
+#endif
+#ifdef CY_CFG_SYSCLK_CLKHF15_ENABLED
+ Cy_SysClk_ClkHf15Init();
+#endif
+
+ /* Configure miscellaneous clocks */
+#ifdef CY_CFG_SYSCLK_CLKTIMER_ENABLED
+ Cy_SysClk_ClkTimerInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED
+ Cy_SysClk_ClkAltSysTickInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKPUMP_ENABLED
+ Cy_SysClk_ClkPumpInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKBAK_ENABLED
+ Cy_SysClk_ClkBakInit();
+#endif
+
+/* Configure default enabled clocks */
+#ifdef CY_CFG_SYSCLK_ILO_ENABLED
+ Cy_SysClk_IloInit();
+#endif
+
+#ifndef CY_CFG_SYSCLK_IMO_ENABLED
+#error the IMO must be enabled for proper chip operation
+#endif
+
+#ifndef CY_CFG_SYSCLK_CLKHF0_ENABLED
+#error the CLKHF0 must be enabled for proper chip operation
+#endif
+
+#endif /* defined(CY_DEVICE_SECURE) */
+
+#ifdef CY_CFG_SYSCLK_MFO_ENABLED
+ Cy_SysClk_MfoInit();
+#endif
+
+#ifdef CY_CFG_SYSCLK_CLKMF_ENABLED
+ Cy_SysClk_ClkMfInit();
+#endif
+
+#if (!defined(CY_DEVICE_SECURE))
+/* Set accurate flash wait states */
+#if (defined(CY_CFG_PWR_ENABLED) && defined(CY_CFG_SYSCLK_CLKHF0_ENABLED))
+ Cy_SysLib_SetWaitStates(CY_CFG_PWR_USING_ULP != 0, CY_CFG_SYSCLK_CLKHF0_FREQ_MHZ);
+#endif
+
+ /* Update System Core Clock values for correct Cy_SysLib_Delay functioning */
+ SystemCoreClockUpdate();
+#ifndef CY_CFG_SYSCLK_ILO_ENABLED
+#ifdef CY_CFG_SYSCLK_CLKLF_ENABLED
+ /* Wait 4 ILO cycles in case of unfinished CLKLF clock source transition */
+ Cy_SysLib_DelayUs(200U);
+#endif
+ Cy_SysClk_IloDisable();
+ Cy_SysClk_IloHibernateOn(false);
+#endif
+
+#endif /* (!defined(CY_DEVICE_SECURE)) */
+
+#if defined(CY_CFG_SYSCLK_ECO_PRESCALER_ENABLED)
+ Cy_SysClk_EcoPrescalerInit();
+#endif // defined(CY_CFG_SYSCLK_ECO_PRESCALER_ENABLED)
+}
+
+void reserve_cycfg_system(void)
+{
+#if defined(CY_USING_HAL)
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_0_obj);
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_1_obj);
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_2_obj);
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_3_obj);
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_4_obj);
+ cyhal_hwmgr_reserve(&srss_0_clock_0_pathmux_5_obj);
+#endif // defined (CY_USING_HAL)
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.h b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.h
new file mode 100644
index 00000000000000..0bc3082fa297da
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/cycfg_system.h
@@ -0,0 +1,105 @@
+/*******************************************************************************
+ * File Name: cycfg_system.h
+ *
+ * Description:
+ * System configuration
+ * This file was automatically generated and should not be modified.
+ * Configurator Backend 3.10.0
+ * device-db 4.100.0.4304
+ * mtb-pdl-cat1 3.9.0.29592
+ *
+ ********************************************************************************
+ * Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+ * an affiliate of Cypress Semiconductor Corporation.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ ********************************************************************************/
+
+#if !defined(CYCFG_SYSTEM_H)
+#define CYCFG_SYSTEM_H
+
+#include "cy_pra.h"
+#include "cy_pra_cfg.h"
+#include "cy_sysclk.h"
+#include "cy_systick.h"
+#include "cycfg_notices.h"
+#if defined(CY_USING_HAL)
+#include "cyhal_hwmgr.h"
+#endif // defined (CY_USING_HAL)
+#include "cy_gpio.h"
+#include "cy_syspm.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define cpuss_0_dap_0_ENABLED 1U
+#define srss_0_clock_0_ENABLED 1U
+#define srss_0_clock_0_altsystickclk_0_ENABLED 1U
+#define srss_0_clock_0_bakclk_0_ENABLED 1U
+#define srss_0_clock_0_fastclk_0_ENABLED 1U
+#define srss_0_clock_0_fll_0_ENABLED 1U
+#define srss_0_clock_0_hfclk_0_ENABLED 1U
+#define CY_CFG_SYSCLK_CLKHF0 0UL
+#define CY_CFG_SYSCLK_CLKHF0_CLKPATH_NUM 0UL
+#define srss_0_clock_0_ilo_0_ENABLED 1U
+#define srss_0_clock_0_imo_0_ENABLED 1U
+#define srss_0_clock_0_lfclk_0_ENABLED 1U
+#define CY_CFG_SYSCLK_CLKLF_FREQ_HZ 32768
+#define CY_CFG_SYSCLK_CLKLF_SOURCE CY_SYSCLK_CLKLF_IN_WCO
+#define srss_0_clock_0_pathmux_0_ENABLED 1U
+#define srss_0_clock_0_pathmux_1_ENABLED 1U
+#define srss_0_clock_0_pathmux_2_ENABLED 1U
+#define srss_0_clock_0_pathmux_3_ENABLED 1U
+#define srss_0_clock_0_pathmux_4_ENABLED 1U
+#define srss_0_clock_0_pathmux_5_ENABLED 1U
+#define srss_0_clock_0_periclk_0_ENABLED 1U
+#define srss_0_clock_0_pll_0_ENABLED 1U
+#define srss_0_clock_0_slowclk_0_ENABLED 1U
+#define srss_0_clock_0_timerclk_0_ENABLED 1U
+#define srss_0_clock_0_wco_0_ENABLED 1U
+#define srss_0_power_0_ENABLED 1U
+#define CY_CFG_PWR_MODE_LP 0x01UL
+#define CY_CFG_PWR_MODE_ULP 0x02UL
+#define CY_CFG_PWR_MODE_ACTIVE 0x04UL
+#define CY_CFG_PWR_MODE_SLEEP 0x08UL
+#define CY_CFG_PWR_MODE_DEEPSLEEP 0x10UL
+#define CY_CFG_PWR_SYS_IDLE_MODE CY_CFG_PWR_MODE_DEEPSLEEP
+#define CY_CFG_PWR_SYS_ACTIVE_MODE CY_CFG_PWR_MODE_LP
+#define CY_CFG_PWR_DEEPSLEEP_LATENCY 0UL
+#define CY_CFG_PWR_USING_LDO 1
+#define CY_CFG_PWR_VDDA_MV 3300
+#define CY_CFG_PWR_VDDD_MV 3300
+#define CY_CFG_PWR_VBACKUP_MV 3300
+#define CY_CFG_PWR_VDD_NS_MV 3300
+#define CY_CFG_PWR_VDDIO0_MV 3300
+#define CY_CFG_PWR_VDDIO1_MV 3300
+
+#if defined(CY_USING_HAL)
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_0_obj;
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_1_obj;
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_2_obj;
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_3_obj;
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_4_obj;
+extern const cyhal_resource_inst_t srss_0_clock_0_pathmux_5_obj;
+#endif // defined (CY_USING_HAL)
+
+void init_cycfg_system(void);
+void reserve_cycfg_system(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* CYCFG_SYSTEM_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/qspi_config.cfg b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/qspi_config.cfg
new file mode 100644
index 00000000000000..b751dcd0f17ff5
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/GeneratedSource/qspi_config.cfg
@@ -0,0 +1,29 @@
+################################################################################
+# File Name: qspi_config.cfg
+#
+# Description:
+# This file contains a SMIF Bank layout for use with OpenOCD.
+# This file was automatically generated and should not be modified.
+# QSPI Configurator: 4.10.0.1343
+#
+################################################################################
+# Copyright 2024 Cypress Semiconductor Corporation (an Infineon company) or
+# an affiliate of Cypress Semiconductor Corporation.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+set SMIF_BANKS {
+ 0 {addr 0x18000000 size 0x4000000 psize 0x00000200 esize 0x00040000}
+}
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/cy_flash_map.h b/third_party/infineon/psoc6/psoc6_sdk/configs/cy_flash_map.h
new file mode 100644
index 00000000000000..89031c0bb4e151
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/cy_flash_map.h
@@ -0,0 +1,22 @@
+/* AUTO-GENERATED FILE, DO NOT EDIT. ALL CHANGES WILL BE LOST! */
+/* Platform: PSOC_062_2M */
+#ifndef CY_FLASH_MAP_H
+#define CY_FLASH_MAP_H
+
+static struct flash_area flash_areas[] = {
+ { .fa_id = FLASH_AREA_BOOTLOADER, .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, .fa_off = 0x0U, .fa_size = 0x28000U },
+ { .fa_id = FLASH_AREA_IMG_1_PRIMARY, .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, .fa_off = 0x28000U, .fa_size = 0x1c0000U },
+ { .fa_id = FLASH_AREA_IMG_1_SECONDARY,
+ .fa_device_id = FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX),
+ .fa_off = 0x200U,
+ .fa_size = 0x1c0000U },
+ { .fa_id = FLASH_AREA_IMAGE_SWAP_STATUS, .fa_device_id = FLASH_DEVICE_INTERNAL_FLASH, .fa_off = 0x1e8000U, .fa_size = 0x6c00U },
+ { .fa_id = FLASH_AREA_IMAGE_SCRATCH,
+ .fa_device_id = FLASH_DEVICE_EXTERNAL_FLASH(CY_BOOT_EXTERNAL_DEVICE_INDEX),
+ .fa_off = 0x440000U,
+ .fa_size = 0x80000U }
+};
+
+struct flash_area * boot_area_descs[] = { &flash_areas[0U], &flash_areas[1U], &flash_areas[2U],
+ &flash_areas[3U], &flash_areas[4U], NULL };
+#endif /* CY_FLASH_MAP_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/configs/lwipopts.h b/third_party/infineon/psoc6/psoc6_sdk/configs/lwipopts.h
index e0701a2cd268ac..5a10a49ce2ef67 100644
--- a/third_party/infineon/psoc6/psoc6_sdk/configs/lwipopts.h
+++ b/third_party/infineon/psoc6/psoc6_sdk/configs/lwipopts.h
@@ -18,8 +18,8 @@
/**
* @file
- * Compile-time configuration for LwIP on P6 platforms using the
- * P6 SDK.
+ * Compile-time configuration for LwIP on PSOC6 platforms using the
+ * PSOC6 SDK.
*
*/
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/TARGET_CY8CKIT-062S2-43012 b/third_party/infineon/psoc6/psoc6_sdk/libs/TARGET_CY8CKIT-062S2-43012
index 7f3840aab53ff7..a085cc64ea8edc 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/TARGET_CY8CKIT-062S2-43012
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/TARGET_CY8CKIT-062S2-43012
@@ -1 +1 @@
-Subproject commit 7f3840aab53ff773c5d95eaedb5aaaae9dd2af45
+Subproject commit a085cc64ea8edc368423b515cecb6787a48e2392
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/abstraction-rtos b/third_party/infineon/psoc6/psoc6_sdk/libs/abstraction-rtos
index 23800dd03bf460..ccca0f72d96ef6 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/abstraction-rtos
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/abstraction-rtos
@@ -1 +1 @@
-Subproject commit 23800dd03bf46064930127b22f915807cacbc1e7
+Subproject commit ccca0f72d96ef6dcdfe11402b244fdd420ae4792
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota b/third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota
deleted file mode 160000
index adc942bb85aa6e..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit adc942bb85aa6e43021cbf31454314dbe6038e25
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/bluetooth-freertos b/third_party/infineon/psoc6/psoc6_sdk/libs/bluetooth-freertos
deleted file mode 160000
index e0d13d8e1f49f5..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/bluetooth-freertos
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit e0d13d8e1f49f5522043133856fa268d1a279b32
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/btstack b/third_party/infineon/psoc6/psoc6_sdk/libs/btstack
index 205412d987da3f..d8f0984529fd9c 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/btstack
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/btstack
@@ -1 +1 @@
-Subproject commit 205412d987da3f397201580ac2f98918d1bb0d57
+Subproject commit d8f0984529fd9cbc84bfbda62eb0f4d25063d630
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration b/third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration
new file mode 160000
index 00000000000000..5e47501ee097ad
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/btstack-integration
@@ -0,0 +1 @@
+Subproject commit 5e47501ee097add323be53bc7032fb50e110ad3e
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p b/third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p
new file mode 160000
index 00000000000000..ddcdedbccd69b3
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/cat1cm0p
@@ -0,0 +1 @@
+Subproject commit ddcdedbccd69b360da108328e689af2b4d6ac8cb
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/clib-support b/third_party/infineon/psoc6/psoc6_sdk/libs/clib-support
index 8be98e6512bb03..97cf620d8cde5d 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/clib-support
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/clib-support
@@ -1 +1 @@
-Subproject commit 8be98e6512bb03d11780530c35e23cd723a1cd72
+Subproject commit 97cf620d8cde5ded9844f7a2f8e0fe2f0ea65891
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/cmsis b/third_party/infineon/psoc6/psoc6_sdk/libs/cmsis
new file mode 160000
index 00000000000000..ce02f641ebc221
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/cmsis
@@ -0,0 +1 @@
+Subproject commit ce02f641ebc22103402260f9bb95698fd14086f1
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/connectivity-utilities b/third_party/infineon/psoc6/psoc6_sdk/libs/connectivity-utilities
index 25d71a735e2165..3f6ae38680bb85 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/connectivity-utilities
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/connectivity-utilities
@@ -1 +1 @@
-Subproject commit 25d71a735e2165e777948469cd68c419fd75b3a5
+Subproject commit 3f6ae38680bb85061829733c8f1037a6299ce6c5
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/core-lib b/third_party/infineon/psoc6/psoc6_sdk/libs/core-lib
index 7e6892ee1eeabc..a74be8b06601cb 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/core-lib
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/core-lib
@@ -1 +1 @@
-Subproject commit 7e6892ee1eeabc8f6c25fbf02cb00ff43bd3ac73
+Subproject commit a74be8b06601cbd698dc80b1cdad772412c12d04
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/core-make b/third_party/infineon/psoc6/psoc6_sdk/libs/core-make
index 251ade90cd5600..b962a1ed157c34 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/core-make
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/core-make
@@ -1 +1 @@
-Subproject commit 251ade90cd56005369ced67cf0583171783b1cd1
+Subproject commit b962a1ed157c34ee24ab7002dadcc39276dd5218
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/freertos b/third_party/infineon/psoc6/psoc6_sdk/libs/freertos
index eec60193e7f5d4..c2c8a9b26fd8b3 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/freertos
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/freertos
@@ -1 +1 @@
-Subproject commit eec60193e7f5d4e239bc9c8e6c0c6e88eb3ecdb4
+Subproject commit c2c8a9b26fd8b33d9f08e66c85dd3cae4610acef
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/kv-store b/third_party/infineon/psoc6/psoc6_sdk/libs/kv-store
index c81d0a32cb8301..9a75a83d22583c 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/kv-store
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/kv-store
@@ -1 +1 @@
-Subproject commit c81d0a32cb8301b307b9e32c126bf1a1f6465fbb
+Subproject commit 9a75a83d22583c83b862b4118ee13a20e38af8ac
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/lwip b/third_party/infineon/psoc6/psoc6_sdk/libs/lwip
index bef26c44236a07..159e31b689577d 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/lwip
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/lwip
@@ -1 +1 @@
-Subproject commit bef26c44236a078d4352e76392ef16f019bea501
+Subproject commit 159e31b689577dbf69cf0683bbaffbd71fa5ee10
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration b/third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration
index 9e1660130f6113..683110fbb75965 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/lwip-network-interface-integration
@@ -1 +1 @@
-Subproject commit 9e1660130f611364c8772bc01147ddb2916c8d8d
+Subproject commit 683110fbb7596507e9b61fd1c83510cb3b35d805
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-hal-cat1 b/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-hal-cat1
index 708a6b2542f0d8..4090e1aec69137 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-hal-cat1
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-hal-cat1
@@ -1 +1 @@
-Subproject commit 708a6b2542f0d8814c129a3141e78fd265826a0b
+Subproject commit 4090e1aec69137fe80423eabe4558d9291dbe9d2
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-pdl-cat1 b/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-pdl-cat1
index 3c6aebd2f3238b..96bbf1928e6b99 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-pdl-cat1
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/mtb-pdl-cat1
@@ -1 +1 @@
-Subproject commit 3c6aebd2f3238b578329bfb8a6c5a0e138bd5c7b
+Subproject commit 96bbf1928e6b99feec4451c6011403aaabf4c08d
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction b/third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction
new file mode 160000
index 00000000000000..472c6455f74a64
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/ota-bootloader-abstraction
@@ -0,0 +1 @@
+Subproject commit 472c6455f74a643f1894fc5d111cf7838c89ad2d
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/ota-update b/third_party/infineon/psoc6/psoc6_sdk/libs/ota-update
new file mode 160000
index 00000000000000..d7da5cc50fc31d
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/ota-update
@@ -0,0 +1 @@
+Subproject commit d7da5cc50fc31d525b9bc7324989b5cbb330644c
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/psoc6cm0p b/third_party/infineon/psoc6/psoc6_sdk/libs/psoc6cm0p
deleted file mode 160000
index 65569574830d3e..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/psoc6cm0p
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 65569574830d3eef29fb9a0f1060eb0885063b56
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/recipe-make-cat1a b/third_party/infineon/psoc6/psoc6_sdk/libs/recipe-make-cat1a
index 656d8c5b4fbd1e..0446103a230b44 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/recipe-make-cat1a
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/recipe-make-cat1a
@@ -1 +1 @@
-Subproject commit 656d8c5b4fbd1e20190315ffb6a64ae151f627c9
+Subproject commit 0446103a230b44aa972a028bbe31591c4744e85f
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/retarget-io b/third_party/infineon/psoc6/psoc6_sdk/libs/retarget-io
index a61cd7c5f4b280..db7f9627c81f3d 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/retarget-io
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/retarget-io
@@ -1 +1 @@
-Subproject commit a61cd7c5f4b2808c949248f05287c09e6578abfc
+Subproject commit db7f9627c81f3d54401cf4aaf7f5ddf21ceda326
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/secure-sockets b/third_party/infineon/psoc6/psoc6_sdk/libs/secure-sockets
index f7508f942e1c25..3627168abbed91 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/secure-sockets
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/secure-sockets
@@ -1 +1 @@
-Subproject commit f7508f942e1c25f74f5317422ed8289b2b930cb1
+Subproject commit 3627168abbed91f8df3f1d6e41a37ad918fffdfc
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/serial-flash b/third_party/infineon/psoc6/psoc6_sdk/libs/serial-flash
index c7b55aa5406e6d..9830481016731e 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/serial-flash
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/serial-flash
@@ -1 +1 @@
-Subproject commit c7b55aa5406e6da9954f60e5f5460b71cd220ef2
+Subproject commit 9830481016731e3953996a7b118c84f7f46baa1e
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/whd-bsp-integration b/third_party/infineon/psoc6/psoc6_sdk/libs/whd-bsp-integration
index c180a141838d02..0bdf13bafdcd19 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/whd-bsp-integration
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/whd-bsp-integration
@@ -1 +1 @@
-Subproject commit c180a141838d02aea52f86967772f8216fc15a18
+Subproject commit 0bdf13bafdcd190c8eade52e03af676b163ac6d0
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-connection-manager b/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-connection-manager
index 2567493ff15459..8602aabdfff9ed 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-connection-manager
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-connection-manager
@@ -1 +1 @@
-Subproject commit 2567493ff1545989e24f6415254a70d24b7a76e6
+Subproject commit 8602aabdfff9edbaeacfd8ee09461ff81e363064
diff --git a/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-host-driver b/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-host-driver
index 919d9213128860..04ee318cc96bff 160000
--- a/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-host-driver
+++ b/third_party/infineon/psoc6/psoc6_sdk/libs/wifi-host-driver
@@ -1 +1 @@
-Subproject commit 919d921312886057411efcf2271c99296f87afb8
+Subproject commit 04ee318cc96bffa7d69a1e076c008e2364453f82
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil.h b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil.h
new file mode 100644
index 00000000000000..ff94964158ef3d
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil.h
@@ -0,0 +1,79 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#ifndef H_BOOTUTIL_
+#define H_BOOTUTIL_
+
+#include <inttypes.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Attempt to boot the contents of the primary slot. */
+#define BOOT_SWAP_TYPE_NONE 1
+
+/**
+ * Swap to the secondary slot.
+ * Absent a confirm command, revert back on next boot.
+ */
+#define BOOT_SWAP_TYPE_TEST 2
+
+/**
+ * Swap to the secondary slot,
+ * and permanently switch to booting its contents.
+ */
+#define BOOT_SWAP_TYPE_PERM 3
+
+/** Swap back to alternate slot. A confirm changes this state to NONE. */
+#define BOOT_SWAP_TYPE_REVERT 4
+
+/** Swap failed because image to be run is not valid */
+#define BOOT_SWAP_TYPE_FAIL 5
+
+/** Swapping encountered an unrecoverable error */
+#define BOOT_SWAP_TYPE_PANIC 0xff
+
+#define BOOT_MAX_ALIGN 8
+
+/* This is not actually used by mcuboot's code but can be used by apps
+ * when attempting to read/write a trailer.
+ */
+struct image_trailer
+{
+ uint8_t swap_type;
+ uint8_t pad1[BOOT_MAX_ALIGN - 1];
+ uint8_t copy_done;
+ uint8_t pad2[BOOT_MAX_ALIGN - 1];
+ uint8_t image_ok;
+ uint8_t pad3[BOOT_MAX_ALIGN - 1];
+ uint8_t magic[16];
+};
+
+int boot_swap_type_multi(int image_index);
+int boot_swap_type(void);
+
+int boot_set_pending(int image, int permanent);
+int boot_set_confirmed(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil_log.h b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil_log.h
new file mode 100644
index 00000000000000..02f15f063949b9
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/bootutil_log.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef H_BOOTUTIL_LOG_H_
+#define H_BOOTUTIL_LOG_H_
+
+#include "ignore.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <mcuboot_config/mcuboot_config.h>
+#include <mcuboot_config/mcuboot_logging.h>
+
+#if 1 // def MCUBOOT_HAVE_LOGGING
+
+#define BOOT_LOG_ERR(...) MCUBOOT_LOG_ERR(__VA_ARGS__)
+#define BOOT_LOG_WRN(...) MCUBOOT_LOG_WRN(__VA_ARGS__)
+#define BOOT_LOG_INF(...) MCUBOOT_LOG_INF(__VA_ARGS__)
+#define BOOT_LOG_DBG(...) MCUBOOT_LOG_DBG(__VA_ARGS__)
+
+#else
+
+#define BOOT_LOG_ERR(...) IGNORE(__VA_ARGS__)
+#define BOOT_LOG_WRN(...) IGNORE(__VA_ARGS__)
+#define BOOT_LOG_INF(...) IGNORE(__VA_ARGS__)
+#define BOOT_LOG_DBG(...) IGNORE(__VA_ARGS__)
+
+#endif /* MCUBOOT_HAVE_LOGGING */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/ignore.h b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/ignore.h
new file mode 100644
index 00000000000000..64d519e7baa770
--- /dev/null
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/bootutil/ignore.h
@@ -0,0 +1,101 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+
+#ifndef H_IGNORE_
+#define H_IGNORE_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * These macros prevent the "set but not used" warnings for log writes below
+ * the log level.
+ */
+
+#define IGN_1(X) ((void) (X))
+#define IGN_2(X, ...) \
+ ((void) (X)); \
+ IGN_1(__VA_ARGS__)
+#define IGN_3(X, ...) \
+ ((void) (X)); \
+ IGN_2(__VA_ARGS__)
+#define IGN_4(X, ...) \
+ ((void) (X)); \
+ IGN_3(__VA_ARGS__)
+#define IGN_5(X, ...) \
+ ((void) (X)); \
+ IGN_4(__VA_ARGS__)
+#define IGN_6(X, ...) \
+ ((void) (X)); \
+ IGN_5(__VA_ARGS__)
+#define IGN_7(X, ...) \
+ ((void) (X)); \
+ IGN_6(__VA_ARGS__)
+#define IGN_8(X, ...) \
+ ((void) (X)); \
+ IGN_7(__VA_ARGS__)
+#define IGN_9(X, ...) \
+ ((void) (X)); \
+ IGN_8(__VA_ARGS__)
+#define IGN_10(X, ...) \
+ ((void) (X)); \
+ IGN_9(__VA_ARGS__)
+#define IGN_11(X, ...) \
+ ((void) (X)); \
+ IGN_10(__VA_ARGS__)
+#define IGN_12(X, ...) \
+ ((void) (X)); \
+ IGN_11(__VA_ARGS__)
+#define IGN_13(X, ...) \
+ ((void) (X)); \
+ IGN_12(__VA_ARGS__)
+#define IGN_14(X, ...) \
+ ((void) (X)); \
+ IGN_13(__VA_ARGS__)
+#define IGN_15(X, ...) \
+ ((void) (X)); \
+ IGN_14(__VA_ARGS__)
+#define IGN_16(X, ...) \
+ ((void) (X)); \
+ IGN_15(__VA_ARGS__)
+#define IGN_17(X, ...) \
+ ((void) (X)); \
+ IGN_16(__VA_ARGS__)
+#define IGN_18(X, ...) \
+ ((void) (X)); \
+ IGN_17(__VA_ARGS__)
+#define IGN_19(X, ...) \
+ ((void) (X)); \
+ IGN_18(__VA_ARGS__)
+#define IGN_20(X, ...) \
+ ((void) (X)); \
+ IGN_19(__VA_ARGS__)
+
+#define GET_MACRO(_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, NAME, ...) NAME
+#define IGNORE(...) \
+ GET_MACRO(__VA_ARGS__, IGN_20, IGN_19, IGN_18, IGN_17, IGN_16, IGN_15, IGN_14, IGN_13, IGN_12, IGN_11, IGN_10, IGN_9, IGN_8, \
+ IGN_7, IGN_6, IGN_5, IGN_4, IGN_3, IGN_2, IGN_1) \
+ (__VA_ARGS__)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_assert.h b/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_assert.h
deleted file mode 100644
index 15a69555516030..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_assert.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * mcuboot_assert.h
- *
- * Cypress-specific assert() macro redefinition
- *
- */
-
-#ifndef MCUBOOT_ASSERT_H
-#define MCUBOOT_ASSERT_H
-
-#define CYBL_ASSERT(...) Cy_BLServ_Assert(__VA_ARGS__)
-
-#if !defined(NDEBUG)
-#undef assert
-#define assert(...) CYBL_ASSERT(__VA_ARGS__)
-#else
-#define assert
-#endif
-
-#endif /* MCUBOOT_ASSERT_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_config.h b/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_config.h
deleted file mode 100644
index 6b11d855ca1d04..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_config.h
+++ /dev/null
@@ -1,151 +0,0 @@
-/* Copyright 2019 Cypress Semiconductor Corporation
- *
- * Copyright (c) 2018 Open Source Foundries Limited
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-#ifndef MCUBOOT_CONFIG_H
-#define MCUBOOT_CONFIG_H
-
-/*
- * Template configuration file for MCUboot.
- *
- * When porting MCUboot to a new target, copy it somewhere that your
- * include path can find it as mcuboot_config/mcuboot_config.h, and
- * make adjustments to suit your platform.
- *
- * For examples, see:
- *
- * boot/zephyr/include/mcuboot_config/mcuboot_config.h
- * boot/mynewt/mcuboot_config/include/mcuboot_config/mcuboot_config.h
- */
-/* Default maximum number of flash sectors per image slot; change
- * as desirable. */
-#ifndef MCUBOOT_MAX_IMG_SECTORS
-#define MCUBOOT_MAX_IMG_SECTORS 128
-#endif
-
-/*
- * Signature types
- *
- * You must choose exactly one signature type.
- */
-
-/* Uncomment for RSA signature support */
-//#define MCUBOOT_SIGN_RSA
-
-/* Uncomment for ECDSA signatures using curve P-256. */
-//#define MCUBOOT_SIGN_EC256
-//#define NUM_ECC_BYTES (256 / 8) // P-256 curve size in bytes, rnok: to make compilable
-
-// #define MCUBOOT_SIGN_EC
-
-/*
- * Upgrade mode
- *
- * The default is to support A/B image swapping with rollback. A
- * simpler code path, which only supports overwriting the
- * existing image with the update image, is also available.
- */
-#ifdef MCUBOOT_OVERWRITE_ONLY
-/* Uncomment to only erase and overwrite those slot 0 sectors needed
- * to install the new image, rather than the entire image slot. */
-/* #define MCUBOOT_OVERWRITE_ONLY_FAST */
-#else
-/* Using SWAP w Scratch by default.
- * Comment/Uncomment which is needed. */
-/* #define MCUBOOT_SWAP_USING_SCRATCH 1 */
-/* #define MCUBOOT_SWAP_USING_MOVE 1 */
-#define MCUBOOT_SWAP_USING_STATUS 1
-#endif
-
-/*
- * Cryptographic settings
- *
- * You must choose between mbedTLS and Tinycrypt as source of
- * cryptographic primitives. Other cryptographic settings are also
- * available.
- */
-
-/* Uncomment to use ARM's mbedTLS cryptographic primitives */
-#define MCUBOOT_USE_MBED_TLS
-/* Uncomment to use Tinycrypt's. */
-/* #define MCUBOOT_USE_TINYCRYPT */
-
-/*
- * Always check the signature of the image in slot 0 before booting,
- * even if no upgrade was performed. This is recommended if the boot
- * time penalty is acceptable.
- */
-//#define MCUBOOT_VALIDATE_PRIMARY_SLOT
-
-/*
- * Flash abstraction
- */
-
-/* Uncomment if your flash map API supports flash_area_get_sectors().
- * See the flash APIs for more details. */
-// TODO: FWSECURITY-755
-#define MCUBOOT_USE_FLASH_AREA_GET_SECTORS
-
-/* Default number of separately updateable images; change in case of
- * multiple images. */
-#ifndef MCUBOOT_IMAGE_NUMBER
-#define MCUBOOT_IMAGE_NUMBER 1
-#endif
-
-/*
- * Logging
- */
-
-/*
- * If logging is enabled the following functions must be defined by the
- * platform:
- *
- * MCUBOOT_LOG_ERR(...)
- * MCUBOOT_LOG_WRN(...)
- * MCUBOOT_LOG_INF(...)
- * MCUBOOT_LOG_DBG(...)
- *
- * The following global logging level configuration macros must also be
- * defined, each with a unique value. Those will be used to define a global
- * configuration and will allow any source files to override the global
- * configuration:
- *
- * MCUBOOT_LOG_LEVEL_OFF
- * MCUBOOT_LOG_LEVEL_ERROR
- * MCUBOOT_LOG_LEVEL_WARNING
- * MCUBOOT_LOG_LEVEL_INFO
- * MCUBOOT_LOG_LEVEL_DEBUG
- *
- * The global logging level must be defined, with one of the previously defined
- * logging levels:
- *
- * #define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_(OFF|ERROR|WARNING|INFO|DEBUG)
- *
- * MCUBOOT_LOG_LEVEL sets the minimum level that will be logged. The function
- * priority is:
- *
- * MCUBOOT_LOG_ERR > MCUBOOT_LOG_WRN > MCUBOOT_LOG_INF > MCUBOOT_LOG_DBG
- *
- * NOTE: Each source file is still able to request its own logging level by
- * defining BOOT_LOG_LEVEL before #including `bootutil_log.h`
- */
-#define MCUBOOT_HAVE_LOGGING 1
-
-/*
- * Assertions
- */
-
-/* Uncomment if your platform has its own mcuboot_config/mcuboot_assert.h.
- * If so, it must provide an ASSERT macro for use by bootutil. Otherwise,
- * "assert" is used. */
-//#define MCUBOOT_HAVE_ASSERT_H
-
-#define MCUBOOT_WATCHDOG_FEED() \
- do \
- { \
- /* TODO: to be implemented */ \
- } while (0)
-
-#endif /* MCUBOOT_CONFIG_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_logging.h b/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_logging.h
deleted file mode 100644
index 35424b4c5ad96d..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_config/mcuboot_logging.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Copyright (c) 2018 Nordic Semiconductor ASA
- * Copyright (c) 2015 Runtime Inc
- * Copyright (c) 2020 Cypress Semiconductor Corporation
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/*
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-/*******************************************************************************/
-
-#ifndef MCUBOOT_LOGGING_H
-#define MCUBOOT_LOGGING_H
-
-#include <stdio.h>
-
-#define MCUBOOT_LOG_LEVEL_OFF 0
-#define MCUBOOT_LOG_LEVEL_ERROR 1
-#define MCUBOOT_LOG_LEVEL_WARNING 2
-#define MCUBOOT_LOG_LEVEL_INFO 3
-#define MCUBOOT_LOG_LEVEL_DEBUG 4
-
-/*
- * The compiled log level determines the maximum level that can be
- * printed. Messages at or below this level can be printed, provided
- * they are also enabled through the Rust logging system, such as by
- * setting RUST_LOG to bootsim::api=info.
- */
-#ifndef MCUBOOT_LOG_LEVEL
-#define MCUBOOT_LOG_LEVEL MCUBOOT_LOG_LEVEL_INFO
-#endif
-
-int sim_log_enabled(int level);
-
-#define sim_log_enabled(x) 1
-
-#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_ERROR
-#define MCUBOOT_LOG_ERR(_fmt, ...) \
- do \
- { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_ERROR)) \
- { \
- fprintf(stderr, "[ERR] " _fmt "\n\r", ##__VA_ARGS__); \
- } \
- } while (0)
-#else
-#define MCUBOOT_LOG_ERR(...) IGNORE(__VA_ARGS__)
-#endif
-
-#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_WARNING
-#define MCUBOOT_LOG_WRN(_fmt, ...) \
- do \
- { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_WARNING)) \
- { \
- fprintf(stderr, "[WRN] " _fmt "\n\r", ##__VA_ARGS__); \
- } \
- } while (0)
-#else
-#define MCUBOOT_LOG_WRN(...) IGNORE(__VA_ARGS__)
-#endif
-
-#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_INFO
-#define MCUBOOT_LOG_INF(_fmt, ...) \
- do \
- { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_INFO)) \
- { \
- fprintf(stderr, "[INF] " _fmt "\n\r", ##__VA_ARGS__); \
- } \
- } while (0)
-#else
-#define MCUBOOT_LOG_INF(...) IGNORE(__VA_ARGS__)
-#endif
-
-#if MCUBOOT_LOG_LEVEL >= MCUBOOT_LOG_LEVEL_DEBUG
-#define MCUBOOT_LOG_DBG(_fmt, ...) \
- do \
- { \
- if (sim_log_enabled(MCUBOOT_LOG_LEVEL_DEBUG)) \
- { \
- fprintf(stderr, "[DBG] " _fmt "\n\r", ##__VA_ARGS__); \
- } \
- } while (0)
-#else
-#define MCUBOOT_LOG_DBG(...) IGNORE(__VA_ARGS__)
-#endif
-
-#define MCUBOOT_LOG_MODULE_DECLARE(...)
-
-#endif /* MCUBOOT_LOGGING_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_acc_config.h b/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_acc_config.h
deleted file mode 100644
index 2bf440a549bc49..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_acc_config.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * mbed Microcontroller Library
- * Copyright (c) 2019 Cypress Semiconductor Corporation
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
- * \file mcuboot_crypto_acc_config.h
- * \version 1.1
- */
-
-#ifndef MCUBOOT_MBEDTLS_DEVICE_H
-#define MCUBOOT_MBEDTLS_DEVICE_H
-
-/* Currently this target supports SHA1 */
-// #define MBEDTLS_SHA1_C
-
-#define MBEDTLS_SHA1_ALT
-#define MBEDTLS_SHA256_ALT
-#define MBEDTLS_SHA512_ALT
-
-/* Currently this target supports CBC, CFB, OFB, CTR and XTS cipher modes */
-#define MBEDTLS_AES_ALT
-// #define MBEDTLS_CIPHER_MODE_CBC
-// #define MBEDTLS_CIPHER_MODE_CFB
-// #define MBEDTLS_CIPHER_MODE_OFB
-// #define MBEDTLS_CIPHER_MODE_CTR
-// #define MBEDTLS_CIPHER_MODE_XTS
-
-/* Only NIST-P curves are currently supported */
-#define MBEDTLS_ECP_ALT
-// #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP224R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP256R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP384R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP521R1_ENABLED
-
-#define MBEDTLS_ECDSA_SIGN_ALT
-#define MBEDTLS_ECDSA_VERIFY_ALT
-
-#endif /* MCUBOOT_MBEDTLS_DEVICE_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_config.h b/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_config.h
deleted file mode 100644
index 4f0f7d383b4bc4..00000000000000
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/config/mcuboot_crypto_config.h
+++ /dev/null
@@ -1,3606 +0,0 @@
-/**
- * \file config.h
- *
- * \brief Configuration options (set of defines)
- *
- * This set of compile-time options may be used to enable
- * or disable features selectively, and reduce the global
- * memory footprint.
- */
-/*
- * Copyright (C) 2006-2018, ARM Limited, All Rights Reserved
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * This file is part of mbed TLS (https://tls.mbed.org)
- */
-
-#ifndef MBEDTLS_CONFIG_H
-#define MBEDTLS_CONFIG_H
-
-#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_DEPRECATE)
-#define _CRT_SECURE_NO_DEPRECATE 1
-#endif
-
-/**
- * \name SECTION: System support
- *
- * This section sets system specific settings.
- * \{
- */
-
-/**
- * \def MBEDTLS_HAVE_ASM
- *
- * The compiler has support for asm().
- *
- * Requires support for asm() in compiler.
- *
- * Used in:
- * library/aria.c
- * library/timing.c
- * include/mbedtls/bn_mul.h
- *
- * Required by:
- * MBEDTLS_AESNI_C
- * MBEDTLS_PADLOCK_C
- *
- * Comment to disable the use of assembly code.
- */
-#define MBEDTLS_HAVE_ASM
-
-/**
- * \def MBEDTLS_NO_UDBL_DIVISION
- *
- * The platform lacks support for double-width integer division (64-bit
- * division on a 32-bit platform, 128-bit division on a 64-bit platform).
- *
- * Used in:
- * include/mbedtls/bignum.h
- * library/bignum.c
- *
- * The bignum code uses double-width division to speed up some operations.
- * Double-width division is often implemented in software that needs to
- * be linked with the program. The presence of a double-width integer
- * type is usually detected automatically through preprocessor macros,
- * but the automatic detection cannot know whether the code needs to
- * and can be linked with an implementation of division for that type.
- * By default division is assumed to be usable if the type is present.
- * Uncomment this option to prevent the use of double-width division.
- *
- * Note that division for the native integer type is always required.
- * Furthermore, a 64-bit type is always required even on a 32-bit
- * platform, but it need not support multiplication or division. In some
- * cases it is also desirable to disable some double-width operations. For
- * example, if double-width division is implemented in software, disabling
- * it can reduce code size in some embedded targets.
- */
-//#define MBEDTLS_NO_UDBL_DIVISION
-
-/**
- * \def MBEDTLS_NO_64BIT_MULTIPLICATION
- *
- * The platform lacks support for 32x32 -> 64-bit multiplication.
- *
- * Used in:
- * library/poly1305.c
- *
- * Some parts of the library may use multiplication of two unsigned 32-bit
- * operands with a 64-bit result in order to speed up computations. On some
- * platforms, this is not available in hardware and has to be implemented in
- * software, usually in a library provided by the toolchain.
- *
- * Sometimes it is not desirable to have to link to that library. This option
- * removes the dependency of that library on platforms that lack a hardware
- * 64-bit multiplier by embedding a software implementation in Mbed TLS.
- *
- * Note that depending on the compiler, this may decrease performance compared
- * to using the library function provided by the toolchain.
- */
-//#define MBEDTLS_NO_64BIT_MULTIPLICATION
-
-/**
- * \def MBEDTLS_HAVE_SSE2
- *
- * CPU supports SSE2 instruction set.
- *
- * Uncomment if the CPU supports SSE2 (IA-32 specific).
- */
-//#define MBEDTLS_HAVE_SSE2
-
-/**
- * \def MBEDTLS_HAVE_TIME
- *
- * System has time.h and time().
- * The time does not need to be correct, only time differences are used,
- * by contrast with MBEDTLS_HAVE_TIME_DATE
- *
- * Defining MBEDTLS_HAVE_TIME allows you to specify MBEDTLS_PLATFORM_TIME_ALT,
- * MBEDTLS_PLATFORM_TIME_MACRO, MBEDTLS_PLATFORM_TIME_TYPE_MACRO and
- * MBEDTLS_PLATFORM_STD_TIME.
- *
- * Comment if your system does not support time functions
- */
-#define MBEDTLS_HAVE_TIME
-
-/**
- * \def MBEDTLS_HAVE_TIME_DATE
- *
- * System has time.h, time(), and an implementation for
- * mbedtls_platform_gmtime_r() (see below).
- * The time needs to be correct (not necessarily very accurate, but at least
- * the date should be correct). This is used to verify the validity period of
- * X.509 certificates.
- *
- * Comment if your system does not have a correct clock.
- *
- * \note mbedtls_platform_gmtime_r() is an abstraction in platform_util.h that
- * behaves similarly to the gmtime_r() function from the C standard. Refer to
- * the documentation for mbedtls_platform_gmtime_r() for more information.
- *
- * \note It is possible to configure an implementation for
- * mbedtls_platform_gmtime_r() at compile-time by using the macro
- * MBEDTLS_PLATFORM_GMTIME_R_ALT.
- */
-#define MBEDTLS_HAVE_TIME_DATE
-
-/**
- * \def MBEDTLS_PLATFORM_MEMORY
- *
- * Enable the memory allocation layer.
- *
- * By default mbed TLS uses the system-provided calloc() and free().
- * This allows different allocators (self-implemented or provided) to be
- * provided to the platform abstraction layer.
- *
- * Enabling MBEDTLS_PLATFORM_MEMORY without the
- * MBEDTLS_PLATFORM_{FREE,CALLOC}_MACROs will provide
- * "mbedtls_platform_set_calloc_free()" allowing you to set an alternative calloc() and
- * free() function pointer at runtime.
- *
- * Enabling MBEDTLS_PLATFORM_MEMORY and specifying
- * MBEDTLS_PLATFORM_{CALLOC,FREE}_MACROs will allow you to specify the
- * alternate function at compile time.
- *
- * Requires: MBEDTLS_PLATFORM_C
- *
- * Enable this layer to allow use of alternative memory allocators.
- */
-//#define MBEDTLS_PLATFORM_MEMORY
-
-/**
- * \def MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
- *
- * Do not assign standard functions in the platform layer (e.g. calloc() to
- * MBEDTLS_PLATFORM_STD_CALLOC and printf() to MBEDTLS_PLATFORM_STD_PRINTF)
- *
- * This makes sure there are no linking errors on platforms that do not support
- * these functions. You will HAVE to provide alternatives, either at runtime
- * via the platform_set_xxx() functions or at compile time by setting
- * the MBEDTLS_PLATFORM_STD_XXX defines, or enabling a
- * MBEDTLS_PLATFORM_XXX_MACRO.
- *
- * Requires: MBEDTLS_PLATFORM_C
- *
- * Uncomment to prevent default assignment of standard functions in the
- * platform layer.
- */
-//#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS
-
-/**
- * \def MBEDTLS_PLATFORM_EXIT_ALT
- *
- * MBEDTLS_PLATFORM_XXX_ALT: Uncomment a macro to let mbed TLS support the
- * function in the platform abstraction layer.
- *
- * Example: In case you uncomment MBEDTLS_PLATFORM_PRINTF_ALT, mbed TLS will
- * provide a function "mbedtls_platform_set_printf()" that allows you to set an
- * alternative printf function pointer.
- *
- * All these define require MBEDTLS_PLATFORM_C to be defined!
- *
- * \note MBEDTLS_PLATFORM_SNPRINTF_ALT is required on Windows;
- * it will be enabled automatically by check_config.h
- *
- * \warning MBEDTLS_PLATFORM_XXX_ALT cannot be defined at the same time as
- * MBEDTLS_PLATFORM_XXX_MACRO!
- *
- * Requires: MBEDTLS_PLATFORM_TIME_ALT requires MBEDTLS_HAVE_TIME
- *
- * Uncomment a macro to enable alternate implementation of specific base
- * platform function
- */
-//#define MBEDTLS_PLATFORM_EXIT_ALT
-//#define MBEDTLS_PLATFORM_TIME_ALT
-//#define MBEDTLS_PLATFORM_FPRINTF_ALT
-//#define MBEDTLS_PLATFORM_PRINTF_ALT
-//#define MBEDTLS_PLATFORM_SNPRINTF_ALT
-//#define MBEDTLS_PLATFORM_VSNPRINTF_ALT
-//#define MBEDTLS_PLATFORM_NV_SEED_ALT
-//#define MBEDTLS_PLATFORM_SETUP_TEARDOWN_ALT
-
-/**
- * \def MBEDTLS_DEPRECATED_WARNING
- *
- * Mark deprecated functions so that they generate a warning if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
- *
- * This only works with GCC and Clang. With other compilers, you may want to
- * use MBEDTLS_DEPRECATED_REMOVED
- *
- * Uncomment to get warnings on using deprecated functions.
- */
-//#define MBEDTLS_DEPRECATED_WARNING
-
-/**
- * \def MBEDTLS_DEPRECATED_REMOVED
- *
- * Remove deprecated functions so that they generate an error if used.
- * Functions deprecated in one version will usually be removed in the next
- * version. You can enable this to help you prepare the transition to a new
- * major version by making sure your code is not using these functions.
- *
- * Uncomment to get errors on using deprecated functions.
- */
-//#define MBEDTLS_DEPRECATED_REMOVED
-
-/**
- * \def MBEDTLS_CHECK_PARAMS
- *
- * This configuration option controls whether the library validates more of
- * the parameters passed to it.
- *
- * When this flag is not defined, the library only attempts to validate an
- * input parameter if: (1) they may come from the outside world (such as the
- * network, the filesystem, etc.) or (2) not validating them could result in
- * internal memory errors such as overflowing a buffer controlled by the
- * library. On the other hand, it doesn't attempt to validate parameters whose
- * values are fully controlled by the application (such as pointers).
- *
- * When this flag is defined, the library additionally attempts to validate
- * parameters that are fully controlled by the application, and should always
- * be valid if the application code is fully correct and trusted.
- *
- * For example, when a function accepts as input a pointer to a buffer that may
- * contain untrusted data, and its documentation mentions that this pointer
- * must not be NULL:
- * - The pointer is checked to be non-NULL only if this option is enabled.
- * - The content of the buffer is always validated.
- *
- * When this flag is defined, if a library function receives a parameter that
- * is invalid:
- * 1. The function will invoke the macro MBEDTLS_PARAM_FAILED().
- * 2. If MBEDTLS_PARAM_FAILED() did not terminate the program, the function
- * will immediately return. If the function returns an Mbed TLS error code,
- * the error code in this case is MBEDTLS_ERR_xxx_BAD_INPUT_DATA.
- *
- * When defining this flag, you also need to arrange a definition for
- * MBEDTLS_PARAM_FAILED(). You can do this by any of the following methods:
- * - By default, the library defines MBEDTLS_PARAM_FAILED() to call a
- * function mbedtls_param_failed(), but the library does not define this
- * function. If you do not make any other arrangements, you must provide
- * the function mbedtls_param_failed() in your application.
- * See `platform_util.h` for its prototype.
- * - If you enable the macro #MBEDTLS_CHECK_PARAMS_ASSERT, then the
- * library defines MBEDTLS_PARAM_FAILED(\c cond) to be `assert(cond)`.
- * You can still supply an alternative definition of
- * MBEDTLS_PARAM_FAILED(), which may call `assert`.
- * - If you define a macro MBEDTLS_PARAM_FAILED() before including `config.h`
- * or you uncomment the definition of MBEDTLS_PARAM_FAILED() in `config.h`,
- * the library will call the macro that you defined and will not supply
- * its own version. Note that if MBEDTLS_PARAM_FAILED() calls `assert`,
- * you need to enable #MBEDTLS_CHECK_PARAMS_ASSERT so that library source
- * files include `<assert.h>`.
- *
- * Uncomment to enable validation of application-controlled parameters.
- */
-//#define MBEDTLS_CHECK_PARAMS
-
-/**
- * \def MBEDTLS_CHECK_PARAMS_ASSERT
- *
- * Allow MBEDTLS_PARAM_FAILED() to call `assert`, and make it default to
- * `assert`. This macro is only used if #MBEDTLS_CHECK_PARAMS is defined.
- *
- * If this macro is not defined, then MBEDTLS_PARAM_FAILED() defaults to
- * calling a function mbedtls_param_failed(). See the documentation of
- * #MBEDTLS_CHECK_PARAMS for details.
- *
- * Uncomment to allow MBEDTLS_PARAM_FAILED() to call `assert`.
- */
-//#define MBEDTLS_CHECK_PARAMS_ASSERT
-
-/* \} name SECTION: System support */
-
-/**
- * \name SECTION: mbed TLS feature support
- *
- * This section sets support for features that are or are not needed
- * within the modules that are enabled.
- * \{
- */
-
-/**
- * \def MBEDTLS_TIMING_ALT
- *
- * Uncomment to provide your own alternate implementation for mbedtls_timing_hardclock(),
- * mbedtls_timing_get_timer(), mbedtls_set_alarm(), mbedtls_set/get_delay()
- *
- * Only works if you have MBEDTLS_TIMING_C enabled.
- *
- * You will need to provide a header "timing_alt.h" and an implementation at
- * compile time.
- */
-//#define MBEDTLS_TIMING_ALT
-
-/**
- * \def MBEDTLS_AES_ALT
- *
- * MBEDTLS__MODULE_NAME__ALT: Uncomment a macro to let mbed TLS use your
- * alternate core implementation of a symmetric crypto, an arithmetic or hash
- * module (e.g. platform specific assembly optimized implementations). Keep
- * in mind that the function prototypes should remain the same.
- *
- * This replaces the whole module. If you only want to replace one of the
- * functions, use one of the MBEDTLS__FUNCTION_NAME__ALT flags.
- *
- * Example: In case you uncomment MBEDTLS_AES_ALT, mbed TLS will no longer
- * provide the "struct mbedtls_aes_context" definition and omit the base
- * function declarations and implementations. "aes_alt.h" will be included from
- * "aes.h" to include the new function definitions.
- *
- * Uncomment a macro to enable alternate implementation of the corresponding
- * module.
- *
- * \warning MD2, MD4, MD5, ARC4, DES and SHA-1 are considered weak and their
- * use constitutes a security risk. If possible, we recommend
- * avoiding dependencies on them, and considering stronger message
- * digests and ciphers instead.
- *
- */
-//#define MBEDTLS_AES_ALT
-//#define MBEDTLS_ARC4_ALT
-//#define MBEDTLS_ARIA_ALT
-//#define MBEDTLS_BLOWFISH_ALT
-//#define MBEDTLS_CAMELLIA_ALT
-//#define MBEDTLS_CCM_ALT
-//#define MBEDTLS_CHACHA20_ALT
-//#define MBEDTLS_CHACHAPOLY_ALT
-//#define MBEDTLS_CMAC_ALT
-//#define MBEDTLS_DES_ALT
-//#define MBEDTLS_DHM_ALT
-//#define MBEDTLS_ECJPAKE_ALT
-//#define MBEDTLS_GCM_ALT
-//#define MBEDTLS_NIST_KW_ALT
-//#define MBEDTLS_MD2_ALT
-//#define MBEDTLS_MD4_ALT
-//#define MBEDTLS_MD5_ALT
-//#define MBEDTLS_POLY1305_ALT
-//#define MBEDTLS_RIPEMD160_ALT
-//#define MBEDTLS_RSA_ALT
-//#define MBEDTLS_SHA1_ALT
-//#define MBEDTLS_SHA256_ALT
-//#define MBEDTLS_SHA512_ALT
-//#define MBEDTLS_XTEA_ALT
-
-/*
- * When replacing the elliptic curve module, pleace consider, that it is
- * implemented with two .c files:
- * - ecp.c
- * - ecp_curves.c
- * You can replace them very much like all the other MBEDTLS__MODULE_NAME__ALT
- * macros as described above. The only difference is that you have to make sure
- * that you provide functionality for both .c files.
- */
-//#define MBEDTLS_ECP_ALT
-
-/**
- * \def MBEDTLS_MD2_PROCESS_ALT
- *
- * MBEDTLS__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use you
- * alternate core implementation of symmetric crypto or hash function. Keep in
- * mind that function prototypes should remain the same.
- *
- * This replaces only one function. The header file from mbed TLS is still
- * used, in contrast to the MBEDTLS__MODULE_NAME__ALT flags.
- *
- * Example: In case you uncomment MBEDTLS_SHA256_PROCESS_ALT, mbed TLS will
- * no longer provide the mbedtls_sha1_process() function, but it will still provide
- * the other function (using your mbedtls_sha1_process() function) and the definition
- * of mbedtls_sha1_context, so your implementation of mbedtls_sha1_process must be compatible
- * with this definition.
- *
- * \note Because of a signature change, the core AES encryption and decryption routines are
- * currently named mbedtls_aes_internal_encrypt and mbedtls_aes_internal_decrypt,
- * respectively. When setting up alternative implementations, these functions should
- * be overridden, but the wrapper functions mbedtls_aes_decrypt and mbedtls_aes_encrypt
- * must stay untouched.
- *
- * \note If you use the AES_xxx_ALT macros, then is is recommended to also set
- * MBEDTLS_AES_ROM_TABLES in order to help the linker garbage-collect the AES
- * tables.
- *
- * Uncomment a macro to enable alternate implementation of the corresponding
- * function.
- *
- * \warning MD2, MD4, MD5, DES and SHA-1 are considered weak and their use
- * constitutes a security risk. If possible, we recommend avoiding
- * dependencies on them, and considering stronger message digests
- * and ciphers instead.
- *
- */
-//#define MBEDTLS_MD2_PROCESS_ALT
-//#define MBEDTLS_MD4_PROCESS_ALT
-//#define MBEDTLS_MD5_PROCESS_ALT
-//#define MBEDTLS_RIPEMD160_PROCESS_ALT
-//#define MBEDTLS_SHA1_PROCESS_ALT
-//#define MBEDTLS_SHA256_PROCESS_ALT
-//#define MBEDTLS_SHA512_PROCESS_ALT
-//#define MBEDTLS_DES_SETKEY_ALT
-//#define MBEDTLS_DES_CRYPT_ECB_ALT
-//#define MBEDTLS_DES3_CRYPT_ECB_ALT
-//#define MBEDTLS_AES_SETKEY_ENC_ALT
-//#define MBEDTLS_AES_SETKEY_DEC_ALT
-//#define MBEDTLS_AES_ENCRYPT_ALT
-//#define MBEDTLS_AES_DECRYPT_ALT
-//#define MBEDTLS_ECDH_GEN_PUBLIC_ALT
-//#define MBEDTLS_ECDH_COMPUTE_SHARED_ALT
-//#define MBEDTLS_ECDSA_VERIFY_ALT
-//#define MBEDTLS_ECDSA_SIGN_ALT
-//#define MBEDTLS_ECDSA_GENKEY_ALT
-
-/**
- * \def MBEDTLS_ECP_INTERNAL_ALT
- *
- * Expose a part of the internal interface of the Elliptic Curve Point module.
- *
- * MBEDTLS_ECP__FUNCTION_NAME__ALT: Uncomment a macro to let mbed TLS use your
- * alternative core implementation of elliptic curve arithmetic. Keep in mind
- * that function prototypes should remain the same.
- *
- * This partially replaces one function. The header file from mbed TLS is still
- * used, in contrast to the MBEDTLS_ECP_ALT flag. The original implementation
- * is still present and it is used for group structures not supported by the
- * alternative.
- *
- * Any of these options become available by defining MBEDTLS_ECP_INTERNAL_ALT
- * and implementing the following functions:
- * unsigned char mbedtls_internal_ecp_grp_capable(
- * const mbedtls_ecp_group *grp )
- * int mbedtls_internal_ecp_init( const mbedtls_ecp_group *grp )
- * void mbedtls_internal_ecp_free( const mbedtls_ecp_group *grp )
- * The mbedtls_internal_ecp_grp_capable function should return 1 if the
- * replacement functions implement arithmetic for the given group and 0
- * otherwise.
- * The functions mbedtls_internal_ecp_init and mbedtls_internal_ecp_free are
- * called before and after each point operation and provide an opportunity to
- * implement optimized set up and tear down instructions.
- *
- * Example: In case you uncomment MBEDTLS_ECP_INTERNAL_ALT and
- * MBEDTLS_ECP_DOUBLE_JAC_ALT, mbed TLS will still provide the ecp_double_jac
- * function, but will use your mbedtls_internal_ecp_double_jac if the group is
- * supported (your mbedtls_internal_ecp_grp_capable function returns 1 when
- * receives it as an argument). If the group is not supported then the original
- * implementation is used. The other functions and the definition of
- * mbedtls_ecp_group and mbedtls_ecp_point will not change, so your
- * implementation of mbedtls_internal_ecp_double_jac and
- * mbedtls_internal_ecp_grp_capable must be compatible with this definition.
- *
- * Uncomment a macro to enable alternate implementation of the corresponding
- * function.
- */
-/* Required for all the functions in this section */
-//#define MBEDTLS_ECP_INTERNAL_ALT
-/* Support for Weierstrass curves with Jacobi representation */
-//#define MBEDTLS_ECP_RANDOMIZE_JAC_ALT
-//#define MBEDTLS_ECP_ADD_MIXED_ALT
-//#define MBEDTLS_ECP_DOUBLE_JAC_ALT
-//#define MBEDTLS_ECP_NORMALIZE_JAC_MANY_ALT
-//#define MBEDTLS_ECP_NORMALIZE_JAC_ALT
-/* Support for curves with Montgomery arithmetic */
-//#define MBEDTLS_ECP_DOUBLE_ADD_MXZ_ALT
-//#define MBEDTLS_ECP_RANDOMIZE_MXZ_ALT
-//#define MBEDTLS_ECP_NORMALIZE_MXZ_ALT
-
-/**
- * \def MBEDTLS_TEST_NULL_ENTROPY
- *
- * Enables testing and use of mbed TLS without any configured entropy sources.
- * This permits use of the library on platforms before an entropy source has
- * been integrated (see for example the MBEDTLS_ENTROPY_HARDWARE_ALT or the
- * MBEDTLS_ENTROPY_NV_SEED switches).
- *
- * WARNING! This switch MUST be disabled in production builds, and is suitable
- * only for development.
- * Enabling the switch negates any security provided by the library.
- *
- * Requires MBEDTLS_ENTROPY_C, MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
- *
- */
-//#define MBEDTLS_TEST_NULL_ENTROPY
-
-/**
- * \def MBEDTLS_ENTROPY_HARDWARE_ALT
- *
- * Uncomment this macro to let mbed TLS use your own implementation of a
- * hardware entropy collector.
- *
- * Your function must be called \c mbedtls_hardware_poll(), have the same
- * prototype as declared in entropy_poll.h, and accept NULL as first argument.
- *
- * Uncomment to use your own hardware entropy collector.
- */
-//#define MBEDTLS_ENTROPY_HARDWARE_ALT
-
-/**
- * \def MBEDTLS_AES_ROM_TABLES
- *
- * Use precomputed AES tables stored in ROM.
- *
- * Uncomment this macro to use precomputed AES tables stored in ROM.
- * Comment this macro to generate AES tables in RAM at runtime.
- *
- * Tradeoff: Using precomputed ROM tables reduces RAM usage by ~8kb
- * (or ~2kb if \c MBEDTLS_AES_FEWER_TABLES is used) and reduces the
- * initialization time before the first AES operation can be performed.
- * It comes at the cost of additional ~8kb ROM use (resp. ~2kb if \c
- * MBEDTLS_AES_FEWER_TABLES below is used), and potentially degraded
- * performance if ROM access is slower than RAM access.
- *
- * This option is independent of \c MBEDTLS_AES_FEWER_TABLES.
- *
- */
-//#define MBEDTLS_AES_ROM_TABLES
-
-/**
- * \def MBEDTLS_AES_FEWER_TABLES
- *
- * Use less ROM/RAM for AES tables.
- *
- * Uncommenting this macro omits 75% of the AES tables from
- * ROM / RAM (depending on the value of \c MBEDTLS_AES_ROM_TABLES)
- * by computing their values on the fly during operations
- * (the tables are entry-wise rotations of one another).
- *
- * Tradeoff: Uncommenting this reduces the RAM / ROM footprint
- * by ~6kb but at the cost of more arithmetic operations during
- * runtime. Specifically, one has to compare 4 accesses within
- * different tables to 4 accesses with additional arithmetic
- * operations within the same table. The performance gain/loss
- * depends on the system and memory details.
- *
- * This option is independent of \c MBEDTLS_AES_ROM_TABLES.
- *
- */
-//#define MBEDTLS_AES_FEWER_TABLES
-
-/**
- * \def MBEDTLS_CAMELLIA_SMALL_MEMORY
- *
- * Use less ROM for the Camellia implementation (saves about 768 bytes).
- *
- * Uncomment this macro to use less memory for Camellia.
- */
-//#define MBEDTLS_CAMELLIA_SMALL_MEMORY
-
-/**
- * \def MBEDTLS_CIPHER_MODE_CBC
- *
- * Enable Cipher Block Chaining mode (CBC) for symmetric ciphers.
- */
-#define MBEDTLS_CIPHER_MODE_CBC
-
-/**
- * \def MBEDTLS_CIPHER_MODE_CFB
- *
- * Enable Cipher Feedback mode (CFB) for symmetric ciphers.
- */
-#define MBEDTLS_CIPHER_MODE_CFB
-
-/**
- * \def MBEDTLS_CIPHER_MODE_CTR
- *
- * Enable Counter Block Cipher mode (CTR) for symmetric ciphers.
- */
-#define MBEDTLS_CIPHER_MODE_CTR
-
-/**
- * \def MBEDTLS_CIPHER_MODE_OFB
- *
- * Enable Output Feedback mode (OFB) for symmetric ciphers.
- */
-#define MBEDTLS_CIPHER_MODE_OFB
-
-/**
- * \def MBEDTLS_CIPHER_MODE_XTS
- *
- * Enable Xor-encrypt-xor with ciphertext stealing mode (XTS) for AES.
- */
-#define MBEDTLS_CIPHER_MODE_XTS
-
-/**
- * \def MBEDTLS_CIPHER_NULL_CIPHER
- *
- * Enable NULL cipher.
- * Warning: Only do so when you know what you are doing. This allows for
- * encryption or channels without any security!
- *
- * Requires MBEDTLS_ENABLE_WEAK_CIPHERSUITES as well to enable
- * the following ciphersuites:
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_NULL_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_NULL_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_NULL_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_NULL_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_NULL_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_NULL_SHA
- * MBEDTLS_TLS_RSA_WITH_NULL_SHA256
- * MBEDTLS_TLS_RSA_WITH_NULL_SHA
- * MBEDTLS_TLS_RSA_WITH_NULL_MD5
- * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_NULL_SHA
- * MBEDTLS_TLS_PSK_WITH_NULL_SHA384
- * MBEDTLS_TLS_PSK_WITH_NULL_SHA256
- * MBEDTLS_TLS_PSK_WITH_NULL_SHA
- *
- * Uncomment this macro to enable the NULL cipher and ciphersuites
- */
-//#define MBEDTLS_CIPHER_NULL_CIPHER
-
-/**
- * \def MBEDTLS_CIPHER_PADDING_PKCS7
- *
- * MBEDTLS_CIPHER_PADDING_XXX: Uncomment or comment macros to add support for
- * specific padding modes in the cipher layer with cipher modes that support
- * padding (e.g. CBC)
- *
- * If you disable all padding modes, only full blocks can be used with CBC.
- *
- * Enable padding modes in the cipher layer.
- */
-#define MBEDTLS_CIPHER_PADDING_PKCS7
-#define MBEDTLS_CIPHER_PADDING_ONE_AND_ZEROS
-#define MBEDTLS_CIPHER_PADDING_ZEROS_AND_LEN
-#define MBEDTLS_CIPHER_PADDING_ZEROS
-
-/**
- * \def MBEDTLS_ENABLE_WEAK_CIPHERSUITES
- *
- * Enable weak ciphersuites in SSL / TLS.
- * Warning: Only do so when you know what you are doing. This allows for
- * channels with virtually no security at all!
- *
- * This enables the following ciphersuites:
- * MBEDTLS_TLS_RSA_WITH_DES_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_DES_CBC_SHA
- *
- * Uncomment this macro to enable weak ciphersuites
- *
- * \warning DES is considered a weak cipher and its use constitutes a
- * security risk. We recommend considering stronger ciphers instead.
- */
-//#define MBEDTLS_ENABLE_WEAK_CIPHERSUITES
-
-/**
- * \def MBEDTLS_REMOVE_ARC4_CIPHERSUITES
- *
- * Remove RC4 ciphersuites by default in SSL / TLS.
- * This flag removes the ciphersuites based on RC4 from the default list as
- * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible to
- * enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including them
- * explicitly.
- *
- * Uncomment this macro to remove RC4 ciphersuites by default.
- */
-#define MBEDTLS_REMOVE_ARC4_CIPHERSUITES
-
-/**
- * \def MBEDTLS_REMOVE_3DES_CIPHERSUITES
- *
- * Remove 3DES ciphersuites by default in SSL / TLS.
- * This flag removes the ciphersuites based on 3DES from the default list as
- * returned by mbedtls_ssl_list_ciphersuites(). However, it is still possible
- * to enable (some of) them with mbedtls_ssl_conf_ciphersuites() by including
- * them explicitly.
- *
- * A man-in-the-browser attacker can recover authentication tokens sent through
- * a TLS connection using a 3DES based cipher suite (see "On the Practical
- * (In-)Security of 64-bit Block Ciphers" by Karthikeyan Bhargavan and Gaëtan
- * Leurent, see https://sweet32.info/SWEET32_CCS16.pdf). If this attack falls
- * in your threat model or you are unsure, then you should keep this option
- * enabled to remove 3DES based cipher suites.
- *
- * Comment this macro to keep 3DES in the default ciphersuite list.
- */
-#define MBEDTLS_REMOVE_3DES_CIPHERSUITES
-
-/**
- * \def MBEDTLS_ECP_DP_SECP192R1_ENABLED
- *
- * MBEDTLS_ECP_XXXX_ENABLED: Enables specific curves within the Elliptic Curve
- * module. By default all supported curves are enabled.
- *
- * Comment macros to disable the curve and functions for it
- */
-// #define MBEDTLS_ECP_DP_SECP192R1_ENABLED
-#define MBEDTLS_ECP_DP_SECP224R1_ENABLED
-#define MBEDTLS_ECP_DP_SECP256R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP384R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP521R1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP192K1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP224K1_ENABLED
-// #define MBEDTLS_ECP_DP_SECP256K1_ENABLED
-// #define MBEDTLS_ECP_DP_BP256R1_ENABLED
-// #define MBEDTLS_ECP_DP_BP384R1_ENABLED
-// #define MBEDTLS_ECP_DP_BP512R1_ENABLED
-// #define MBEDTLS_ECP_DP_CURVE25519_ENABLED
-// #define MBEDTLS_ECP_DP_CURVE448_ENABLED
-
-/**
- * \def MBEDTLS_ECP_NIST_OPTIM
- *
- * Enable specific 'modulo p' routines for each NIST prime.
- * Depending on the prime and architecture, makes operations 4 to 8 times
- * faster on the corresponding curve.
- *
- * Comment this macro to disable NIST curves optimisation.
- */
-#define MBEDTLS_ECP_NIST_OPTIM
-
-/**
- * \def MBEDTLS_ECP_RESTARTABLE
- *
- * Enable "non-blocking" ECC operations that can return early and be resumed.
- *
- * This allows various functions to pause by returning
- * #MBEDTLS_ERR_ECP_IN_PROGRESS (or, for functions in the SSL module,
- * #MBEDTLS_ERR_SSL_CRYPTO_IN_PROGRESS) and then be called later again in
- * order to further progress and eventually complete their operation. This is
- * controlled through mbedtls_ecp_set_max_ops() which limits the maximum
- * number of ECC operations a function may perform before pausing; see
- * mbedtls_ecp_set_max_ops() for more information.
- *
- * This is useful in non-threaded environments if you want to avoid blocking
- * for too long on ECC (and, hence, X.509 or SSL/TLS) operations.
- *
- * Uncomment this macro to enable restartable ECC computations.
- *
- * \note This option only works with the default software implementation of
- * elliptic curve functionality. It is incompatible with
- * MBEDTLS_ECP_ALT, MBEDTLS_ECDH_XXX_ALT, MBEDTLS_ECDSA_XXX_ALT
- * and MBEDTLS_ECDH_LEGACY_CONTEXT.
- */
-//#define MBEDTLS_ECP_RESTARTABLE
-
-/**
- * \def MBEDTLS_ECDH_LEGACY_CONTEXT
- *
- * Use a backward compatible ECDH context.
- *
- * Mbed TLS supports two formats for ECDH contexts (#mbedtls_ecdh_context
- * defined in `ecdh.h`). For most applications, the choice of format makes
- * no difference, since all library functions can work with either format,
- * except that the new format is incompatible with MBEDTLS_ECP_RESTARTABLE.
-
- * The new format used when this option is disabled is smaller
- * (56 bytes on a 32-bit platform). In future versions of the library, it
- * will support alternative implementations of ECDH operations.
- * The new format is incompatible with applications that access
- * context fields directly and with restartable ECP operations.
- *
- * Define this macro if you enable MBEDTLS_ECP_RESTARTABLE or if you
- * want to access ECDH context fields directly. Otherwise you should
- * comment out this macro definition.
- *
- * This option has no effect if #MBEDTLS_ECDH_C is not enabled.
- *
- * \note This configuration option is experimental. Future versions of the
- * library may modify the way the ECDH context layout is configured
- * and may modify the layout of the new context type.
- */
-#define MBEDTLS_ECDH_LEGACY_CONTEXT
-
-/**
- * \def MBEDTLS_ECDSA_DETERMINISTIC
- *
- * Enable deterministic ECDSA (RFC 6979).
- * Standard ECDSA is "fragile" in the sense that lack of entropy when signing
- * may result in a compromise of the long-term signing key. This is avoided by
- * the deterministic variant.
- *
- * Requires: MBEDTLS_HMAC_DRBG_C
- *
- * Comment this macro to disable deterministic ECDSA.
- */
-#define MBEDTLS_ECDSA_DETERMINISTIC
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
- *
- * Enable the PSK based ciphersuite modes in SSL / TLS.
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
- */
-#define MBEDTLS_KEY_EXCHANGE_PSK_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
- *
- * Enable the DHE-PSK based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_DHM_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
- *
- * \warning Using DHE constitutes a security risk as it
- * is not possible to validate custom DH parameters.
- * If possible, it is recommended users should consider
- * preferring other methods of key exchange.
- * See dhm.h for more details.
- *
- */
-#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
- *
- * Enable the ECDHE-PSK based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_ECDH_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
- */
-#define MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
- *
- * Enable the RSA-PSK based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
- * MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
- */
-#define MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
- *
- * Enable the RSA-only based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
- * MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
- */
-#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
- *
- * Enable the DHE-RSA based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_DHM_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
- * MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
- *
- * \warning Using DHE constitutes a security risk as it
- * is not possible to validate custom DH parameters.
- * If possible, it is recommended users should consider
- * preferring other methods of key exchange.
- * See dhm.h for more details.
- *
- */
-#define MBEDTLS_KEY_EXCHANGE_DHE_RSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
- *
- * Enable the ECDHE-RSA based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_RSA_C, MBEDTLS_PKCS1_V15,
- * MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
- */
-#define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
- *
- * Enable the ECDHE-ECDSA based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_ECDSA_C, MBEDTLS_X509_CRT_PARSE_C,
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
- */
-#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
- *
- * Enable the ECDH-ECDSA based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
- */
-#define MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
- *
- * Enable the ECDH-RSA based ciphersuite modes in SSL / TLS.
- *
- * Requires: MBEDTLS_ECDH_C, MBEDTLS_X509_CRT_PARSE_C
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
- */
-#define MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED
-
-/**
- * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
- *
- * Enable the ECJPAKE based ciphersuite modes in SSL / TLS.
- *
- * \warning This is currently experimental. EC J-PAKE support is based on the
- * Thread v1.0.0 specification; incompatible changes to the specification
- * might still happen. For this reason, this is disabled by default.
- *
- * Requires: MBEDTLS_ECJPAKE_C
- * MBEDTLS_SHA256_C
- * MBEDTLS_ECP_DP_SECP256R1_ENABLED
- *
- * This enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECJPAKE_WITH_AES_128_CCM_8
- */
-//#define MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED
-
-/**
- * \def MBEDTLS_PK_PARSE_EC_EXTENDED
- *
- * Enhance support for reading EC keys using variants of SEC1 not allowed by
- * RFC 5915 and RFC 5480.
- *
- * Currently this means parsing the SpecifiedECDomain choice of EC
- * parameters (only known groups are supported, not arbitrary domains, to
- * avoid validation issues).
- *
- * Disable if you only need to support RFC 5915 + 5480 key formats.
- */
-#define MBEDTLS_PK_PARSE_EC_EXTENDED
-
-/**
- * \def MBEDTLS_ERROR_STRERROR_DUMMY
- *
- * Enable a dummy error function to make use of mbedtls_strerror() in
- * third party libraries easier when MBEDTLS_ERROR_C is disabled
- * (no effect when MBEDTLS_ERROR_C is enabled).
- *
- * You can safely disable this if MBEDTLS_ERROR_C is enabled, or if you're
- * not using mbedtls_strerror() or error_strerror() in your application.
- *
- * Disable if you run into name conflicts and want to really remove the
- * mbedtls_strerror()
- */
-// #define MBEDTLS_ERROR_STRERROR_DUMMY
-
-/**
- * \def MBEDTLS_GENPRIME
- *
- * Enable the prime-number generation code.
- *
- * Requires: MBEDTLS_BIGNUM_C
- */
-#define MBEDTLS_GENPRIME
-
-/**
- * \def MBEDTLS_FS_IO
- *
- * Enable functions that use the filesystem.
- */
-// #define MBEDTLS_FS_IO
-
-/**
- * \def MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
- *
- * Do not add default entropy sources. These are the platform specific,
- * mbedtls_timing_hardclock and HAVEGE based poll functions.
- *
- * This is useful to have more control over the added entropy sources in an
- * application.
- *
- * Uncomment this macro to prevent loading of default entropy functions.
- */
-//#define MBEDTLS_NO_DEFAULT_ENTROPY_SOURCES
-
-/**
- * \def MBEDTLS_NO_PLATFORM_ENTROPY
- *
- * Do not use built-in platform entropy functions.
- * This is useful if your platform does not support
- * standards like the /dev/urandom or Windows CryptoAPI.
- *
- * Uncomment this macro to disable the built-in platform entropy functions.
- */
-#define MBEDTLS_NO_PLATFORM_ENTROPY
-
-/**
- * \def MBEDTLS_ENTROPY_FORCE_SHA256
- *
- * Force the entropy accumulator to use a SHA-256 accumulator instead of the
- * default SHA-512 based one (if both are available).
- *
- * Requires: MBEDTLS_SHA256_C
- *
- * On 32-bit systems SHA-256 can be much faster than SHA-512. Use this option
- * if you have performance concerns.
- *
- * This option is only useful if both MBEDTLS_SHA256_C and
- * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used.
- */
-//#define MBEDTLS_ENTROPY_FORCE_SHA256
-
-/**
- * \def MBEDTLS_ENTROPY_NV_SEED
- *
- * Enable the non-volatile (NV) seed file-based entropy source.
- * (Also enables the NV seed read/write functions in the platform layer)
- *
- * This is crucial (if not required) on systems that do not have a
- * cryptographic entropy source (in hardware or kernel) available.
- *
- * Requires: MBEDTLS_ENTROPY_C, MBEDTLS_PLATFORM_C
- *
- * \note The read/write functions that are used by the entropy source are
- * determined in the platform layer, and can be modified at runtime and/or
- * compile-time depending on the flags (MBEDTLS_PLATFORM_NV_SEED_*) used.
- *
- * \note If you use the default implementation functions that read a seedfile
- * with regular fopen(), please make sure you make a seedfile with the
- * proper name (defined in MBEDTLS_PLATFORM_STD_NV_SEED_FILE) and at
- * least MBEDTLS_ENTROPY_BLOCK_SIZE bytes in size that can be read from
- * and written to or you will get an entropy source error! The default
- * implementation will only use the first MBEDTLS_ENTROPY_BLOCK_SIZE
- * bytes from the file.
- *
- * \note The entropy collector will write to the seed file before entropy is
- * given to an external source, to update it.
- */
-//#define MBEDTLS_ENTROPY_NV_SEED
-
-/**
- * \def MBEDTLS_MEMORY_DEBUG
- *
- * Enable debugging of buffer allocator memory issues. Automatically prints
- * (to stderr) all (fatal) messages on memory allocation issues. Enables
- * function for 'debug output' of allocated memory.
- *
- * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
- *
- * Uncomment this macro to let the buffer allocator print out error messages.
- */
-//#define MBEDTLS_MEMORY_DEBUG
-
-/**
- * \def MBEDTLS_MEMORY_BACKTRACE
- *
- * Include backtrace information with each allocated block.
- *
- * Requires: MBEDTLS_MEMORY_BUFFER_ALLOC_C
- * GLIBC-compatible backtrace() an backtrace_symbols() support
- *
- * Uncomment this macro to include backtrace information
- */
-//#define MBEDTLS_MEMORY_BACKTRACE
-
-/**
- * \def MBEDTLS_PK_RSA_ALT_SUPPORT
- *
- * Support external private RSA keys (eg from a HSM) in the PK layer.
- *
- * Comment this macro to disable support for external private RSA keys.
- */
-// #define MBEDTLS_PK_RSA_ALT_SUPPORT
-
-/**
- * \def MBEDTLS_PKCS1_V15
- *
- * Enable support for PKCS#1 v1.5 encoding.
- *
- * Requires: MBEDTLS_RSA_C
- *
- * This enables support for PKCS#1 v1.5 operations.
- */
-#define MBEDTLS_PKCS1_V15
-
-/**
- * \def MBEDTLS_PKCS1_V21
- *
- * Enable support for PKCS#1 v2.1 encoding.
- *
- * Requires: MBEDTLS_MD_C, MBEDTLS_RSA_C
- *
- * This enables support for RSAES-OAEP and RSASSA-PSS operations.
- */
-#define MBEDTLS_PKCS1_V21
-
-/**
- * \def MBEDTLS_PSA_CRYPTO_SPM
- *
- * When MBEDTLS_PSA_CRYPTO_SPM is defined, the code is built for SPM (Secure
- * Partition Manager) integration which separates the code into two parts: a
- * NSPE (Non-Secure Process Environment) and an SPE (Secure Process
- * Environment).
- *
- * Module: library/psa_crypto.c
- * Requires: MBEDTLS_PSA_CRYPTO_C
- *
- */
-//#define MBEDTLS_PSA_CRYPTO_SPM
-
-/**
- * \def MBEDTLS_PSA_INJECT_ENTROPY
- *
- * Enable support for entropy injection at first boot. This feature is
- * required on systems that do not have a built-in entropy source (TRNG).
- * This feature is currently not supported on systems that have a built-in
- * entropy source.
- *
- * Requires: MBEDTLS_PSA_CRYPTO_STORAGE_C, MBEDTLS_ENTROPY_NV_SEED
- *
- */
-//#define MBEDTLS_PSA_INJECT_ENTROPY
-
-/**
- * \def MBEDTLS_RSA_NO_CRT
- *
- * Do not use the Chinese Remainder Theorem
- * for the RSA private operation.
- *
- * Uncomment this macro to disable the use of CRT in RSA.
- *
- */
-//#define MBEDTLS_RSA_NO_CRT
-
-/**
- * \def MBEDTLS_SELF_TEST
- *
- * Enable the checkup functions (*_self_test).
- */
-#define MBEDTLS_SELF_TEST
-
-/**
- * \def MBEDTLS_SHA256_SMALLER
- *
- * Enable an implementation of SHA-256 that has lower ROM footprint but also
- * lower performance.
- *
- * The default implementation is meant to be a reasonnable compromise between
- * performance and size. This version optimizes more aggressively for size at
- * the expense of performance. Eg on Cortex-M4 it reduces the size of
- * mbedtls_sha256_process() from ~2KB to ~0.5KB for a performance hit of about
- * 30%.
- *
- * Uncomment to enable the smaller implementation of SHA256.
- */
-//#define MBEDTLS_SHA256_SMALLER
-
-/**
- * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES
- *
- * Enable sending of alert messages in case of encountered errors as per RFC.
- * If you choose not to send the alert messages, mbed TLS can still communicate
- * with other servers, only debugging of failures is harder.
- *
- * The advantage of not sending alert messages, is that no information is given
- * about reasons for failures thus preventing adversaries of gaining intel.
- *
- * Enable sending of all alert messages
- */
-#define MBEDTLS_SSL_ALL_ALERT_MESSAGES
-
-/**
- * \def MBEDTLS_SSL_RECORD_CHECKING
- *
- * Enable the function mbedtls_ssl_check_record() which can be used to check
- * the validity and authenticity of an incoming record, to verify that it has
- * not been seen before. These checks are performed without modifying the
- * externally visible state of the SSL context.
- *
- * See mbedtls_ssl_check_record() for more information.
- *
- * Uncomment to enable support for record checking.
- */
-#define MBEDTLS_SSL_RECORD_CHECKING
-
-/**
- * \def MBEDTLS_SSL_DTLS_CONNECTION_ID
- *
- * Enable support for the DTLS Connection ID extension
- * (version draft-ietf-tls-dtls-connection-id-05,
- * https://tools.ietf.org/html/draft-ietf-tls-dtls-connection-id-05)
- * which allows to identify DTLS connections across changes
- * in the underlying transport.
- *
- * Setting this option enables the SSL APIs `mbedtls_ssl_set_cid()`,
- * `mbedtls_ssl_get_peer_cid()` and `mbedtls_ssl_conf_cid()`.
- * See the corresponding documentation for more information.
- *
- * \warning The Connection ID extension is still in draft state.
- * We make no stability promises for the availability
- * or the shape of the API controlled by this option.
- *
- * The maximum lengths of outgoing and incoming CIDs can be configured
- * through the options
- * - MBEDTLS_SSL_CID_OUT_LEN_MAX
- * - MBEDTLS_SSL_CID_IN_LEN_MAX.
- *
- * Requires: MBEDTLS_SSL_PROTO_DTLS
- *
- * Uncomment to enable the Connection ID extension.
- */
-//#define MBEDTLS_SSL_DTLS_CONNECTION_ID
-
-/**
- * \def MBEDTLS_SSL_ASYNC_PRIVATE
- *
- * Enable asynchronous external private key operations in SSL. This allows
- * you to configure an SSL connection to call an external cryptographic
- * module to perform private key operations instead of performing the
- * operation inside the library.
- *
- */
-//#define MBEDTLS_SSL_ASYNC_PRIVATE
-
-/**
- * \def MBEDTLS_SSL_CONTEXT_SERIALIZATION
- *
- * Enable serialization of the TLS context structures, through use of the
- * functions mbedtls_ssl_context_save() and mbedtls_ssl_context_load().
- *
- * This pair of functions allows one side of a connection to serialize the
- * context associated with the connection, then free or re-use that context
- * while the serialized state is persisted elsewhere, and finally deserialize
- * that state to a live context for resuming read/write operations on the
- * connection. From a protocol perspective, the state of the connection is
- * unaffected, in particular this is entirely transparent to the peer.
- *
- * Note: this is distinct from TLS session resumption, which is part of the
- * protocol and fully visible by the peer. TLS session resumption enables
- * establishing new connections associated to a saved session with shorter,
- * lighter handshakes, while context serialization is a local optimization in
- * handling a single, potentially long-lived connection.
- *
- * Enabling these APIs makes some SSL structures larger, as 64 extra bytes are
- * saved after the handshake to allow for more efficient serialization, so if
- * you don't need this feature you'll save RAM by disabling it.
- *
- * Comment to disable the context serialization APIs.
- */
-#define MBEDTLS_SSL_CONTEXT_SERIALIZATION
-
-/**
- * \def MBEDTLS_SSL_DEBUG_ALL
- *
- * Enable the debug messages in SSL module for all issues.
- * Debug messages have been disabled in some places to prevent timing
- * attacks due to (unbalanced) debugging function calls.
- *
- * If you need all error reporting you should enable this during debugging,
- * but remove this for production servers that should log as well.
- *
- * Uncomment this macro to report all debug messages on errors introducing
- * a timing side-channel.
- *
- */
-//#define MBEDTLS_SSL_DEBUG_ALL
-
-/** \def MBEDTLS_SSL_ENCRYPT_THEN_MAC
- *
- * Enable support for Encrypt-then-MAC, RFC 7366.
- *
- * This allows peers that both support it to use a more robust protection for
- * ciphersuites using CBC, providing deep resistance against timing attacks
- * on the padding or underlying cipher.
- *
- * This only affects CBC ciphersuites, and is useless if none is defined.
- *
- * Requires: MBEDTLS_SSL_PROTO_TLS1 or
- * MBEDTLS_SSL_PROTO_TLS1_1 or
- * MBEDTLS_SSL_PROTO_TLS1_2
- *
- * Comment this macro to disable support for Encrypt-then-MAC
- */
-#define MBEDTLS_SSL_ENCRYPT_THEN_MAC
-
-/** \def MBEDTLS_SSL_EXTENDED_MASTER_SECRET
- *
- * Enable support for Extended Master Secret, aka Session Hash
- * (draft-ietf-tls-session-hash-02).
- *
- * This was introduced as "the proper fix" to the Triple Handshake familiy of
- * attacks, but it is recommended to always use it (even if you disable
- * renegotiation), since it actually fixes a more fundamental issue in the
- * original SSL/TLS design, and has implications beyond Triple Handshake.
- *
- * Requires: MBEDTLS_SSL_PROTO_TLS1 or
- * MBEDTLS_SSL_PROTO_TLS1_1 or
- * MBEDTLS_SSL_PROTO_TLS1_2
- *
- * Comment this macro to disable support for Extended Master Secret.
- */
-#define MBEDTLS_SSL_EXTENDED_MASTER_SECRET
-
-/**
- * \def MBEDTLS_SSL_FALLBACK_SCSV
- *
- * Enable support for FALLBACK_SCSV (draft-ietf-tls-downgrade-scsv-00).
- *
- * For servers, it is recommended to always enable this, unless you support
- * only one version of TLS, or know for sure that none of your clients
- * implements a fallback strategy.
- *
- * For clients, you only need this if you're using a fallback strategy, which
- * is not recommended in the first place, unless you absolutely need it to
- * interoperate with buggy (version-intolerant) servers.
- *
- * Comment this macro to disable support for FALLBACK_SCSV
- */
-#define MBEDTLS_SSL_FALLBACK_SCSV
-
-/**
- * \def MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
- *
- * This option controls the availability of the API mbedtls_ssl_get_peer_cert()
- * giving access to the peer's certificate after completion of the handshake.
- *
- * Unless you need mbedtls_ssl_peer_cert() in your application, it is
- * recommended to disable this option for reduced RAM usage.
- *
- * \note If this option is disabled, mbedtls_ssl_get_peer_cert() is still
- * defined, but always returns \c NULL.
- *
- * \note This option has no influence on the protection against the
- * triple handshake attack. Even if it is disabled, Mbed TLS will
- * still ensure that certificates do not change during renegotiation,
- * for exaple by keeping a hash of the peer's certificate.
- *
- * Comment this macro to disable storing the peer's certificate
- * after the handshake.
- */
-#define MBEDTLS_SSL_KEEP_PEER_CERTIFICATE
-
-/**
- * \def MBEDTLS_SSL_HW_RECORD_ACCEL
- *
- * Enable hooking functions in SSL module for hardware acceleration of
- * individual records.
- *
- * Uncomment this macro to enable hooking functions.
- */
-//#define MBEDTLS_SSL_HW_RECORD_ACCEL
-
-/**
- * \def MBEDTLS_SSL_CBC_RECORD_SPLITTING
- *
- * Enable 1/n-1 record splitting for CBC mode in SSLv3 and TLS 1.0.
- *
- * This is a countermeasure to the BEAST attack, which also minimizes the risk
- * of interoperability issues compared to sending 0-length records.
- *
- * Comment this macro to disable 1/n-1 record splitting.
- */
-#define MBEDTLS_SSL_CBC_RECORD_SPLITTING
-
-/**
- * \def MBEDTLS_SSL_RENEGOTIATION
- *
- * Enable support for TLS renegotiation.
- *
- * The two main uses of renegotiation are (1) refresh keys on long-lived
- * connections and (2) client authentication after the initial handshake.
- * If you don't need renegotiation, it's probably better to disable it, since
- * it has been associated with security issues in the past and is easy to
- * misuse/misunderstand.
- *
- * Comment this to disable support for renegotiation.
- *
- * \note Even if this option is disabled, both client and server are aware
- * of the Renegotiation Indication Extension (RFC 5746) used to
- * prevent the SSL renegotiation attack (see RFC 5746 Sect. 1).
- * (See \c mbedtls_ssl_conf_legacy_renegotiation for the
- * configuration of this extension).
- *
- */
-#define MBEDTLS_SSL_RENEGOTIATION
-
-/**
- * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
- *
- * Enable support for receiving and parsing SSLv2 Client Hello messages for the
- * SSL Server module (MBEDTLS_SSL_SRV_C).
- *
- * Uncomment this macro to enable support for SSLv2 Client Hello messages.
- */
-//#define MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO
-
-/**
- * \def MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
- *
- * Pick the ciphersuite according to the client's preferences rather than ours
- * in the SSL Server module (MBEDTLS_SSL_SRV_C).
- *
- * Uncomment this macro to respect client's ciphersuite order
- */
-//#define MBEDTLS_SSL_SRV_RESPECT_CLIENT_PREFERENCE
-
-/**
- * \def MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
- *
- * Enable support for RFC 6066 max_fragment_length extension in SSL.
- *
- * Comment this macro to disable support for the max_fragment_length extension
- */
-#define MBEDTLS_SSL_MAX_FRAGMENT_LENGTH
-
-/**
- * \def MBEDTLS_SSL_PROTO_SSL3
- *
- * Enable support for SSL 3.0.
- *
- * Requires: MBEDTLS_MD5_C
- * MBEDTLS_SHA1_C
- *
- * Comment this macro to disable support for SSL 3.0
- */
-//#define MBEDTLS_SSL_PROTO_SSL3
-
-/**
- * \def MBEDTLS_SSL_PROTO_TLS1
- *
- * Enable support for TLS 1.0.
- *
- * Requires: MBEDTLS_MD5_C
- * MBEDTLS_SHA1_C
- *
- * Comment this macro to disable support for TLS 1.0
- */
-#define MBEDTLS_SSL_PROTO_TLS1
-
-/**
- * \def MBEDTLS_SSL_PROTO_TLS1_1
- *
- * Enable support for TLS 1.1 (and DTLS 1.0 if DTLS is enabled).
- *
- * Requires: MBEDTLS_MD5_C
- * MBEDTLS_SHA1_C
- *
- * Comment this macro to disable support for TLS 1.1 / DTLS 1.0
- */
-#define MBEDTLS_SSL_PROTO_TLS1_1
-
-/**
- * \def MBEDTLS_SSL_PROTO_TLS1_2
- *
- * Enable support for TLS 1.2 (and DTLS 1.2 if DTLS is enabled).
- *
- * Requires: MBEDTLS_SHA1_C or MBEDTLS_SHA256_C or MBEDTLS_SHA512_C
- * (Depends on ciphersuites)
- *
- * Comment this macro to disable support for TLS 1.2 / DTLS 1.2
- */
-#define MBEDTLS_SSL_PROTO_TLS1_2
-
-/**
- * \def MBEDTLS_SSL_PROTO_DTLS
- *
- * Enable support for DTLS (all available versions).
- *
- * Enable this and MBEDTLS_SSL_PROTO_TLS1_1 to enable DTLS 1.0,
- * and/or this and MBEDTLS_SSL_PROTO_TLS1_2 to enable DTLS 1.2.
- *
- * Requires: MBEDTLS_SSL_PROTO_TLS1_1
- * or MBEDTLS_SSL_PROTO_TLS1_2
- *
- * Comment this macro to disable support for DTLS
- */
-#define MBEDTLS_SSL_PROTO_DTLS
-
-/**
- * \def MBEDTLS_SSL_ALPN
- *
- * Enable support for RFC 7301 Application Layer Protocol Negotiation.
- *
- * Comment this macro to disable support for ALPN.
- */
-#define MBEDTLS_SSL_ALPN
-
-/**
- * \def MBEDTLS_SSL_DTLS_ANTI_REPLAY
- *
- * Enable support for the anti-replay mechanism in DTLS.
- *
- * Requires: MBEDTLS_SSL_TLS_C
- * MBEDTLS_SSL_PROTO_DTLS
- *
- * \warning Disabling this is often a security risk!
- * See mbedtls_ssl_conf_dtls_anti_replay() for details.
- *
- * Comment this to disable anti-replay in DTLS.
- */
-#define MBEDTLS_SSL_DTLS_ANTI_REPLAY
-
-/**
- * \def MBEDTLS_SSL_DTLS_HELLO_VERIFY
- *
- * Enable support for HelloVerifyRequest on DTLS servers.
- *
- * This feature is highly recommended to prevent DTLS servers being used as
- * amplifiers in DoS attacks against other hosts. It should always be enabled
- * unless you know for sure amplification cannot be a problem in the
- * environment in which your server operates.
- *
- * \warning Disabling this can ba a security risk! (see above)
- *
- * Requires: MBEDTLS_SSL_PROTO_DTLS
- *
- * Comment this to disable support for HelloVerifyRequest.
- */
-#define MBEDTLS_SSL_DTLS_HELLO_VERIFY
-
-/**
- * \def MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
- *
- * Enable server-side support for clients that reconnect from the same port.
- *
- * Some clients unexpectedly close the connection and try to reconnect using the
- * same source port. This needs special support from the server to handle the
- * new connection securely, as described in section 4.2.8 of RFC 6347. This
- * flag enables that support.
- *
- * Requires: MBEDTLS_SSL_DTLS_HELLO_VERIFY
- *
- * Comment this to disable support for clients reusing the source port.
- */
-#define MBEDTLS_SSL_DTLS_CLIENT_PORT_REUSE
-
-/**
- * \def MBEDTLS_SSL_DTLS_BADMAC_LIMIT
- *
- * Enable support for a limit of records with bad MAC.
- *
- * See mbedtls_ssl_conf_dtls_badmac_limit().
- *
- * Requires: MBEDTLS_SSL_PROTO_DTLS
- */
-#define MBEDTLS_SSL_DTLS_BADMAC_LIMIT
-
-/**
- * \def MBEDTLS_SSL_SESSION_TICKETS
- *
- * Enable support for RFC 5077 session tickets in SSL.
- * Client-side, provides full support for session tickets (maintenance of a
- * session store remains the responsibility of the application, though).
- * Server-side, you also need to provide callbacks for writing and parsing
- * tickets, including authenticated encryption and key management. Example
- * callbacks are provided by MBEDTLS_SSL_TICKET_C.
- *
- * Comment this macro to disable support for SSL session tickets
- */
-#define MBEDTLS_SSL_SESSION_TICKETS
-
-/**
- * \def MBEDTLS_SSL_EXPORT_KEYS
- *
- * Enable support for exporting key block and master secret.
- * This is required for certain users of TLS, e.g. EAP-TLS.
- *
- * Comment this macro to disable support for key export
- */
-#define MBEDTLS_SSL_EXPORT_KEYS
-
-/**
- * \def MBEDTLS_SSL_SERVER_NAME_INDICATION
- *
- * Enable support for RFC 6066 server name indication (SNI) in SSL.
- *
- * Requires: MBEDTLS_X509_CRT_PARSE_C
- *
- * Comment this macro to disable support for server name indication in SSL
- */
-#define MBEDTLS_SSL_SERVER_NAME_INDICATION
-
-/**
- * \def MBEDTLS_SSL_TRUNCATED_HMAC
- *
- * Enable support for RFC 6066 truncated HMAC in SSL.
- *
- * Comment this macro to disable support for truncated HMAC in SSL
- */
-#define MBEDTLS_SSL_TRUNCATED_HMAC
-
-/**
- * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
- *
- * Fallback to old (pre-2.7), non-conforming implementation of the truncated
- * HMAC extension which also truncates the HMAC key. Note that this option is
- * only meant for a transitory upgrade period and is likely to be removed in
- * a future version of the library.
- *
- * \warning The old implementation is non-compliant and has a security weakness
- * (2^80 brute force attack on the HMAC key used for a single,
- * uninterrupted connection). This should only be enabled temporarily
- * when (1) the use of truncated HMAC is essential in order to save
- * bandwidth, and (2) the peer is an Mbed TLS stack that doesn't use
- * the fixed implementation yet (pre-2.7).
- *
- * \deprecated This option is deprecated and will likely be removed in a
- * future version of Mbed TLS.
- *
- * Uncomment to fallback to old, non-compliant truncated HMAC implementation.
- *
- * Requires: MBEDTLS_SSL_TRUNCATED_HMAC
- */
-//#define MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT
-
-/**
- * \def MBEDTLS_THREADING_ALT
- *
- * Provide your own alternate threading implementation.
- *
- * Requires: MBEDTLS_THREADING_C
- *
- * Uncomment this to allow your own alternate threading implementation.
- */
-//#define MBEDTLS_THREADING_ALT
-
-/**
- * \def MBEDTLS_THREADING_PTHREAD
- *
- * Enable the pthread wrapper layer for the threading layer.
- *
- * Requires: MBEDTLS_THREADING_C
- *
- * Uncomment this to enable pthread mutexes.
- */
-//#define MBEDTLS_THREADING_PTHREAD
-
-/**
- * \def MBEDTLS_USE_PSA_CRYPTO
- *
- * Make the X.509 and TLS library use PSA for cryptographic operations, and
- * enable new APIs for using keys handled by PSA Crypto.
- *
- * \note Development of this option is currently in progress, and parts
- * of the X.509 and TLS modules are not ported to PSA yet. However, these parts
- * will still continue to work as usual, so enabling this option should not
- * break backwards compatibility.
- *
- * \warning The PSA Crypto API is in beta stage. While you're welcome to
- * experiment using it, incompatible API changes are still possible, and some
- * parts may not have reached the same quality as the rest of Mbed TLS yet.
- *
- * \warning This option enables new Mbed TLS APIs that are dependent on the
- * PSA Crypto API, so can't come with the same stability guarantees as the
- * rest of the Mbed TLS APIs. You're welcome to experiment with them, but for
- * now, access to these APIs is opt-in (via enabling the present option), in
- * order to clearly differentiate them from the stable Mbed TLS APIs.
- *
- * Requires: MBEDTLS_PSA_CRYPTO_C.
- *
- * Uncomment this to enable internal use of PSA Crypto and new associated APIs.
- */
-//#define MBEDTLS_USE_PSA_CRYPTO
-
-/**
- * \def MBEDTLS_VERSION_FEATURES
- *
- * Allow run-time checking of compile-time enabled features. Thus allowing users
- * to check at run-time if the library is for instance compiled with threading
- * support via mbedtls_version_check_feature().
- *
- * Requires: MBEDTLS_VERSION_C
- *
- * Comment this to disable run-time checking and save ROM space
- */
-// #define MBEDTLS_VERSION_FEATURES
-
-/**
- * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
- *
- * If set, the X509 parser will not break-off when parsing an X509 certificate
- * and encountering an extension in a v1 or v2 certificate.
- *
- * Uncomment to prevent an error.
- */
-//#define MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3
-
-/**
- * \def MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
- *
- * If set, the X509 parser will not break-off when parsing an X509 certificate
- * and encountering an unknown critical extension.
- *
- * \warning Depending on your PKI use, enabling this can be a security risk!
- *
- * Uncomment to prevent an error.
- */
-//#define MBEDTLS_X509_ALLOW_UNSUPPORTED_CRITICAL_EXTENSION
-
-/**
- * \def MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
- *
- * If set, this enables the X.509 API `mbedtls_x509_crt_verify_with_ca_cb()`
- * and the SSL API `mbedtls_ssl_conf_ca_cb()` which allow users to configure
- * the set of trusted certificates through a callback instead of a linked
- * list.
- *
- * This is useful for example in environments where a large number of trusted
- * certificates is present and storing them in a linked list isn't efficient
- * enough, or when the set of trusted certificates changes frequently.
- *
- * See the documentation of `mbedtls_x509_crt_verify_with_ca_cb()` and
- * `mbedtls_ssl_conf_ca_cb()` for more information.
- *
- * Uncomment to enable trusted certificate callbacks.
- */
-//#define MBEDTLS_X509_TRUSTED_CERTIFICATE_CALLBACK
-
-/**
- * \def MBEDTLS_X509_CHECK_KEY_USAGE
- *
- * Enable verification of the keyUsage extension (CA and leaf certificates).
- *
- * Disabling this avoids problems with mis-issued and/or misused
- * (intermediate) CA and leaf certificates.
- *
- * \warning Depending on your PKI use, disabling this can be a security risk!
- *
- * Comment to skip keyUsage checking for both CA and leaf certificates.
- */
-#define MBEDTLS_X509_CHECK_KEY_USAGE
-
-/**
- * \def MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
- *
- * Enable verification of the extendedKeyUsage extension (leaf certificates).
- *
- * Disabling this avoids problems with mis-issued and/or misused certificates.
- *
- * \warning Depending on your PKI use, disabling this can be a security risk!
- *
- * Comment to skip extendedKeyUsage checking for certificates.
- */
-#define MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE
-
-/**
- * \def MBEDTLS_X509_RSASSA_PSS_SUPPORT
- *
- * Enable parsing and verification of X.509 certificates, CRLs and CSRS
- * signed with RSASSA-PSS (aka PKCS#1 v2.1).
- *
- * Comment this macro to disallow using RSASSA-PSS in certificates.
- */
-#define MBEDTLS_X509_RSASSA_PSS_SUPPORT
-
-/**
- * \def MBEDTLS_ZLIB_SUPPORT
- *
- * If set, the SSL/TLS module uses ZLIB to support compression and
- * decompression of packet data.
- *
- * \warning TLS-level compression MAY REDUCE SECURITY! See for example the
- * CRIME attack. Before enabling this option, you should examine with care if
- * CRIME or similar exploits may be applicable to your use case.
- *
- * \note Currently compression can't be used with DTLS.
- *
- * \deprecated This feature is deprecated and will be removed
- * in the next major revision of the library.
- *
- * Used in: library/ssl_tls.c
- * library/ssl_cli.c
- * library/ssl_srv.c
- *
- * This feature requires zlib library and headers to be present.
- *
- * Uncomment to enable use of ZLIB
- */
-//#define MBEDTLS_ZLIB_SUPPORT
-/* \} name SECTION: mbed TLS feature support */
-
-/**
- * \name SECTION: mbed TLS modules
- *
- * This section enables or disables entire modules in mbed TLS
- * \{
- */
-
-/**
- * \def MBEDTLS_AESNI_C
- *
- * Enable AES-NI support on x86-64.
- *
- * Module: library/aesni.c
- * Caller: library/aes.c
- *
- * Requires: MBEDTLS_HAVE_ASM
- *
- * This modules adds support for the AES-NI instructions on x86-64
- */
-#define MBEDTLS_AESNI_C
-
-/**
- * \def MBEDTLS_AES_C
- *
- * Enable the AES block cipher.
- *
- * Module: library/aes.c
- * Caller: library/cipher.c
- * library/pem.c
- * library/ctr_drbg.c
- *
- * This module enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_AES_128_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_AES_256_GCM_SHA384
- * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA384
- * MBEDTLS_TLS_PSK_WITH_AES_256_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_AES_128_GCM_SHA256
- * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA256
- * MBEDTLS_TLS_PSK_WITH_AES_128_CBC_SHA
- *
- * PEM_PARSE uses AES for decrypting encrypted keys.
- */
-#define MBEDTLS_AES_C
-
-/**
- * \def MBEDTLS_ARC4_C
- *
- * Enable the ARCFOUR stream cipher.
- *
- * Module: library/arc4.c
- * Caller: library/cipher.c
- *
- * This module enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA
- * MBEDTLS_TLS_RSA_WITH_RC4_128_SHA
- * MBEDTLS_TLS_RSA_WITH_RC4_128_MD5
- * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA
- * MBEDTLS_TLS_PSK_WITH_RC4_128_SHA
- *
- * \warning ARC4 is considered a weak cipher and its use constitutes a
- * security risk. If possible, we recommend avoidng dependencies on
- * it, and considering stronger ciphers instead.
- *
- */
-#define MBEDTLS_ARC4_C
-
-/**
- * \def MBEDTLS_ASN1_PARSE_C
- *
- * Enable the generic ASN1 parser.
- *
- * Module: library/asn1.c
- * Caller: library/x509.c
- * library/dhm.c
- * library/pkcs12.c
- * library/pkcs5.c
- * library/pkparse.c
- */
-#define MBEDTLS_ASN1_PARSE_C
-
-/**
- * \def MBEDTLS_ASN1_WRITE_C
- *
- * Enable the generic ASN1 writer.
- *
- * Module: library/asn1write.c
- * Caller: library/ecdsa.c
- * library/pkwrite.c
- * library/x509_create.c
- * library/x509write_crt.c
- * library/x509write_csr.c
- */
-#define MBEDTLS_ASN1_WRITE_C
-
-/**
- * \def MBEDTLS_BASE64_C
- *
- * Enable the Base64 module.
- *
- * Module: library/base64.c
- * Caller: library/pem.c
- *
- * This module is required for PEM support (required by X.509).
- */
-#define MBEDTLS_BASE64_C
-
-/**
- * \def MBEDTLS_BIGNUM_C
- *
- * Enable the multi-precision integer library.
- *
- * Module: library/bignum.c
- * Caller: library/dhm.c
- * library/ecp.c
- * library/ecdsa.c
- * library/rsa.c
- * library/rsa_internal.c
- * library/ssl_tls.c
- *
- * This module is required for RSA, DHM and ECC (ECDH, ECDSA) support.
- */
-#define MBEDTLS_BIGNUM_C
-
-/**
- * \def MBEDTLS_BLOWFISH_C
- *
- * Enable the Blowfish block cipher.
- *
- * Module: library/blowfish.c
- */
-#define MBEDTLS_BLOWFISH_C
-
-/**
- * \def MBEDTLS_CAMELLIA_C
- *
- * Enable the Camellia block cipher.
- *
- * Module: library/camellia.c
- * Caller: library/cipher.c
- *
- * This module enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_256_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_CAMELLIA_128_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_256_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_CAMELLIA_128_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_CAMELLIA_128_CBC_SHA256
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_GCM_SHA384
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_256_CBC_SHA384
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256
- * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256
- */
-#define MBEDTLS_CAMELLIA_C
-
-/**
- * \def MBEDTLS_ARIA_C
- *
- * Enable the ARIA block cipher.
- *
- * Module: library/aria.c
- * Caller: library/cipher.c
- *
- * This module enables the following ciphersuites (if other requisites are
- * enabled as well):
- *
- * MBEDTLS_TLS_RSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_RSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDHE_RSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_ECDH_RSA_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_PSK_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_PSK_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_CBC_SHA384
- * MBEDTLS_TLS_PSK_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_PSK_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_DHE_PSK_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_128_GCM_SHA256
- * MBEDTLS_TLS_RSA_PSK_WITH_ARIA_256_GCM_SHA384
- * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_128_CBC_SHA256
- * MBEDTLS_TLS_ECDHE_PSK_WITH_ARIA_256_CBC_SHA384
- */
-//#define MBEDTLS_ARIA_C
-
-/**
- * \def MBEDTLS_CCM_C
- *
- * Enable the Counter with CBC-MAC (CCM) mode for 128-bit block cipher.
- *
- * Module: library/ccm.c
- *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
- *
- * This module enables the AES-CCM ciphersuites, if other requisites are
- * enabled as well.
- */
-#define MBEDTLS_CCM_C
-
-/**
- * \def MBEDTLS_CERTS_C
- *
- * Enable the test certificates.
- *
- * Module: library/certs.c
- * Caller:
- *
- * This module is used for testing (ssl_client/server).
- */
-#define MBEDTLS_CERTS_C
-
-/**
- * \def MBEDTLS_CHACHA20_C
- *
- * Enable the ChaCha20 stream cipher.
- *
- * Module: library/chacha20.c
- */
-#define MBEDTLS_CHACHA20_C
-
-/**
- * \def MBEDTLS_CHACHAPOLY_C
- *
- * Enable the ChaCha20-Poly1305 AEAD algorithm.
- *
- * Module: library/chachapoly.c
- *
- * This module requires: MBEDTLS_CHACHA20_C, MBEDTLS_POLY1305_C
- */
-#define MBEDTLS_CHACHAPOLY_C
-
-/**
- * \def MBEDTLS_CIPHER_C
- *
- * Enable the generic cipher layer.
- *
- * Module: library/cipher.c
- * Caller: library/ssl_tls.c
- *
- * Uncomment to enable generic cipher wrappers.
- */
-#define MBEDTLS_CIPHER_C
-
-/**
- * \def MBEDTLS_CMAC_C
- *
- * Enable the CMAC (Cipher-based Message Authentication Code) mode for block
- * ciphers.
- *
- * Module: library/cmac.c
- *
- * Requires: MBEDTLS_AES_C or MBEDTLS_DES_C
- *
- */
-//#define MBEDTLS_CMAC_C
-
-/**
- * \def MBEDTLS_CTR_DRBG_C
- *
- * Enable the CTR_DRBG AES-based random generator.
- * The CTR_DRBG generator uses AES-256 by default.
- * To use AES-128 instead, enable MBEDTLS_CTR_DRBG_USE_128_BIT_KEY below.
- *
- * Module: library/ctr_drbg.c
- * Caller:
- *
- * Requires: MBEDTLS_AES_C
- *
- * This module provides the CTR_DRBG AES random number generator.
- */
-#define MBEDTLS_CTR_DRBG_C
-
-/**
- * \def MBEDTLS_DEBUG_C
- *
- * Enable the debug functions.
- *
- * Module: library/debug.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- * library/ssl_tls.c
- *
- * This module provides debugging functions.
- */
-#define MBEDTLS_DEBUG_C
-
-/**
- * \def MBEDTLS_DES_C
- *
- * Enable the DES block cipher.
- *
- * Module: library/des.c
- * Caller: library/pem.c
- * library/cipher.c
- *
- * This module enables the following ciphersuites (if other requisites are
- * enabled as well):
- * MBEDTLS_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_RSA_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA
- * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA
- *
- * PEM_PARSE uses DES/3DES for decrypting encrypted keys.
- *
- * \warning DES is considered a weak cipher and its use constitutes a
- * security risk. We recommend considering stronger ciphers instead.
- */
-#define MBEDTLS_DES_C
-
-/**
- * \def MBEDTLS_DHM_C
- *
- * Enable the Diffie-Hellman-Merkle module.
- *
- * Module: library/dhm.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- *
- * This module is used by the following key exchanges:
- * DHE-RSA, DHE-PSK
- *
- * \warning Using DHE constitutes a security risk as it
- * is not possible to validate custom DH parameters.
- * If possible, it is recommended users should consider
- * preferring other methods of key exchange.
- * See dhm.h for more details.
- *
- */
-#define MBEDTLS_DHM_C
-
-/**
- * \def MBEDTLS_ECDH_C
- *
- * Enable the elliptic curve Diffie-Hellman library.
- *
- * Module: library/ecdh.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- *
- * This module is used by the following key exchanges:
- * ECDHE-ECDSA, ECDHE-RSA, DHE-PSK
- *
- * Requires: MBEDTLS_ECP_C
- */
-#define MBEDTLS_ECDH_C
-
-/**
- * \def MBEDTLS_ECDSA_C
- *
- * Enable the elliptic curve DSA library.
- *
- * Module: library/ecdsa.c
- * Caller:
- *
- * This module is used by the following key exchanges:
- * ECDHE-ECDSA
- *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_ASN1_WRITE_C, MBEDTLS_ASN1_PARSE_C
- */
-#define MBEDTLS_ECDSA_C
-
-/**
- * \def MBEDTLS_ECJPAKE_C
- *
- * Enable the elliptic curve J-PAKE library.
- *
- * \warning This is currently experimental. EC J-PAKE support is based on the
- * Thread v1.0.0 specification; incompatible changes to the specification
- * might still happen. For this reason, this is disabled by default.
- *
- * Module: library/ecjpake.c
- * Caller:
- *
- * This module is used by the following key exchanges:
- * ECJPAKE
- *
- * Requires: MBEDTLS_ECP_C, MBEDTLS_MD_C
- */
-//#define MBEDTLS_ECJPAKE_C
-
-/**
- * \def MBEDTLS_ECP_C
- *
- * Enable the elliptic curve over GF(p) library.
- *
- * Module: library/ecp.c
- * Caller: library/ecdh.c
- * library/ecdsa.c
- * library/ecjpake.c
- *
- * Requires: MBEDTLS_BIGNUM_C and at least one MBEDTLS_ECP_DP_XXX_ENABLED
- */
-#define MBEDTLS_ECP_C
-
-/**
- * \def MBEDTLS_ENTROPY_C
- *
- * Enable the platform-specific entropy code.
- *
- * Module: library/entropy.c
- * Caller:
- *
- * Requires: MBEDTLS_SHA512_C or MBEDTLS_SHA256_C
- *
- * This module provides a generic entropy pool
- */
-#define MBEDTLS_ENTROPY_C
-
-/**
- * \def MBEDTLS_ERROR_C
- *
- * Enable error code to error string conversion.
- *
- * Module: library/error.c
- * Caller:
- *
- * This module enables mbedtls_strerror().
- */
-// #define MBEDTLS_ERROR_C
-
-/**
- * \def MBEDTLS_GCM_C
- *
- * Enable the Galois/Counter Mode (GCM) for AES.
- *
- * Module: library/gcm.c
- *
- * Requires: MBEDTLS_AES_C or MBEDTLS_CAMELLIA_C
- *
- * This module enables the AES-GCM and CAMELLIA-GCM ciphersuites, if other
- * requisites are enabled as well.
- */
-#define MBEDTLS_GCM_C
-
-/**
- * \def MBEDTLS_HAVEGE_C
- *
- * Enable the HAVEGE random generator.
- *
- * Warning: the HAVEGE random generator is not suitable for virtualized
- * environments
- *
- * Warning: the HAVEGE random generator is dependent on timing and specific
- * processor traits. It is therefore not advised to use HAVEGE as
- * your applications primary random generator or primary entropy pool
- * input. As a secondary input to your entropy pool, it IS able add
- * the (limited) extra entropy it provides.
- *
- * Module: library/havege.c
- * Caller:
- *
- * Requires: MBEDTLS_TIMING_C
- *
- * Uncomment to enable the HAVEGE random generator.
- */
-//#define MBEDTLS_HAVEGE_C
-
-/**
- * \def MBEDTLS_HKDF_C
- *
- * Enable the HKDF algorithm (RFC 5869).
- *
- * Module: library/hkdf.c
- * Caller:
- *
- * Requires: MBEDTLS_MD_C
- *
- * This module adds support for the Hashed Message Authentication Code
- * (HMAC)-based key derivation function (HKDF).
- */
-#define MBEDTLS_HKDF_C
-
-/**
- * \def MBEDTLS_HMAC_DRBG_C
- *
- * Enable the HMAC_DRBG random generator.
- *
- * Module: library/hmac_drbg.c
- * Caller:
- *
- * Requires: MBEDTLS_MD_C
- *
- * Uncomment to enable the HMAC_DRBG random number geerator.
- */
-#define MBEDTLS_HMAC_DRBG_C
-
-/**
- * \def MBEDTLS_NIST_KW_C
- *
- * Enable the Key Wrapping mode for 128-bit block ciphers,
- * as defined in NIST SP 800-38F. Only KW and KWP modes
- * are supported. At the moment, only AES is approved by NIST.
- *
- * Module: library/nist_kw.c
- *
- * Requires: MBEDTLS_AES_C and MBEDTLS_CIPHER_C
- */
-//#define MBEDTLS_NIST_KW_C
-
-/**
- * \def MBEDTLS_MD_C
- *
- * Enable the generic message digest layer.
- *
- * Module: library/md.c
- * Caller:
- *
- * Uncomment to enable generic message digest wrappers.
- */
-#define MBEDTLS_MD_C
-
-/**
- * \def MBEDTLS_MD2_C
- *
- * Enable the MD2 hash algorithm.
- *
- * Module: library/md2.c
- * Caller:
- *
- * Uncomment to enable support for (rare) MD2-signed X.509 certs.
- *
- * \warning MD2 is considered a weak message digest and its use constitutes a
- * security risk. If possible, we recommend avoiding dependencies on
- * it, and considering stronger message digests instead.
- *
- */
-//#define MBEDTLS_MD2_C
-
-/**
- * \def MBEDTLS_MD4_C
- *
- * Enable the MD4 hash algorithm.
- *
- * Module: library/md4.c
- * Caller:
- *
- * Uncomment to enable support for (rare) MD4-signed X.509 certs.
- *
- * \warning MD4 is considered a weak message digest and its use constitutes a
- * security risk. If possible, we recommend avoiding dependencies on
- * it, and considering stronger message digests instead.
- *
- */
-//#define MBEDTLS_MD4_C
-
-/**
- * \def MBEDTLS_MD5_C
- *
- * Enable the MD5 hash algorithm.
- *
- * Module: library/md5.c
- * Caller: library/md.c
- * library/pem.c
- * library/ssl_tls.c
- *
- * This module is required for SSL/TLS up to version 1.1, and for TLS 1.2
- * depending on the handshake parameters. Further, it is used for checking
- * MD5-signed certificates, and for PBKDF1 when decrypting PEM-encoded
- * encrypted keys.
- *
- * \warning MD5 is considered a weak message digest and its use constitutes a
- * security risk. If possible, we recommend avoiding dependencies on
- * it, and considering stronger message digests instead.
- *
- */
-#define MBEDTLS_MD5_C
-
-/**
- * \def MBEDTLS_MEMORY_BUFFER_ALLOC_C
- *
- * Enable the buffer allocator implementation that makes use of a (stack)
- * based buffer to 'allocate' dynamic memory. (replaces calloc() and free()
- * calls)
- *
- * Module: library/memory_buffer_alloc.c
- *
- * Requires: MBEDTLS_PLATFORM_C
- * MBEDTLS_PLATFORM_MEMORY (to use it within mbed TLS)
- *
- * Enable this module to enable the buffer memory allocator.
- */
-//#define MBEDTLS_MEMORY_BUFFER_ALLOC_C
-
-/**
- * \def MBEDTLS_NET_C
- *
- * Enable the TCP and UDP over IPv6/IPv4 networking routines.
- *
- * \note This module only works on POSIX/Unix (including Linux, BSD and OS X)
- * and Windows. For other platforms, you'll want to disable it, and write your
- * own networking callbacks to be passed to \c mbedtls_ssl_set_bio().
- *
- * \note See also our Knowledge Base article about porting to a new
- * environment:
- * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
- *
- * Module: library/net_sockets.c
- *
- * This module provides networking routines.
- */
-// #define MBEDTLS_NET_C
-
-/**
- * \def MBEDTLS_OID_C
- *
- * Enable the OID database.
- *
- * Module: library/oid.c
- * Caller: library/asn1write.c
- * library/pkcs5.c
- * library/pkparse.c
- * library/pkwrite.c
- * library/rsa.c
- * library/x509.c
- * library/x509_create.c
- * library/x509_crl.c
- * library/x509_crt.c
- * library/x509_csr.c
- * library/x509write_crt.c
- * library/x509write_csr.c
- *
- * This modules translates between OIDs and internal values.
- */
-#define MBEDTLS_OID_C
-
-/**
- * \def MBEDTLS_PADLOCK_C
- *
- * Enable VIA Padlock support on x86.
- *
- * Module: library/padlock.c
- * Caller: library/aes.c
- *
- * Requires: MBEDTLS_HAVE_ASM
- *
- * This modules adds support for the VIA PadLock on x86.
- */
-#define MBEDTLS_PADLOCK_C
-
-/**
- * \def MBEDTLS_PEM_PARSE_C
- *
- * Enable PEM decoding / parsing.
- *
- * Module: library/pem.c
- * Caller: library/dhm.c
- * library/pkparse.c
- * library/x509_crl.c
- * library/x509_crt.c
- * library/x509_csr.c
- *
- * Requires: MBEDTLS_BASE64_C
- *
- * This modules adds support for decoding / parsing PEM files.
- */
-#define MBEDTLS_PEM_PARSE_C
-
-/**
- * \def MBEDTLS_PEM_WRITE_C
- *
- * Enable PEM encoding / writing.
- *
- * Module: library/pem.c
- * Caller: library/pkwrite.c
- * library/x509write_crt.c
- * library/x509write_csr.c
- *
- * Requires: MBEDTLS_BASE64_C
- *
- * This modules adds support for encoding / writing PEM files.
- */
-#define MBEDTLS_PEM_WRITE_C
-
-/**
- * \def MBEDTLS_PK_C
- *
- * Enable the generic public (asymetric) key layer.
- *
- * Module: library/pk.c
- * Caller: library/ssl_tls.c
- * library/ssl_cli.c
- * library/ssl_srv.c
- *
- * Requires: MBEDTLS_RSA_C or MBEDTLS_ECP_C
- *
- * Uncomment to enable generic public key wrappers.
- */
-#define MBEDTLS_PK_C
-
-/**
- * \def MBEDTLS_PK_PARSE_C
- *
- * Enable the generic public (asymetric) key parser.
- *
- * Module: library/pkparse.c
- * Caller: library/x509_crt.c
- * library/x509_csr.c
- *
- * Requires: MBEDTLS_PK_C
- *
- * Uncomment to enable generic public key parse functions.
- */
-#define MBEDTLS_PK_PARSE_C
-
-/**
- * \def MBEDTLS_PK_WRITE_C
- *
- * Enable the generic public (asymetric) key writer.
- *
- * Module: library/pkwrite.c
- * Caller: library/x509write.c
- *
- * Requires: MBEDTLS_PK_C
- *
- * Uncomment to enable generic public key write functions.
- */
-#define MBEDTLS_PK_WRITE_C
-
-/**
- * \def MBEDTLS_PKCS5_C
- *
- * Enable PKCS#5 functions.
- *
- * Module: library/pkcs5.c
- *
- * Requires: MBEDTLS_MD_C
- *
- * This module adds support for the PKCS#5 functions.
- */
-#define MBEDTLS_PKCS5_C
-
-/**
- * \def MBEDTLS_PKCS11_C
- *
- * Enable wrapper for PKCS#11 smartcard support.
- *
- * Module: library/pkcs11.c
- * Caller: library/pk.c
- *
- * Requires: MBEDTLS_PK_C
- *
- * This module enables SSL/TLS PKCS #11 smartcard support.
- * Requires the presence of the PKCS#11 helper library (libpkcs11-helper)
- */
-//#define MBEDTLS_PKCS11_C
-
-/**
- * \def MBEDTLS_PKCS12_C
- *
- * Enable PKCS#12 PBE functions.
- * Adds algorithms for parsing PKCS#8 encrypted private keys
- *
- * Module: library/pkcs12.c
- * Caller: library/pkparse.c
- *
- * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_CIPHER_C, MBEDTLS_MD_C
- * Can use: MBEDTLS_ARC4_C
- *
- * This module enables PKCS#12 functions.
- */
-#define MBEDTLS_PKCS12_C
-
-/**
- * \def MBEDTLS_PLATFORM_C
- *
- * Enable the platform abstraction layer that allows you to re-assign
- * functions like calloc(), free(), snprintf(), printf(), fprintf(), exit().
- *
- * Enabling MBEDTLS_PLATFORM_C enables to use of MBEDTLS_PLATFORM_XXX_ALT
- * or MBEDTLS_PLATFORM_XXX_MACRO directives, allowing the functions mentioned
- * above to be specified at runtime or compile time respectively.
- *
- * \note This abstraction layer must be enabled on Windows (including MSYS2)
- * as other module rely on it for a fixed snprintf implementation.
- *
- * Module: library/platform.c
- * Caller: Most other .c files
- *
- * This module enables abstraction of common (libc) functions.
- */
-#define MBEDTLS_PLATFORM_C
-
-/**
- * \def MBEDTLS_POLY1305_C
- *
- * Enable the Poly1305 MAC algorithm.
- *
- * Module: library/poly1305.c
- * Caller: library/chachapoly.c
- */
-#define MBEDTLS_POLY1305_C
-
-/**
- * \def MBEDTLS_PSA_CRYPTO_C
- *
- * Enable the Platform Security Architecture cryptography API.
- *
- * \warning The PSA Crypto API is still beta status. While you're welcome to
- * experiment using it, incompatible API changes are still possible, and some
- * parts may not have reached the same quality as the rest of Mbed TLS yet.
- *
- * Module: crypto/library/psa_crypto.c
- *
- * Requires: MBEDTLS_CTR_DRBG_C, MBEDTLS_ENTROPY_C
- *
- */
-#define MBEDTLS_PSA_CRYPTO_C
-
-/**
- * \def MBEDTLS_PSA_CRYPTO_STORAGE_C
- *
- * Enable the Platform Security Architecture persistent key storage.
- *
- * Module: crypto/library/psa_crypto_storage.c
- *
- * Requires: MBEDTLS_PSA_CRYPTO_C,
- * either MBEDTLS_PSA_ITS_FILE_C or a native implementation of
- * the PSA ITS interface
- */
-//#define MBEDTLS_PSA_CRYPTO_STORAGE_C
-
-/**
- * \def MBEDTLS_PSA_ITS_FILE_C
- *
- * Enable the emulation of the Platform Security Architecture
- * Internal Trusted Storage (PSA ITS) over files.
- *
- * Module: crypto/library/psa_its_file.c
- *
- * Requires: MBEDTLS_FS_IO
- *
- */
-//#define MBEDTLS_PSA_ITS_FILE_C
-
-/**
- * \def MBEDTLS_RIPEMD160_C
- *
- * Enable the RIPEMD-160 hash algorithm.
- *
- * Module: library/ripemd160.c
- * Caller: library/md.c
- *
- */
-#define MBEDTLS_RIPEMD160_C
-
-/**
- * \def MBEDTLS_RSA_C
- *
- * Enable the RSA public-key cryptosystem.
- *
- * Module: library/rsa.c
- * library/rsa_internal.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- * library/ssl_tls.c
- * library/x509.c
- *
- * This module is used by the following key exchanges:
- * RSA, DHE-RSA, ECDHE-RSA, RSA-PSK
- *
- * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C
- */
-#define MBEDTLS_RSA_C
-
-/**
- * \def MBEDTLS_SHA1_C
- *
- * Enable the SHA1 cryptographic hash algorithm.
- *
- * Module: library/sha1.c
- * Caller: library/md.c
- * library/ssl_cli.c
- * library/ssl_srv.c
- * library/ssl_tls.c
- * library/x509write_crt.c
- *
- * This module is required for SSL/TLS up to version 1.1, for TLS 1.2
- * depending on the handshake parameters, and for SHA1-signed certificates.
- *
- * \warning SHA-1 is considered a weak message digest and its use constitutes
- * a security risk. If possible, we recommend avoiding dependencies
- * on it, and considering stronger message digests instead.
- *
- */
-#define MBEDTLS_SHA1_C
-
-/**
- * \def MBEDTLS_SHA256_C
- *
- * Enable the SHA-224 and SHA-256 cryptographic hash algorithms.
- *
- * Module: library/sha256.c
- * Caller: library/entropy.c
- * library/md.c
- * library/ssl_cli.c
- * library/ssl_srv.c
- * library/ssl_tls.c
- *
- * This module adds support for SHA-224 and SHA-256.
- * This module is required for the SSL/TLS 1.2 PRF function.
- */
-#define MBEDTLS_SHA256_C
-
-/**
- * \def MBEDTLS_SHA512_C
- *
- * Enable the SHA-384 and SHA-512 cryptographic hash algorithms.
- *
- * Module: library/sha512.c
- * Caller: library/entropy.c
- * library/md.c
- * library/ssl_cli.c
- * library/ssl_srv.c
- *
- * This module adds support for SHA-384 and SHA-512.
- */
-#define MBEDTLS_SHA512_C
-
-/**
- * \def MBEDTLS_SSL_CACHE_C
- *
- * Enable simple SSL cache implementation.
- *
- * Module: library/ssl_cache.c
- * Caller:
- *
- * Requires: MBEDTLS_SSL_CACHE_C
- */
-#define MBEDTLS_SSL_CACHE_C
-
-/**
- * \def MBEDTLS_SSL_COOKIE_C
- *
- * Enable basic implementation of DTLS cookies for hello verification.
- *
- * Module: library/ssl_cookie.c
- * Caller:
- */
-#define MBEDTLS_SSL_COOKIE_C
-
-/**
- * \def MBEDTLS_SSL_TICKET_C
- *
- * Enable an implementation of TLS server-side callbacks for session tickets.
- *
- * Module: library/ssl_ticket.c
- * Caller:
- *
- * Requires: MBEDTLS_CIPHER_C
- */
-#define MBEDTLS_SSL_TICKET_C
-
-/**
- * \def MBEDTLS_SSL_CLI_C
- *
- * Enable the SSL/TLS client code.
- *
- * Module: library/ssl_cli.c
- * Caller:
- *
- * Requires: MBEDTLS_SSL_TLS_C
- *
- * This module is required for SSL/TLS client support.
- */
-#define MBEDTLS_SSL_CLI_C
-
-/**
- * \def MBEDTLS_SSL_SRV_C
- *
- * Enable the SSL/TLS server code.
- *
- * Module: library/ssl_srv.c
- * Caller:
- *
- * Requires: MBEDTLS_SSL_TLS_C
- *
- * This module is required for SSL/TLS server support.
- */
-#define MBEDTLS_SSL_SRV_C
-
-/**
- * \def MBEDTLS_SSL_TLS_C
- *
- * Enable the generic SSL/TLS code.
- *
- * Module: library/ssl_tls.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- *
- * Requires: MBEDTLS_CIPHER_C, MBEDTLS_MD_C
- * and at least one of the MBEDTLS_SSL_PROTO_XXX defines
- *
- * This module is required for SSL/TLS.
- */
-#define MBEDTLS_SSL_TLS_C
-
-/**
- * \def MBEDTLS_THREADING_C
- *
- * Enable the threading abstraction layer.
- * By default mbed TLS assumes it is used in a non-threaded environment or that
- * contexts are not shared between threads. If you do intend to use contexts
- * between threads, you will need to enable this layer to prevent race
- * conditions. See also our Knowledge Base article about threading:
- * https://tls.mbed.org/kb/development/thread-safety-and-multi-threading
- *
- * Module: library/threading.c
- *
- * This allows different threading implementations (self-implemented or
- * provided).
- *
- * You will have to enable either MBEDTLS_THREADING_ALT or
- * MBEDTLS_THREADING_PTHREAD.
- *
- * Enable this layer to allow use of mutexes within mbed TLS
- */
-//#define MBEDTLS_THREADING_C
-
-/**
- * \def MBEDTLS_TIMING_C
- *
- * Enable the semi-portable timing interface.
- *
- * \note The provided implementation only works on POSIX/Unix (including Linux,
- * BSD and OS X) and Windows. On other platforms, you can either disable that
- * module and provide your own implementations of the callbacks needed by
- * \c mbedtls_ssl_set_timer_cb() for DTLS, or leave it enabled and provide
- * your own implementation of the whole module by setting
- * \c MBEDTLS_TIMING_ALT in the current file.
- *
- * \note See also our Knowledge Base article about porting to a new
- * environment:
- * https://tls.mbed.org/kb/how-to/how-do-i-port-mbed-tls-to-a-new-environment-OS
- *
- * Module: library/timing.c
- * Caller: library/havege.c
- *
- * This module is used by the HAVEGE random number generator.
- */
-// #define MBEDTLS_TIMING_C
-
-/**
- * \def MBEDTLS_VERSION_C
- *
- * Enable run-time version information.
- *
- * Module: library/version.c
- *
- * This module provides run-time version information.
- */
-// #define MBEDTLS_VERSION_C
-
-/**
- * \def MBEDTLS_X509_USE_C
- *
- * Enable X.509 core for using certificates.
- *
- * Module: library/x509.c
- * Caller: library/x509_crl.c
- * library/x509_crt.c
- * library/x509_csr.c
- *
- * Requires: MBEDTLS_ASN1_PARSE_C, MBEDTLS_BIGNUM_C, MBEDTLS_OID_C,
- * MBEDTLS_PK_PARSE_C
- *
- * This module is required for the X.509 parsing modules.
- */
-#define MBEDTLS_X509_USE_C
-
-/**
- * \def MBEDTLS_X509_CRT_PARSE_C
- *
- * Enable X.509 certificate parsing.
- *
- * Module: library/x509_crt.c
- * Caller: library/ssl_cli.c
- * library/ssl_srv.c
- * library/ssl_tls.c
- *
- * Requires: MBEDTLS_X509_USE_C
- *
- * This module is required for X.509 certificate parsing.
- */
-#define MBEDTLS_X509_CRT_PARSE_C
-
-/**
- * \def MBEDTLS_X509_CRL_PARSE_C
- *
- * Enable X.509 CRL parsing.
- *
- * Module: library/x509_crl.c
- * Caller: library/x509_crt.c
- *
- * Requires: MBEDTLS_X509_USE_C
- *
- * This module is required for X.509 CRL parsing.
- */
-#define MBEDTLS_X509_CRL_PARSE_C
-
-/**
- * \def MBEDTLS_X509_CSR_PARSE_C
- *
- * Enable X.509 Certificate Signing Request (CSR) parsing.
- *
- * Module: library/x509_csr.c
- * Caller: library/x509_crt_write.c
- *
- * Requires: MBEDTLS_X509_USE_C
- *
- * This module is used for reading X.509 certificate request.
- */
-#define MBEDTLS_X509_CSR_PARSE_C
-
-/**
- * \def MBEDTLS_X509_CREATE_C
- *
- * Enable X.509 core for creating certificates.
- *
- * Module: library/x509_create.c
- *
- * Requires: MBEDTLS_BIGNUM_C, MBEDTLS_OID_C, MBEDTLS_PK_WRITE_C
- *
- * This module is the basis for creating X.509 certificates and CSRs.
- */
-#define MBEDTLS_X509_CREATE_C
-
-/**
- * \def MBEDTLS_X509_CRT_WRITE_C
- *
- * Enable creating X.509 certificates.
- *
- * Module: library/x509_crt_write.c
- *
- * Requires: MBEDTLS_X509_CREATE_C
- *
- * This module is required for X.509 certificate creation.
- */
-#define MBEDTLS_X509_CRT_WRITE_C
-
-/**
- * \def MBEDTLS_X509_CSR_WRITE_C
- *
- * Enable creating X.509 Certificate Signing Requests (CSR).
- *
- * Module: library/x509_csr_write.c
- *
- * Requires: MBEDTLS_X509_CREATE_C
- *
- * This module is required for X.509 certificate request writing.
- */
-#define MBEDTLS_X509_CSR_WRITE_C
-
-/**
- * \def MBEDTLS_XTEA_C
- *
- * Enable the XTEA block cipher.
- *
- * Module: library/xtea.c
- * Caller:
- */
-#define MBEDTLS_XTEA_C
-
-/* \} name SECTION: mbed TLS modules */
-
-/**
- * \name SECTION: Module configuration options
- *
- * This section allows for the setting of module specific sizes and
- * configuration options. The default values are already present in the
- * relevant header files and should suffice for the regular use cases.
- *
- * Our advice is to enable options and change their values here
- * only if you have a good reason and know the consequences.
- *
- * Please check the respective header file for documentation on these
- * parameters (to prevent duplicate documentation).
- * \{
- */
-
-/* MPI / BIGNUM options */
-//#define MBEDTLS_MPI_WINDOW_SIZE 6 /**< Maximum windows size used. */
-//#define MBEDTLS_MPI_MAX_SIZE 1024 /**< Maximum number of bytes for usable MPIs. */
-
-/* CTR_DRBG options */
-//#define MBEDTLS_CTR_DRBG_ENTROPY_LEN 48 /**< Amount of entropy used per seed by default (48 with SHA-512, 32 with
-// SHA-256) */ #define MBEDTLS_CTR_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */ #define
-// MBEDTLS_CTR_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */ #define
-// MBEDTLS_CTR_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */ #define
-// MBEDTLS_CTR_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */ #define MBEDTLS_CTR_DRBG_USE_128_BIT_KEY
-///**< Use 128-bit key for CTR_DRBG - may reduce security (see ctr_drbg.h) */
-
-/* HMAC_DRBG options */
-//#define MBEDTLS_HMAC_DRBG_RESEED_INTERVAL 10000 /**< Interval before reseed is performed by default */
-//#define MBEDTLS_HMAC_DRBG_MAX_INPUT 256 /**< Maximum number of additional input bytes */
-//#define MBEDTLS_HMAC_DRBG_MAX_REQUEST 1024 /**< Maximum number of requested bytes per call */
-//#define MBEDTLS_HMAC_DRBG_MAX_SEED_INPUT 384 /**< Maximum size of (re)seed buffer */
-
-/* ECP options */
-//#define MBEDTLS_ECP_MAX_BITS 521 /**< Maximum bit size of groups */
-//#define MBEDTLS_ECP_WINDOW_SIZE 6 /**< Maximum window size used */
-//#define MBEDTLS_ECP_FIXED_POINT_OPTIM 1 /**< Enable fixed-point speed-up */
-
-/* Entropy options */
-//#define MBEDTLS_ENTROPY_MAX_SOURCES 20 /**< Maximum number of sources supported */
-//#define MBEDTLS_ENTROPY_MAX_GATHER 128 /**< Maximum amount requested from entropy sources */
-//#define MBEDTLS_ENTROPY_MIN_HARDWARE 32 /**< Default minimum number of bytes required for the hardware entropy
-// source mbedtls_hardware_poll() before entropy is released */
-
-/* Memory buffer allocator options */
-//#define MBEDTLS_MEMORY_ALIGN_MULTIPLE 4 /**< Align on multiples of this value */
-
-/* Platform options */
-//#define MBEDTLS_PLATFORM_STD_MEM_HDR <stdlib.h> /**< Header to include if MBEDTLS_PLATFORM_NO_STD_FUNCTIONS is defined. Don't
-// define if no header is needed. */ #define MBEDTLS_PLATFORM_STD_CALLOC calloc /**< Default allocator to use, can be
-// undefined */ #define MBEDTLS_PLATFORM_STD_FREE free /**< Default free to use, can be undefined */ #define
-// MBEDTLS_PLATFORM_STD_EXIT exit /**< Default exit to use, can be undefined */ #define MBEDTLS_PLATFORM_STD_TIME time
-///**< Default time to use, can be undefined. MBEDTLS_HAVE_TIME must be enabled */ #define MBEDTLS_PLATFORM_STD_FPRINTF fprintf
-///**< Default fprintf to use, can be undefined */ #define MBEDTLS_PLATFORM_STD_PRINTF printf /**< Default printf to use, can
-// be undefined */
-/* Note: your snprintf must correctly zero-terminate the buffer! */
-//#define MBEDTLS_PLATFORM_STD_SNPRINTF snprintf /**< Default snprintf to use, can be undefined */
-//#define MBEDTLS_PLATFORM_STD_EXIT_SUCCESS 0 /**< Default exit value to use, can be undefined */
-//#define MBEDTLS_PLATFORM_STD_EXIT_FAILURE 1 /**< Default exit value to use, can be undefined */
-//#define MBEDTLS_PLATFORM_STD_NV_SEED_READ mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be
-// undefined */ #define MBEDTLS_PLATFORM_STD_NV_SEED_WRITE mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function
-// to use, can be undefined */ #define MBEDTLS_PLATFORM_STD_NV_SEED_FILE "seedfile" /**< Seed file to read/write with default
-// implementation */
-
-/* To Use Function Macros MBEDTLS_PLATFORM_C must be enabled */
-/* MBEDTLS_PLATFORM_XXX_MACRO and MBEDTLS_PLATFORM_XXX_ALT cannot both be defined */
-//#define MBEDTLS_PLATFORM_CALLOC_MACRO calloc /**< Default allocator macro to use, can be undefined */
-//#define MBEDTLS_PLATFORM_FREE_MACRO free /**< Default free macro to use, can be undefined */
-//#define MBEDTLS_PLATFORM_EXIT_MACRO exit /**< Default exit macro to use, can be undefined */
-//#define MBEDTLS_PLATFORM_TIME_MACRO time /**< Default time macro to use, can be undefined. MBEDTLS_HAVE_TIME must be
-// enabled */ #define MBEDTLS_PLATFORM_TIME_TYPE_MACRO time_t /**< Default time macro to use, can be undefined.
-// MBEDTLS_HAVE_TIME must be enabled */ #define MBEDTLS_PLATFORM_FPRINTF_MACRO fprintf /**< Default fprintf macro to use, can
-// be undefined */ #define MBEDTLS_PLATFORM_PRINTF_MACRO printf /**< Default printf macro to use, can be undefined */
-/* Note: your snprintf must correctly zero-terminate the buffer! */
-//#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf /**< Default snprintf macro to use, can be undefined */
-//#define MBEDTLS_PLATFORM_VSNPRINTF_MACRO vsnprintf /**< Default vsnprintf macro to use, can be undefined */
-//#define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO mbedtls_platform_std_nv_seed_read /**< Default nv_seed_read function to use, can be
-// undefined */ #define MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO mbedtls_platform_std_nv_seed_write /**< Default nv_seed_write function
-// to use, can be undefined */
-
-/**
- * \brief This macro is invoked by the library when an invalid parameter
- * is detected that is only checked with #MBEDTLS_CHECK_PARAMS
- * (see the documentation of that option for context).
- *
- * When you leave this undefined here, the library provides
- * a default definition. If the macro #MBEDTLS_CHECK_PARAMS_ASSERT
- * is defined, the default definition is `assert(cond)`,
- * otherwise the default definition calls a function
- * mbedtls_param_failed(). This function is declared in
- * `platform_util.h` for the benefit of the library, but
- * you need to define in your application.
- *
- * When you define this here, this replaces the default
- * definition in platform_util.h (which no longer declares the
- * function mbedtls_param_failed()) and it is your responsibility
- * to make sure this macro expands to something suitable (in
- * particular, that all the necessary declarations are visible
- * from within the library - you can ensure that by providing
- * them in this file next to the macro definition).
- * If you define this macro to call `assert`, also define
- * #MBEDTLS_CHECK_PARAMS_ASSERT so that library source files
- * include `<assert.h>`.
- *
- * Note that you may define this macro to expand to nothing, in
- * which case you don't have to worry about declarations or
- * definitions. However, you will then be notified about invalid
- * parameters only in non-void functions, and void function will
- * just silently return early on invalid parameters, which
- * partially negates the benefits of enabling
- * #MBEDTLS_CHECK_PARAMS in the first place, so is discouraged.
- *
- * \param cond The expression that should evaluate to true, but doesn't.
- */
-//#define MBEDTLS_PARAM_FAILED( cond ) assert( cond )
-
-/* SSL Cache options */
-//#define MBEDTLS_SSL_CACHE_DEFAULT_TIMEOUT 86400 /**< 1 day */
-//#define MBEDTLS_SSL_CACHE_DEFAULT_MAX_ENTRIES 50 /**< Maximum entries in cache */
-
-/* SSL options */
-
-/** \def MBEDTLS_SSL_MAX_CONTENT_LEN
- *
- * Maximum length (in bytes) of incoming and outgoing plaintext fragments.
- *
- * This determines the size of both the incoming and outgoing TLS I/O buffers
- * in such a way that both are capable of holding the specified amount of
- * plaintext data, regardless of the protection mechanism used.
- *
- * To configure incoming and outgoing I/O buffers separately, use
- * #MBEDTLS_SSL_IN_CONTENT_LEN and #MBEDTLS_SSL_OUT_CONTENT_LEN,
- * which overwrite the value set by this option.
- *
- * \note When using a value less than the default of 16KB on the client, it is
- * recommended to use the Maximum Fragment Length (MFL) extension to
- * inform the server about this limitation. On the server, there
- * is no supported, standardized way of informing the client about
- * restriction on the maximum size of incoming messages, and unless
- * the limitation has been communicated by other means, it is recommended
- * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
- * while keeping the default value of 16KB for the incoming buffer.
- *
- * Uncomment to set the maximum plaintext size of both
- * incoming and outgoing I/O buffers.
- */
-//#define MBEDTLS_SSL_MAX_CONTENT_LEN 16384
-
-/** \def MBEDTLS_SSL_IN_CONTENT_LEN
- *
- * Maximum length (in bytes) of incoming plaintext fragments.
- *
- * This determines the size of the incoming TLS I/O buffer in such a way
- * that it is capable of holding the specified amount of plaintext data,
- * regardless of the protection mechanism used.
- *
- * If this option is undefined, it inherits its value from
- * #MBEDTLS_SSL_MAX_CONTENT_LEN.
- *
- * \note When using a value less than the default of 16KB on the client, it is
- * recommended to use the Maximum Fragment Length (MFL) extension to
- * inform the server about this limitation. On the server, there
- * is no supported, standardized way of informing the client about
- * restriction on the maximum size of incoming messages, and unless
- * the limitation has been communicated by other means, it is recommended
- * to only change the outgoing buffer size #MBEDTLS_SSL_OUT_CONTENT_LEN
- * while keeping the default value of 16KB for the incoming buffer.
- *
- * Uncomment to set the maximum plaintext size of the incoming I/O buffer
- * independently of the outgoing I/O buffer.
- */
-//#define MBEDTLS_SSL_IN_CONTENT_LEN 16384
-
-/** \def MBEDTLS_SSL_CID_IN_LEN_MAX
- *
- * The maximum length of CIDs used for incoming DTLS messages.
- *
- */
-//#define MBEDTLS_SSL_CID_IN_LEN_MAX 32
-
-/** \def MBEDTLS_SSL_CID_OUT_LEN_MAX
- *
- * The maximum length of CIDs used for outgoing DTLS messages.
- *
- */
-//#define MBEDTLS_SSL_CID_OUT_LEN_MAX 32
-
-/** \def MBEDTLS_SSL_CID_PADDING_GRANULARITY
- *
- * This option controls the use of record plaintext padding
- * when using the Connection ID extension in DTLS 1.2.
- *
- * The padding will always be chosen so that the length of the
- * padded plaintext is a multiple of the value of this option.
- *
- * Note: A value of \c 1 means that no padding will be used
- * for outgoing records.
- *
- * Note: On systems lacking division instructions,
- * a power of two should be preferred.
- *
- */
-//#define MBEDTLS_SSL_CID_PADDING_GRANULARITY 16
-
-/** \def MBEDTLS_SSL_OUT_CONTENT_LEN
- *
- * Maximum length (in bytes) of outgoing plaintext fragments.
- *
- * This determines the size of the outgoing TLS I/O buffer in such a way
- * that it is capable of holding the specified amount of plaintext data,
- * regardless of the protection mechanism used.
- *
- * If this option undefined, it inherits its value from
- * #MBEDTLS_SSL_MAX_CONTENT_LEN.
- *
- * It is possible to save RAM by setting a smaller outward buffer, while keeping
- * the default inward 16384 byte buffer to conform to the TLS specification.
- *
- * The minimum required outward buffer size is determined by the handshake
- * protocol's usage. Handshaking will fail if the outward buffer is too small.
- * The specific size requirement depends on the configured ciphers and any
- * certificate data which is sent during the handshake.
- *
- * Uncomment to set the maximum plaintext size of the outgoing I/O buffer
- * independently of the incoming I/O buffer.
- */
-//#define MBEDTLS_SSL_OUT_CONTENT_LEN 16384
-
-/** \def MBEDTLS_SSL_DTLS_MAX_BUFFERING
- *
- * Maximum number of heap-allocated bytes for the purpose of
- * DTLS handshake message reassembly and future message buffering.
- *
- * This should be at least 9/8 * MBEDTLSSL_IN_CONTENT_LEN
- * to account for a reassembled handshake message of maximum size,
- * together with its reassembly bitmap.
- *
- * A value of 2 * MBEDTLS_SSL_IN_CONTENT_LEN (32768 by default)
- * should be sufficient for all practical situations as it allows
- * to reassembly a large handshake message (such as a certificate)
- * while buffering multiple smaller handshake messages.
- *
- */
-//#define MBEDTLS_SSL_DTLS_MAX_BUFFERING 32768
-
-//#define MBEDTLS_SSL_DEFAULT_TICKET_LIFETIME 86400 /**< Lifetime of session tickets (if enabled) */
-//#define MBEDTLS_PSK_MAX_LEN 32 /**< Max size of TLS pre-shared keys, in bytes (default 256 bits) */
-//#define MBEDTLS_SSL_COOKIE_TIMEOUT 60 /**< Default expiration delay of DTLS cookies, in seconds if HAVE_TIME, or in number
-// of cookies issued */
-
-/**
- * Complete list of ciphersuites to use, in order of preference.
- *
- * \warning No dependency checking is done on that field! This option can only
- * be used to restrict the set of available ciphersuites. It is your
- * responsibility to make sure the needed modules are active.
- *
- * Use this to save a few hundred bytes of ROM (default ordering of all
- * available ciphersuites) and a few to a few hundred bytes of RAM.
- *
- * The value below is only an example, not the default.
- */
-//#define MBEDTLS_SSL_CIPHERSUITES MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384,MBEDTLS_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256
-
-/* X509 options */
-//#define MBEDTLS_X509_MAX_INTERMEDIATE_CA 8 /**< Maximum number of intermediate CAs in a verification chain. */
-//#define MBEDTLS_X509_MAX_FILE_PATH_LEN 512 /**< Maximum length of a path/filename string in bytes including the null
-// terminator character ('\0'). */
-
-/**
- * Allow SHA-1 in the default TLS configuration for certificate signing.
- * Without this build-time option, SHA-1 support must be activated explicitly
- * through mbedtls_ssl_conf_cert_profile. Turning on this option is not
- * recommended because of it is possible to generate SHA-1 collisions, however
- * this may be safe for legacy infrastructure where additional controls apply.
- *
- * \warning SHA-1 is considered a weak message digest and its use constitutes
- * a security risk. If possible, we recommend avoiding dependencies
- * on it, and considering stronger message digests instead.
- *
- */
-//#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_CERTIFICATES
-
-/**
- * Allow SHA-1 in the default TLS configuration for TLS 1.2 handshake
- * signature and ciphersuite selection. Without this build-time option, SHA-1
- * support must be activated explicitly through mbedtls_ssl_conf_sig_hashes.
- * The use of SHA-1 in TLS <= 1.1 and in HMAC-SHA-1 is always allowed by
- * default. At the time of writing, there is no practical attack on the use
- * of SHA-1 in handshake signatures, hence this option is turned on by default
- * to preserve compatibility with existing peers, but the general
- * warning applies nonetheless:
- *
- * \warning SHA-1 is considered a weak message digest and its use constitutes
- * a security risk. If possible, we recommend avoiding dependencies
- * on it, and considering stronger message digests instead.
- *
- */
-#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE
-
-/**
- * Uncomment the macro to let mbed TLS use your alternate implementation of
- * mbedtls_platform_zeroize(). This replaces the default implementation in
- * platform_util.c.
- *
- * mbedtls_platform_zeroize() is a widely used function across the library to
- * zero a block of memory. The implementation is expected to be secure in the
- * sense that it has been written to prevent the compiler from removing calls
- * to mbedtls_platform_zeroize() as part of redundant code elimination
- * optimizations. However, it is difficult to guarantee that calls to
- * mbedtls_platform_zeroize() will not be optimized by the compiler as older
- * versions of the C language standards do not provide a secure implementation
- * of memset(). Therefore, MBEDTLS_PLATFORM_ZEROIZE_ALT enables users to
- * configure their own implementation of mbedtls_platform_zeroize(), for
- * example by using directives specific to their compiler, features from newer
- * C standards (e.g using memset_s() in C11) or calling a secure memset() from
- * their system (e.g explicit_bzero() in BSD).
- */
-//#define MBEDTLS_PLATFORM_ZEROIZE_ALT
-
-/**
- * Uncomment the macro to let Mbed TLS use your alternate implementation of
- * mbedtls_platform_gmtime_r(). This replaces the default implementation in
- * platform_util.c.
- *
- * gmtime() is not a thread-safe function as defined in the C standard. The
- * library will try to use safer implementations of this function, such as
- * gmtime_r() when available. However, if Mbed TLS cannot identify the target
- * system, the implementation of mbedtls_platform_gmtime_r() will default to
- * using the standard gmtime(). In this case, calls from the library to
- * gmtime() will be guarded by the global mutex mbedtls_threading_gmtime_mutex
- * if MBEDTLS_THREADING_C is enabled. We recommend that calls from outside the
- * library are also guarded with this mutex to avoid race conditions. However,
- * if the macro MBEDTLS_PLATFORM_GMTIME_R_ALT is defined, Mbed TLS will
- * unconditionally use the implementation for mbedtls_platform_gmtime_r()
- * supplied at compile time.
- */
-//#define MBEDTLS_PLATFORM_GMTIME_R_ALT
-
-/**
- * Enable the verified implementations of ECDH primitives from Project Everest
- * (currently only Curve25519). This feature changes the layout of ECDH
- * contexts and therefore is a compatibility break for applications that access
- * fields of a mbedtls_ecdh_context structure directly. See also
- * MBEDTLS_ECDH_LEGACY_CONTEXT in include/mbedtls/ecdh.h.
- */
-//#define MBEDTLS_ECDH_VARIANT_EVEREST_ENABLED
-
-/* \} name SECTION: Customisation configuration options */
-
-/* Target and application specific configurations
- *
- * Allow user to override any previous default.
- *
- */
-#if defined(MBEDTLS_USER_CONFIG_FILE)
-#include MBEDTLS_USER_CONFIG_FILE
-#endif
-
-#include "mbedtls/check_config.h"
-
-#endif /* MBEDTLS_CONFIG_H */
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/cy8c6xxa_cm4_dual_ota_int.ld b/third_party/infineon/psoc6/psoc6_sdk/ota/cy8c6xxa_cm4_dual_ota_int.ld
index d1717ff3e47ff0..7e8e34fa3239c4 100644
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/cy8c6xxa_cm4_dual_ota_int.ld
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/cy8c6xxa_cm4_dual_ota_int.ld
@@ -43,15 +43,12 @@ ENTRY(Reset_Handler)
/* Size of the stack section at the end of CM4 SRAM */
STACK_SIZE = 0x1000;
-/* Size of the Cortex-M0+ application image at the start of FLASH - passed in as argument to ld.exe*/
-/* MCUBOOT_BOOTLOADER_SIZE = 0x12000; */
-
-/* MCUBoot Header Size passed in as argument to ld.exe */
-/* MCUBOOT_HEADER_SIZE = 0x1000; */
-
-/* CY_BOOT_PRIMARY_1_SIZE Slot 1 size passed in as argument to ld.exe */
-/* CY_BOOT_PRIMARY_1_SIZE = 0x0EE000 (Internal FLASH) */
-/* CY_BOOT_PRIMARY_1_SIZE = 0x10C000 (External FLASH) */
+/*
+ Arguments for OTA using MCUBoot -- will get from passed in Makefile:
+ --defsym,MCUBOOT_HEADER_SIZE=XXXX
+ --defsym,FLASH_AREA_IMG_1_PRIMARY_START=XXXX
+ --defsym,FLASH_AREA_IMG_1_PRIMARY_SIZE=XXXX
+*/
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard
@@ -74,7 +71,7 @@ MEMORY
* where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
*/
ram (rwx) : ORIGIN = 0x08020800, LENGTH = 0xDF000
- flash (rx) : ORIGIN = 0x10000000 + MCUBOOT_BOOTLOADER_SIZE, LENGTH = CY_BOOT_PRIMARY_1_SIZE
+ flash (rx) : ORIGIN = 0x10000000 + FLASH_AREA_IMG_1_PRIMARY_START + MCUBOOT_HEADER_SIZE, LENGTH = FLASH_AREA_IMG_1_PRIMARY_SIZE - MCUBOOT_HEADER_SIZE
/* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
* You can assign sections to this memory region for only one of the cores.
@@ -133,7 +130,7 @@ GROUP(libgcc.a libc.a libm.a libnosys.a)
SECTIONS
{
/* Cortex-M4 application flash area */
- .text ORIGIN(flash) + MCUBOOT_HEADER_SIZE :
+ .text ORIGIN(flash) :
{
. = ALIGN(8);
__cy_app_load_addr = . ;
@@ -401,4 +398,4 @@ __cy_memory_4_start = 0x90700000;
__cy_memory_4_length = 0x100000;
__cy_memory_4_row_size = 1;
-/* EOF */
+/* EOF */
\ No newline at end of file
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/matter-psoc6-mcuboot-bootloader.hex b/third_party/infineon/psoc6/psoc6_sdk/ota/matter-psoc6-mcuboot-bootloader.hex
index a8ae0bf328eb65..ff4b8ae09aefb5 100644
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/matter-psoc6-mcuboot-bootloader.hex
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/matter-psoc6-mcuboot-bootloader.hex
@@ -1,4099 +1,5769 @@
-:020000041000EA
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diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh b/third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh
index ef6bf3bc30ad95..da17582944adc7 100755
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/ota_base_build.sh
@@ -1,7 +1,22 @@
-OUT_DIR=$1
-HEX_NAME=$2
-ANYCLOUD_DIR=third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota/
+#!/bin/bash
-mv "$OUT_DIR"/"$HEX_NAME".hex "$OUT_DIR"/"$HEX_NAME".unsigned.hex
+SCRIPT_ROOT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")/" && pwd)"
+# Windows: convert /cygdrive/d/git to D:/git
+if [[ ${OS:-} == Windows_NT ]]; then
+ SCRIPT_ROOT_DIR="$(cygpath --mixed "$SCRIPT_ROOT_PATH")"
+else
+ SCRIPT_ROOT_DIR="$SCRIPT_ROOT_PATH"
+fi
-./"$ANYCLOUD_DIR"/scripts/sign_script.bash "$OUT_DIR"/ "$HEX_NAME" python3 arm-none-eabi-objcopy "-O ihex" "" "$ANYCLOUD_DIR"/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/scripts/ imgtool_v1.7.0/imgtool.py create 0xFF 0x400 3584 1.0.0 0x00018000 0x001C0000 arm-none-eabi-objcopy ""
+APP=${1:-"psoc6-lock"} # {psoc6-lock, psoc6-light, psoc6-all-clusters}
+HEX_NAME=${2:-"chip-psoc6-lock-example"} # {chip-psoc6-lock-example, chip-psoc6-lighting-example, chip-psoc6-clusters-example}
+
+LIBS_DIR="$SCRIPT_ROOT_DIR/../libs"
+MATTER_SCRIPTS_DIR="$SCRIPT_ROOT_DIR/../../../../../scripts"
+OUT_DIR="$SCRIPT_ROOT_DIR/../../../../../out/infineon-$APP-ota"
+
+source "$MATTER_SCRIPTS_DIR/activate.sh"
+
+arm-none-eabi-objcopy -I ihex -O elf32-little "$OUT_DIR/$HEX_NAME".hex "$OUT_DIR/$HEX_NAME".elf
+chmod +x "$OUT_DIR/$HEX_NAME".elf
+"$LIBS_DIR"/ota-bootloader-abstraction/scripts/mcuboot/sign_script.bash "$OUT_DIR" "$HEX_NAME" python3 arm-none-eabi-objcopy "-O ihex" "elf_first" "$LIBS_DIR"/ota-bootloader-abstraction/makefiles/mcuboot/../../scripts/mcuboot/imgtool imgtool.py create 0xFF 0x400 3584 1.0.0 0x028000 0x1c0000 arm-none-eabi-objcopy "-k $LIBS_DIR/ota-bootloader-abstraction/scripts/mcuboot/keys/cypress-test-ec-p256.pem"
diff --git a/third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh b/third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh
index 4f1c67797967bb..c6d46fd5c2ad3e 100755
--- a/third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh
+++ b/third_party/infineon/psoc6/psoc6_sdk/ota/ota_update_build.sh
@@ -1,13 +1,30 @@
-OUT_DIR=$1
-HEX_NAME=$2
-ANYCLOUD_DIR=third_party/infineon/psoc6/psoc6_sdk/libs/anycloud-ota/
+#!/bin/bash
-mv "$OUT_DIR"/"$HEX_NAME".hex "$OUT_DIR"/"$HEX_NAME".unsigned.hex
+SCRIPT_ROOT_PATH="$(cd "$(dirname "${BASH_SOURCE[0]}")/" && pwd)"
+# Windows: convert /cygdrive/d/git to D:/git
+if [[ ${OS:-} == Windows_NT ]]; then
+ SCRIPT_ROOT_DIR="$(cygpath --mixed "$SCRIPT_ROOT_PATH")"
+else
+ SCRIPT_ROOT_DIR="$SCRIPT_ROOT_PATH"
+fi
+
+APP=${1:-"psoc6-lock"} # {psoc6-lock, psoc6-light, psoc6-all-clusters}
+HEX_NAME=${2:-"chip-psoc6-lock-example"} # {chip-psoc6-lock-example, chip-psoc6-lighting-example, chip-psoc6-clusters-example}
+
+LIBS_DIR="$SCRIPT_ROOT_DIR/../libs"
+ROOT_DIR="$SCRIPT_ROOT_DIR/../../../../../"
+OUT_DIR="$ROOT_DIR/out/infineon-$APP-ota-updateimage"
+
+source "$ROOT_DIR/scripts/activate.sh"
+
+arm-none-eabi-objcopy -I ihex -O elf32-little "$OUT_DIR/$HEX_NAME".hex "$OUT_DIR/$HEX_NAME".elf
+
+chmod +x "$OUT_DIR/$HEX_NAME".elf
-./"$ANYCLOUD_DIR"/scripts/sign_script.bash "$OUT_DIR"/ "$HEX_NAME" python3 arm-none-eabi-objcopy "-O ihex" "" "$ANYCLOUD_DIR"/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/scripts/ imgtool_v1.7.0/imgtool.py sign 0xFF 0x400 3584 1.0.0 0x00018000 0x001C0000 arm-none-eabi-objcopy "-k $ANYCLOUD_DIR/source/COMPONENT_OTA_MCUBOOT_PSOC/mcuboot/keys/cypress-test-ec-p256.pem"
+"$LIBS_DIR"/ota-bootloader-abstraction/scripts/mcuboot/sign_script.bash "$OUT_DIR" "$HEX_NAME" python3 arm-none-eabi-objcopy "-O ihex" "elf_first" "$LIBS_DIR"/ota-bootloader-abstraction/makefiles/mcuboot/../../scripts/mcuboot/imgtool imgtool.py sign 0xFF 0x400 3584 1.0.0 0x028000 0x1c0000 arm-none-eabi-objcopy "-k $LIBS_DIR/ota-bootloader-abstraction/scripts/mcuboot/keys/cypress-test-ec-p256.pem"
if [ -f "$OUT_DIR"/"$HEX_NAME".ota ]; then
rm "$OUT_DIR"/"$HEX_NAME".ota
fi
-src/app/ota_image_tool.py create -v 0xFFF1 -p 0x8000 -vn 2 -vs "2.0" -da sha256 "$OUT_DIR"/"$HEX_NAME".bin "$OUT_DIR"/"$HEX_NAME".ota
+python3 "$ROOT_DIR"/src/app/ota_image_tool.py create -v 0xFFF1 -p 0x8000 -vn 2 -vs "2.0" -da sha256 "$OUT_DIR"/"$HEX_NAME".bin "$OUT_DIR"/"$HEX_NAME".ota