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[nrf noup] tree-wide: support NCS Partition Manager (PM) definitions
Partition Manager (PM) is a component of the nRF Connect SDK (NCS) which uses yaml files to resolve flash partition placement with a holistic view of the entire device, including each firmware image present on the flash device, and various subsystems, such as settings and NFFS. When this NCS extension is used, various source files which would use partition information from devicetree in "vanilla" zephyr instead use defines generated by PM instead. This commit removes support for HEX_FILES_TO_MERGE, as it conflicts with PM. The settings subsystem pm.yml defines a partition 'settings_storage'. The nffs subsystem pm.yml defines 'nffs_storage'. Leverage label translation to avoid patching partition names. Refer to the NCS documentation page for this feature for more details. This is a long-running out of tree patch which has been worked on by several people. The following sign-offs are in alphabetical order by first name. Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no> Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no> Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no> Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no> Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no> Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no> Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no> Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no> Signed-off-by: Ole Sæther <ole.saether@nordicsemi.no> Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no> Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no> Signed-off-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no> Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no> Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no> Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no> Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no> Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no> (cherry picked from commit 32b99c7) (cherry picked from commit 30f63cb) (cherry picked from commit c1017afdf66982c039dc6d77d21b9d4fba477abc) (cherry picked from commit 1be5e92) (cherry picked from commit 91edf7b)
1 parent fd84806 commit a439c0e

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8 files changed

+120
-4
lines changed

8 files changed

+120
-4
lines changed

Kconfig.zephyr

+1-3
Original file line numberDiff line numberDiff line change
@@ -120,9 +120,7 @@ config FLASH_LOAD_SIZE
120120
endif # HAS_FLASH_LOAD_OFFSET
121121

122122
config ROM_START_OFFSET
123-
hex
124-
prompt "ROM start offset" if !BOOTLOADER_MCUBOOT
125-
default 0x200 if BOOTLOADER_MCUBOOT
123+
hex "ROM start offset"
126124
default 0
127125
help
128126
If the application is built for chain-loading by a bootloader this

cmake/modules/kernel.cmake

+4
Original file line numberDiff line numberDiff line change
@@ -238,3 +238,7 @@ if("${CMAKE_EXTRA_GENERATOR}" STREQUAL "Eclipse CDT4")
238238
include(${ZEPHYR_BASE}/cmake/ide/eclipse_cdt4_generator_amendment.cmake)
239239
eclipse_cdt4_generator_amendment(1)
240240
endif()
241+
242+
if(ZEPHYR_NRF_MODULE_DIR)
243+
include(${ZEPHYR_NRF_MODULE_DIR}/cmake/partition_manager.cmake)
244+
endif()

drivers/flash/soc_flash_nrf.c

+11
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,11 @@ LOG_MODULE_REGISTER(flash_nrf);
3737

3838
#define SOC_NV_FLASH_NODE DT_INST(0, soc_nv_flash)
3939

40+
#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER
41+
#include <soc_secure.h>
42+
#include <pm_config.h>
43+
#endif /* CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER */
44+
4045
#ifndef CONFIG_SOC_FLASH_NRF_RADIO_SYNC_NONE
4146
#define FLASH_SLOT_WRITE 7500
4247
#if defined(CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE)
@@ -137,6 +142,12 @@ static int flash_nrf_read(const struct device *dev, off_t addr,
137142
return 0;
138143
}
139144

145+
#if CONFIG_TRUSTED_EXECUTION_NONSECURE && USE_PARTITION_MANAGER && PM_APP_ADDRESS
146+
if (addr < PM_APP_ADDRESS) {
147+
return soc_secure_mem_read(data, (void *)addr, len);
148+
}
149+
#endif
150+
140151
memcpy(data, (void *)addr, len);
141152

142153
return 0;

include/zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld

+46
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,35 @@
2727
#define RAMABLE_REGION SRAM
2828
#endif
2929

30+
#if USE_PARTITION_MANAGER
31+
32+
#include <pm_config.h>
33+
34+
#if CONFIG_NCS_IS_VARIANT_IMAGE
35+
/* We are linking against S1, create symbol containing the flash ID of S0.
36+
* This is used when writing code operating on the "other" slot.
37+
*/
38+
_image_1_primary_slot_id = PM_S0_ID;
39+
40+
#else /* ! CONFIG_NCS_IS_VARIANT_IMAGE */
41+
42+
#ifdef PM_S1_ID
43+
/* We are linking against S0, create symbol containing the flash ID of S1.
44+
* This is used when writing code operating on the "other" slot.
45+
*/
46+
_image_1_primary_slot_id = PM_S1_ID;
47+
#endif /* PM_S1_ID */
48+
49+
#endif /* CONFIG_NCS_IS_VARIANT_IMAGE */
50+
51+
#define ROM_ADDR PM_ADDRESS
52+
#define ROM_SIZE PM_SIZE
53+
54+
#define RAM_SIZE PM_SRAM_SIZE
55+
#define RAM_ADDR PM_SRAM_ADDRESS
56+
57+
#else /* ! USE_PARTITION_MANAGER */
58+
3059
#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
3160
#define ROM_ADDR RAM_ADDR
3261
#else
@@ -53,6 +82,23 @@
5382
#define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS
5483
#endif
5584

85+
#endif /* USE_PARTITION_MANAGER */
86+
87+
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ccm), okay)
88+
#define CCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_ccm))
89+
#define CCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_ccm))
90+
#endif
91+
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#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay)
93+
#define ITCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_itcm))
94+
#define ITCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_itcm))
95+
#endif
96+
97+
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay)
98+
#define DTCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_dtcm))
99+
#define DTCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_dtcm))
100+
#endif
101+
56102
#if defined(CONFIG_CUSTOM_SECTION_ALIGN)
57103
_region_min_align = CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE;
58104
#else

include/zephyr/storage/flash_map.h

+7
Original file line numberDiff line numberDiff line change
@@ -256,6 +256,10 @@ const struct device *flash_area_get_device(const struct flash_area *fa);
256256
*/
257257
uint8_t flash_area_erased_val(const struct flash_area *fa);
258258

259+
#if USE_PARTITION_MANAGER
260+
#include <flash_map_pm.h>
261+
#else
262+
259263
#define FLASH_AREA_LABEL_EXISTS(label) \
260264
DT_HAS_FIXED_PARTITION_LABEL(label)
261265

@@ -281,6 +285,9 @@ uint8_t flash_area_erased_val(const struct flash_area *fa);
281285
#define FLASH_AREA_DEVICE(label) \
282286
DEVICE_DT_GET(DT_MTD_FROM_FIXED_PARTITION(DT_NODE_BY_FIXED_PARTITION_LABEL(label)))
283287

288+
289+
#endif /* USE_PARTITION_MANAGER */
290+
284291
#ifdef __cplusplus
285292
}
286293
#endif

soc/arm/common/cortex_m/arm_mpu_regions.c

+13
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,9 @@
99
#include <linker/devicetree_regions.h>
1010

1111
#include "arm_mpu_mem_cfg.h"
12+
#if USE_PARTITION_MANAGER
13+
#include <pm_config.h>
14+
#endif
1215

1316
static const struct arm_mpu_region mpu_regions[] = {
1417
/* Region 0 */
@@ -22,6 +25,14 @@ static const struct arm_mpu_region mpu_regions[] = {
2225
#endif
2326
/* Region 1 */
2427
MPU_REGION_ENTRY("SRAM_0",
28+
#if USE_PARTITION_MANAGER
29+
PM_SRAM_ADDRESS,
30+
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
31+
REGION_RAM_ATTR(PM_SRAM_ADDRESS, PM_SRAM_SIZE)),
32+
#else
33+
REGION_RAM_ATTR(REGION_SRAM_SIZE)),
34+
#endif
35+
#else
2536
CONFIG_SRAM_BASE_ADDRESS,
2637
#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
2738
REGION_RAM_ATTR(CONFIG_SRAM_BASE_ADDRESS, \
@@ -30,6 +41,8 @@ static const struct arm_mpu_region mpu_regions[] = {
3041
REGION_RAM_ATTR(REGION_SRAM_SIZE)),
3142
#endif
3243

44+
#endif /* USE_PARTITION_MANAGER */
45+
3346
/* DT-defined regions */
3447
LINKER_DT_REGION_MPU(ARM_MPU_REGION_INIT)
3548
};

subsys/fs/littlefs_fs.c

+11-1
Original file line numberDiff line numberDiff line change
@@ -902,6 +902,12 @@ static const struct fs_file_system_t littlefs_fs = {
902902
.statvfs = littlefs_statvfs,
903903
};
904904

905+
#ifdef USE_PARTITION_MANAGER
906+
#define _LFS_USE_NCS_PM 1
907+
#else
908+
#define _LFS_USE_NCS_PM 0
909+
#endif
910+
905911
#define DT_DRV_COMPAT zephyr_fstab_littlefs
906912
#define FS_PARTITION(inst) DT_PHANDLE_BY_IDX(DT_DRV_INST(inst), partition, 0)
907913
#define FS_PARTITION_LABEL(inst) DT_STRING_TOKEN(FS_PARTITION(inst), label)
@@ -937,7 +943,11 @@ struct fs_mount_t FS_FSTAB_ENTRY(DT_DRV_INST(inst)) = { \
937943
.type = FS_LITTLEFS, \
938944
.mnt_point = DT_INST_PROP(inst, mount_point), \
939945
.fs_data = &fs_data_##inst, \
940-
.storage_dev = (void *)FLASH_AREA_ID(FS_PARTITION_LABEL(inst)), \
946+
.storage_dev = (void *) (_LFS_USE_NCS_PM ?\
947+
COND_CODE_1(FLASH_AREA_LABEL_EXISTS(littlefs_storage), \
948+
(FLASH_AREA_ID(littlefs_storage)), \
949+
(FLASH_AREA_ID(storage))) :\
950+
FLASH_AREA_ID(FS_PARTITION_LABEL(inst))), \
941951
.flags = FSTAB_ENTRY_DT_MOUNT_FLAGS(DT_DRV_INST(inst)), \
942952
};
943953

subsys/ipc/rpmsg_service/rpmsg_backend.h

+27
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,35 @@
1313
extern "C" {
1414
#endif
1515

16+
#if CONFIG_PARTITION_MANAGER_ENABLED
17+
18+
#include "pm_config.h"
19+
20+
#if defined(PM_RPMSG_NRF53_SRAM_ADDRESS) || defined(PM__RPMSG_NRF53_SRAM_ADDRESS)
21+
22+
#if defined(PM_RPMSG_NRF53_SRAM_ADDRESS)
23+
#define VDEV_START_ADDR PM_RPMSG_NRF53_SRAM_ADDRESS
24+
#define VDEV_SIZE PM_RPMSG_NRF53_SRAM_SIZE
25+
#else
26+
/* The current image is a child image in a different domain than the image
27+
* which defined the required values. To reach the values of the parent domain
28+
* we use the 'PM__' variant of the define.
29+
*/
30+
#define VDEV_START_ADDR PM__RPMSG_NRF53_SRAM_ADDRESS
31+
#define VDEV_SIZE PM__RPMSG_NRF53_SRAM_SIZE
32+
#endif /* defined(PM_RPMSG_NRF53_SRAM_ADDRESS) */
33+
34+
#else
1635
#define VDEV_START_ADDR CONFIG_RPMSG_SERVICE_SHM_BASE_ADDRESS
1736
#define VDEV_SIZE CONFIG_RPMSG_SERVICE_SHM_SIZE
37+
#endif /* defined(PM_RPMSG_NRF53_SRAM_ADDRESS) || defined(PM__RPMSG_NRF53_SRAM_ADDRESS) */
38+
39+
#else
40+
41+
#define VDEV_START_ADDR CONFIG_RPMSG_SERVICE_SHM_BASE_ADDRESS
42+
#define VDEV_SIZE CONFIG_RPMSG_SERVICE_SHM_SIZE
43+
44+
#endif /* CONFIG_PARTITION_MANAGER_ENABLED */
1845

1946
#define VDEV_STATUS_ADDR VDEV_START_ADDR
2047
#define VDEV_STATUS_SIZE 0x400

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