riscv: telink:tl3218x: add ble optimize.

- add optimize for ble.
- low down the ramcost.

Signed-off-by: Haiwen Xia <haiwen.xia@telink-semi.com>

Author: haiwentelink

.github/workflows/chef.yaml

@@ -110,7 +110,7 @@ jobs:
                 platform: telink
             - name: Update Zephyr to specific revision (for developers purpose)
               shell: bash
-              run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py e9249e2769bde058c729a9b1f940bfc8b35958a3"
+              run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py fdeaf68638c2a2a5343e884be8a367dbe5a53c42"
             - name: CI Examples Telink
               shell: bash
               run: |

.github/workflows/examples-telink.yaml

@@ -57,7 +57,7 @@ jobs:
                 gh-context: ${{ toJson(github) }}
 
             - name: Update Zephyr to specific revision (for developers purpose)
-              run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py e9249e2769bde058c729a9b1f940bfc8b35958a3"
+              run: scripts/run_in_build_env.sh "python3 scripts/tools/telink/update_zephyr.py b4a43d87fa1bc087981a72154e503036229e1e99"
 
             - name: Build example Telink (B92 retention) Air Quality Sensor App
               run: |

config/telink/chip-module/Kconfig.defaults

@@ -34,6 +34,7 @@ choice LOG_MODE
 endchoice
 
 choice MATTER_LOG_LEVEL_CHOICE
+    default MATTER_LOG_LEVEL_WRN if SOC_RISCV_TELINK_TL321X
     default MATTER_LOG_LEVEL_DBG
 endchoice
 
@@ -113,7 +114,6 @@ config GPIO
 # Bluetooth Low Energy configs
 
 config BT
-    default n if SOC_SERIES_RISCV_TELINK_TLX
     default y
 
 if BT
@@ -175,7 +175,7 @@ config BT_DEVICE_NAME_GATT_WRITABLE
     bool
     default n
 
-if SOC_SERIES_RISCV_TELINK_B9X
+if SOC_SERIES_RISCV_TELINK_B9X || SOC_SERIES_RISCV_TELINK_TLX
 
 config B9X_BLE_CTRL_THREAD_STACK_SIZE
     default 576
@@ -194,28 +194,8 @@ choice B9X_BLE_CTRL_MAC_TYPE
     default B9X_BLE_CTRL_MAC_TYPE_RANDOM_STATIC
 endchoice
 
-endif # SOC_SERIES_RISCV_TELINK_B9X
-
-if SOC_SERIES_RISCV_TELINK_TLX
-
-# config TLX_BLE_CTRL_THREAD_STACK_SIZE
-#     default 576
-# 
-# config TLX_BLE_CTRL_MASTER_MAX_NUM
-#     default 0
-# 
-# config TLX_BLE_CTRL_SLAVE_MAX_NUM
-#     default 1
-# 
-# config TLX_BLE_CTRL_RF_POWER
-#     default 3 if PM 
-#     default 9
-# 
-# choice TLX_BLE_CTRL_MAC_TYPE
-#     default TLX_BLE_CTRL_MAC_TYPE_RANDOM_STATIC
-# endchoice
-
-endif # TLX_BLE_CTRL_MASTER_MAX_NUM
+endif # SOC_SERIES_RISCV_TELINK_B9X || SOC_SERIES_RISCV_TELINK_TLX
+
 
 endif # BT
 
@@ -489,6 +469,7 @@ config OPENTHREAD_SHELL
     default n
 
 config CHIP_TASK_STACK_SIZE
+    default 6192 if SOC_RISCV_TELINK_TL321X
 	default 4864 if PM
 
 endif

examples/platform/telink/project_include/OpenThreadConfig.h

@@ -27,12 +27,17 @@
 
 /* Number of message buffers reduced to save RAM */
 #undef OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS
-#if CONFIG_PM
+#if CONFIG_PM || CONFIG_SOC_RISCV_TELINK_TL321X
 #define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 22
 #else
 #define OPENTHREAD_CONFIG_NUM_MESSAGE_BUFFERS 44
 #endif
 
+#if CONFIG_SOC_RISCV_TELINK_TL321X
+#undef OPENTHREAD_CONFIG_MLE_MAX_CHILDREN
+#define OPENTHREAD_CONFIG_MLE_MAX_CHILDREN 5
+#endif
+
 #define OPENTHREAD_CONFIG_LOG_OUTPUT OPENTHREAD_CONFIG_LOG_OUTPUT_DEBUG_UART
 
 #undef OPENTHREAD_CONFIG_LOG_LEVEL

src/platform/telink/CHIPDevicePlatformConfig.h

@@ -103,6 +103,13 @@
 #define CHIP_DEVICE_CONFIG_ENABLE_WIFI_AP 0
 #endif
 
+#ifdef CONFIG_SOC_RISCV_TELINK_TL321X
+#define CHIP_DEVICE_CONFIG_EVENT_LOGGING_CRIT_BUFFER_SIZE (256)
+#define CHIP_DEVICE_CONFIG_EVENT_LOGGING_INFO_BUFFER_SIZE (256)
+#define CHIP_DEVICE_CONFIG_EVENT_LOGGING_DEBUG_BUFFER_SIZE (256)
+#endif
+
+
 #ifdef CONFIG_BT
 #define CHIP_DEVICE_CONFIG_ENABLE_CHIPOBLE CONFIG_BT
 #else

src/platform/telink/SystemPlatformConfig.h

@@ -48,7 +48,7 @@ struct ChipDeviceEvent;
 #define CHIP_SYSTEM_PACKETBUFFER_FROM_CHIP_HEAP   1
 #define CHIP_SYSTEM_PACKETBUFFER_FROM_CHIP_POOL   0
 #define CHIP_SYSTEM_CONFIG_POOL_USE_HEAP 1
-#define CHIP_SYSTEM_CONFIG_PACKETBUFFER_CAPACITY_MAX 1200
+#define CHIP_SYSTEM_CONFIG_PACKETBUFFER_CAPACITY_MAX 1280
 #endif