boards: board dts and defconfig file adjustments

tejlmand · carlescufi · commit abca9170553c · 2024-04-09T23:35:54.000+02:00
Adjustments of dts and defconfig files to adjust for the MERGE removal.

The revert of MERGE requires specific dts and defconfig files for boards
which relied on the MERGE feature.

Signed-off-by: Torsten Rasmussen &lt;Torsten.Rasmussen@nordicsemi.no&gt;
diff --git a/boards/arm/mps2/mps2_an521_cpu0_ns_defconfig b/boards/arm/mps2/mps2_an521_cpu0_ns_defconfig
@@ -4,8 +4,18 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+CONFIG_RUNTIME_NMI=y
+CONFIG_ARM_TRUSTZONE_M=y
+CONFIG_ARM_MPU=y
 CONFIG_QEMU_ICOUNT_SHIFT=6
 
+# GPIOs
+CONFIG_GPIO=y
+
+# Serial
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+
 # Build a non-secure firmware image
-CONFIG_TRUSTED_EXECUTION_SECURE=n
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y
diff --git a/boards/intel/adsp/intel_adsp_cavs25_tgph.dts b/boards/intel/adsp/intel_adsp_cavs25_tgph.dts
diff --git a/boards/intel/adsp/intel_adsp_cavs25_tgph_defconfig b/boards/intel/adsp/intel_adsp_cavs25_tgph_defconfig
@@ -17,7 +17,6 @@ CONFIG_2ND_LEVEL_INTERRUPTS=y
 CONFIG_BUILD_OUTPUT_BIN=n
 
 CONFIG_MP_MAX_NUM_CPUS=2
-CONFIG_CORE_COUNT=2
 
 CONFIG_DCACHE_LINE_SIZE=64
 
diff --git a/boards/native/native_posix/native_posix_64.dts b/boards/native/native_posix/native_posix_64.dts
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2023 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "../native_sim/native_sim.dts"
diff --git a/boards/native/native_posix/native_posix_64_defconfig b/boards/native/native_posix/native_posix_64_defconfig
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
diff --git a/boards/native/native_sim/native_sim_64.dts b/boards/native/native_sim/native_sim_64.dts
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2023 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "native_sim.dts"
diff --git a/boards/native/native_sim/native_sim_64_defconfig b/boards/native/native_sim/native_sim_64_defconfig
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=1000000
diff --git a/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_xip.dts b/boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_xip.dts
@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54h20dk_nrf54h20_cpuppr.dts"
diff --git a/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_defconfig b/boards/nxp/lpcxpresso55s69/lpcxpresso55s69_defconfig
diff --git a/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7.dts b/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7.dts
diff --git a/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7_defconfig b/boards/nxp/vmu_rt1170/vmu_rt1170_mimxrt1176_cm7_defconfig
diff --git a/boards/openisa/rv32m1_vega/rv32m1_vega_openisa_rv32m1_ri5cy_defconfig b/boards/openisa/rv32m1_vega/rv32m1_vega_openisa_rv32m1_ri5cy_defconfig
diff --git a/boards/openisa/rv32m1_vega/rv32m1_vega_openisa_rv32m1_zero_riscy_defconfig b/boards/openisa/rv32m1_vega/rv32m1_vega_openisa_rv32m1_zero_riscy_defconfig
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright 2018 Foundries.io Ltd
+
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_MULTI_LEVEL_INTERRUPTS=y
diff --git a/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.dts b/boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp.dts
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/dts-v1/;
+
+#include <virt.dtsi>
+
+/ {
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &ram0;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.dts b/boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp.dts
@@ -0,0 +1,18 @@
+/* Copyright (c) 2019 BayLibre SAS */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/dts-v1/;
+
+#include <virt.dtsi>
+
+/ {
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &ram0;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/boards/sipeed/longan_nano/longan_nano_gd32vf103_lite_defconfig b/boards/sipeed/longan_nano/longan_nano_gd32vf103_lite_defconfig
@@ -0,0 +1,15 @@
+# Sipeed longan nano Development Board Configuration
+#
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_GD32_HXTAL_8MHZ=y
+
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_GPIO=y
diff --git a/boards/snps/em_starterkit/em_starterkit_defconfig b/boards/snps/em_starterkit/em_starterkit_defconfig
diff --git a/boards/snps/nsim/nsim_nsim_hs_hostlink_defconfig b/boards/snps/nsim/nsim_nsim_hs_hostlink_defconfig
@@ -1,14 +1,10 @@
 # SPDX-License-Identifier: Apache-2.0
 
 CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
-CONFIG_XIP=n
-CONFIG_BUILD_NO_GAP_FILL=y
 CONFIG_BUILD_OUTPUT_BIN=n
 CONFIG_ARCV2_INTERRUPT_UNIT=y
 CONFIG_ARCV2_TIMER=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
-CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_ARC_MPU_ENABLE=y
-CONFIG_GPIO=y
diff --git a/samples/modules/lvgl/demos/boards/native_posix_64.overlay b/samples/modules/lvgl/demos/boards/native_posix_64.overlay
@@ -0,0 +1,11 @@
+/*
+ * Copyright (c) 2023, Fabian Blatz <fabianblatz@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&sdl_dc {
+	compatible = "zephyr,sdl-dc";
+	height = <272>;
+	width = <480>;
+};
