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3 files changed +33
-72
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/*
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- * Copyright (c) 2021-2024 Telink Semiconductor
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+ * Copyright (c) 2021-2025 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Telink B91 specific registers. */
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#if defined(CONFIG_TELINK_B9X_PFT_ARCH ) && defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus; \
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- uint32_t ucode \
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- #define SOC_ESF_INIT \
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- 0xdeadbaad, \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS \
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+ uint32_t mxstatus; \
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+ uint32_t ucode
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0; \
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- (soc_context)->ucode = 0
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+ #define SOC_ESF_INIT 0, 0
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#elif defined(CONFIG_TELINK_B9X_PFT_ARCH )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS uint32_t mxstatus
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0
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+ #define SOC_ESF_INIT 0
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#elif defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t ucode
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+ #define SOC_ESF_MEMBERS uint32_t ucode
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_INIT 0
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->ucode = 0
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#endif
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- #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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+ #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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- #endif /* SOC_RISCV_TELINK_B9X_SOC_CONTEXT_H */
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+ #endif /* SOC_RISCV_TELINK_B9X_SOC_CONTEXT_H */
Original file line number Diff line number Diff line change 1
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/*
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- * Copyright (c) 2024 Telink Semiconductor
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+ * Copyright (c) 2023-2025 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Telink B91 specific registers. */
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#if defined(CONFIG_TELINK_TLX_PFT_ARCH ) && defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus; \
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- uint32_t ucode \
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- #define SOC_ESF_INIT \
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- 0xdeadbaad, \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS \
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+ uint32_t mxstatus; \
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+ uint32_t ucode
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0; \
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- (soc_context)->ucode = 0
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+ #define SOC_ESF_INIT 0, 0
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#elif defined(CONFIG_TELINK_TLX_PFT_ARCH )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS uint32_t mxstatus
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0
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+ #define SOC_ESF_INIT 0
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#elif defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t ucode
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+ #define SOC_ESF_MEMBERS uint32_t ucode
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_INIT 0
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->ucode = 0
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#endif
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- #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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+ #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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- #endif /* SOC_RISCV_TELINK_TLX_SOC_CONTEXT_H */
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+ #endif /* SOC_RISCV_TELINK_TLX_SOC_CONTEXT_H */
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/*
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- * Copyright (c) 2023 Telink Semiconductor
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+ * Copyright (c) 2023-2025 Telink Semiconductor
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Telink W91 specific registers. */
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#if defined(CONFIG_TELINK_W91_PFT_ARCH ) && defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus; \
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- uint32_t ucode \
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- #define SOC_ESF_INIT \
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- 0xdeadbaad, \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS \
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+ uint32_t mxstatus; \
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+ uint32_t ucode
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0; \
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- (soc_context)->ucode = 0
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+ #define SOC_ESF_INIT 0, 0
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#elif defined(CONFIG_TELINK_W91_PFT_ARCH )
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- #define SOC_ESF_MEMBERS \
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- uint32_t mxstatus
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_MEMBERS uint32_t mxstatus
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->mxstatus = 0
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+ #define SOC_ESF_INIT 0
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#elif defined(__riscv_dsp )
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- #define SOC_ESF_MEMBERS \
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- uint32_t ucode
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+ #define SOC_ESF_MEMBERS uint32_t ucode
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- #define SOC_ESF_INIT \
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- 0xdeadbaad
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+ #define SOC_ESF_INIT 0
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- #define SOC_ESF_THREAD_INIT (soc_context ) \
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- (soc_context)->ucode = 0
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#endif
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- #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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+ #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */
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- #endif /* SOC_RISCV_TELINK_W91_SOC_CONTEXT_H */
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+ #endif /* SOC_RISCV_TELINK_W91_SOC_CONTEXT_H */
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