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jit_uni_x8s8s32x_deconvolution.cpp
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/*******************************************************************************
* Copyright 2020-2025 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
#include "common/dnnl_thread.hpp"
#include "common/nstl.hpp"
#include "common/utils.hpp"
#include "cpu/cpu_primitive.hpp"
#include "cpu/zero_point_utils.hpp"
#include "cpu/x64/injectors/jit_uni_postops_injector.hpp"
#include "cpu/x64/jit_uni_deconv_zp_pad_str_kernel.hpp"
#include "cpu/x64/jit_uni_x8s8s32x_deconvolution.hpp"
#define GET_OFF(field) offsetof(jit_deconv_call_s, field)
namespace dnnl {
namespace impl {
namespace cpu {
namespace x64 {
using namespace dnnl::impl::status;
using namespace dnnl::impl::memory_tracking::names;
using namespace dnnl::impl::utils;
using namespace Xbyak;
using namespace nstl;
#define wht_blk_off(d, g, ...) \
(pd()->with_groups() ? (d).blk_off((g), __VA_ARGS__) \
: (d).blk_off(__VA_ARGS__))
template <cpu_isa_t isa>
status_t jit_uni_x8s8s32x_deconv_fwd_kernel<isa>::init_conf(
jit_conv_conf_t &jcp, const deconvolution_desc_t &cd,
memory_desc_t &src_md, memory_desc_t &weights_md, memory_desc_t &dst_md,
const bool with_bias, memory_desc_t &bias_md, primitive_attr_t &attr,
int nthreads) {
const memory_desc_wrapper src_d(&src_md);
const memory_desc_wrapper dst_d(&dst_md);
const memory_desc_wrapper weights_d(&weights_md);
const memory_desc_wrapper bias_d(&bias_md);
// disabling verbose dispatch checks for unsupported isa for better eadability
if (!mayiuse(isa)) return status::unimplemented;
VDISPATCH_DECONVOLUTION_IC(
one_of(src_d.data_type(), data_type::u8, data_type::s8),
VERBOSE_UNSUPPORTED_DT);
VDISPATCH_DECONVOLUTION_IC(
weights_d.data_type() == data_type::s8, VERBOSE_UNSUPPORTED_DT);
VDISPATCH_DECONVOLUTION_IC(
one_of(dst_d.data_type(), data_type::f32, data_type::s32,
data_type::s8, data_type::u8),
VERBOSE_UNSUPPORTED_DT);
jcp = zero<decltype(jcp)>();
jcp.nthr = nthreads;
const bool with_groups = weights_d.ndims() == src_d.ndims() + 1;
jcp.signed_input = src_d.data_type() == data_type::s8;
const int ndims = jcp.ndims = dst_d.ndims();
const bool is_1d = ndims == 3;
const bool is_2d = ndims == 4;
const bool is_3d = ndims == 5;
const bool is_avx2 = isa == avx2;
jcp.ngroups = with_groups ? weights_d.dims()[0] : 1;
jcp.oc = dst_d.dims()[1] / jcp.ngroups;
jcp.ic = src_d.dims()[1] / jcp.ngroups;
jcp.id = is_3d ? src_d.dims()[2] : 1;
jcp.oc_without_padding = dst_d.dims()[1] / jcp.ngroups;
jcp.ic_without_padding = src_d.dims()[1] / jcp.ngroups;
jcp.is_depthwise = true && with_groups
&& utils::everyone_is(
1, jcp.ic_without_padding, jcp.oc_without_padding);
jcp.has_vnni = mayiuse(avx2_vnni);
/* TODO: future work, on hold until depthwise specialized kernel is
* implemented. */
VDISPATCH_DECONVOLUTION_IC(
!(jcp.is_depthwise && (jcp.signed_input || is_3d)),
VERBOSE_UNSUPPORTED_FEATURE,
"unsupported depthwise implementation for 3D convolution/signed "
"input");
VDISPATCH_DECONVOLUTION_IC(
zero_points_valid(&attr), VERBOSE_UNSUPPORTED_ZP_CFG);
jcp.src_zero_point = !attr.zero_points_.has_default_values(DNNL_ARG_SRC);
jcp.dst_zero_point = !attr.zero_points_.has_default_values(DNNL_ARG_DST);
jcp.zp_src_is_common = attr.zero_points_.get_mask(DNNL_ARG_SRC) == 0;
format_tag_t dat_tag = utils::pick(
ndims - 3, format_tag::nwc, format_tag::nhwc, format_tag::ndhwc);
if (src_d.format_kind() == format_kind::any) {
CHECK(memory_desc_init_by_tag(src_md, dat_tag));
jcp.src_tag = dat_tag;
} else {
jcp.src_tag = src_d.matches_one_of_tag(dat_tag);
}
VDISPATCH_DECONVOLUTION_IC(
jcp.src_tag == dat_tag, VERBOSE_UNSUPPORTED_TAG_S, "src");
if (dst_d.format_kind() == format_kind::any) {
CHECK(memory_desc_init_by_tag(dst_md, dat_tag));
jcp.dst_tag = dat_tag;
} else {
jcp.dst_tag = dst_d.matches_one_of_tag(dat_tag);
}
VDISPATCH_DECONVOLUTION_IC(
jcp.dst_tag == dat_tag, VERBOSE_UNSUPPORTED_TAG_S, "dst");
auto set_or_check_wei_format = [&]() {
using namespace format_tag;
format_tag_t wei_tag;
if (jcp.ic_block == 8 || jcp.ch_block == 8) {
if (is_1d) {
wei_tag = with_groups ? jcp.is_depthwise ? Goiw8g : gOIw2i8o4i
: OIw2i8o4i;
} else if (is_2d) {
wei_tag = with_groups ? jcp.is_depthwise ? Goihw8g : gOIhw2i8o4i
: OIhw2i8o4i;
} else {
wei_tag = with_groups ? gOIdhw2i8o4i : OIdhw2i8o4i;
}
} else {
if (is_avx2) {
assert(with_groups && jcp.ic_block == 4);
wei_tag = is_3d ? gOIdhw4o4i : is_2d ? gOIhw4o4i : gOIw4o4i;
} else {
if (is_1d) {
wei_tag = with_groups ? jcp.is_depthwise ? Goiw4g : gOIw4o4i
: OIw4o4i;
} else if (is_2d) {
wei_tag = with_groups
? jcp.is_depthwise ? Goihw4g : gOIhw4o4i
: OIhw4o4i;
} else {
wei_tag = with_groups ? gOIdhw4o4i : OIdhw4o4i;
}
}
}
memory_desc_t want_wei_md = weights_md;
CHECK_BOOL(memory_desc_init_by_tag(want_wei_md, wei_tag));
if (jcp.signed_input && !jcp.is_depthwise) {
want_wei_md.extra.flags = 0
| memory_extra_flags::compensation_conv_s8s8
| memory_extra_flags::scale_adjust;
want_wei_md.extra.compensation_mask = (1 << 0)
+ (with_groups && !jcp.is_depthwise ? (1 << 1) : 0);
want_wei_md.extra.scale_adjust = jcp.has_vnni ? 1.f : 0.5f;
}
if (jcp.src_zero_point) set_zp_src_comp_flags(want_wei_md, with_groups);
if (weights_md.format_kind == format_kind::any) {
weights_md = want_wei_md;
return true;
}
return weights_md == want_wei_md;
};
jcp.with_bias = with_bias;
if (jcp.with_bias) {
if (bias_d.format_kind() == format_kind::any)
CHECK(memory_desc_init_by_tag(bias_md, format_tag::x));
}
jcp.prop_kind = cd.prop_kind;
jcp.mb = src_d.dims()[0];
jcp.ih = is_1d ? 1 : src_d.dims()[ndims - 2];
jcp.iw = src_d.dims()[ndims - 1];
jcp.od = is_3d ? dst_d.dims()[2] : 1;
jcp.oh = is_1d ? 1 : dst_d.dims()[ndims - 2];
jcp.ow = dst_d.dims()[ndims - 1];
jcp.kd = is_3d ? weights_d.dims()[with_groups + 2] : 1;
jcp.kh = is_1d ? 1 : weights_d.dims()[with_groups + ndims - 2];
jcp.kw = weights_d.dims()[with_groups + ndims - 1];
jcp.f_pad = is_3d ? cd.padding[0][0] : 0;
jcp.t_pad = is_1d ? 0 : cd.padding[0][ndims - 4];
jcp.l_pad = cd.padding[0][ndims - 3];
jcp.stride_d = is_3d ? cd.strides[0] : 1;
jcp.stride_h = is_1d ? 1 : cd.strides[ndims - 4];
jcp.stride_w = cd.strides[ndims - 3];
if (jcp.is_depthwise) {
jcp.ch_block = is_avx2 ? 8 : 4;
jcp.oc_block = 1;
jcp.ic_block = 1;
} else {
jcp.ch_block = 1;
jcp.oc_block = is_avx2 ? 8 : 4;
jcp.ic_block = is_avx2 ? 8 : 4;
if (jcp.ngroups == 1) {
jcp.oc = utils::rnd_up(jcp.oc_without_padding, jcp.oc_block);
jcp.ic = utils::rnd_up(jcp.ic_without_padding, jcp.ic_block);
} else if (jcp.ngroups != 1
&& ((jcp.ic % jcp.ic_block != 0)
|| (jcp.oc % jcp.oc_block != 0))) {
/* For grouped convolution, oneDNN doesn't support padding.
* When channel per group is not multiple of 8 in avx2:
* - Use Xmm when channels per groups is multiple of 4.
* - Otherwise return unimplemented */
jcp.oc_block = jcp.ic_block = 4;
}
VDISPATCH_DECONVOLUTION_IC(
!(jcp.ic % jcp.ic_block != 0 || jcp.oc % jcp.oc_block != 0),
VERBOSE_BLOCKING_FAIL, "bad blocking dimensions");
}
VDISPATCH_DECONVOLUTION_IC(
set_or_check_wei_format(), VERBOSE_UNSUPPORTED_TAG_S, "weights");
jcp.dilate_d = is_3d ? cd.dilates[0] : 0;
jcp.dilate_h = is_1d ? 0 : cd.dilates[ndims - 4];
jcp.dilate_w = cd.dilates[ndims - 3];
VDISPATCH_DECONVOLUTION_IC(
!(!IMPLICATION(jcp.dilate_d, jcp.stride_d == 1)
|| !IMPLICATION(jcp.dilate_h, jcp.stride_h == 1)
|| !IMPLICATION(jcp.dilate_w, jcp.stride_w == 1)),
VERBOSE_UNSUPPORTED_FEATURE,
"unsupported shape with 'stride = 1' when 'dilate > 0'");
const int ext_kw = calculate_extended_filter_size(jcp.kw, jcp.dilate_w);
const int ext_kh = calculate_extended_filter_size(jcp.kh, jcp.dilate_h);
const int ext_kd = calculate_extended_filter_size(jcp.kd, jcp.dilate_d);
jcp.r_pad = calculate_end_padding(
jcp.l_pad, jcp.iw, jcp.ow, jcp.stride_w, ext_kw);
jcp.b_pad = calculate_end_padding(
jcp.t_pad, jcp.ih, jcp.oh, jcp.stride_h, ext_kh);
jcp.back_pad = calculate_end_padding(
jcp.f_pad, jcp.id, jcp.od, jcp.stride_d, ext_kd);
const bool kernel_outside_src = false || ext_kw <= jcp.l_pad
|| ext_kw <= jcp.r_pad || ext_kh <= jcp.t_pad || ext_kh <= jcp.b_pad
|| ext_kd <= jcp.f_pad || ext_kd <= jcp.back_pad;
VDISPATCH_DECONVOLUTION_IC(!kernel_outside_src,
VERBOSE_UNSUPPORTED_PAD_FEATURE, "weight and src size mismatch");
CHECK(attr.set_default_formats(&dst_md));
VDISPATCH_DECONVOLUTION_IC(
post_ops_ok(jcp, dst_d, attr), VERBOSE_UNSUPPORTED_POSTOP);
const auto &p = attr.post_ops_;
const int eltwise_ind = p.find(primitive_kind::eltwise);
jcp.with_eltwise = eltwise_ind != -1;
if (jcp.with_eltwise) jcp.eltwise = p.entry_[eltwise_ind].eltwise;
const int binary_ind = p.find(primitive_kind::binary);
const int prelu_ind = p.find(primitive_kind::prelu);
jcp.with_binary = !everyone_is(-1, binary_ind, prelu_ind);
const int sum_ind = p.find(primitive_kind::sum);
jcp.with_sum = sum_ind != -1;
const auto &wei_scales = attr.scales_.get(DNNL_ARG_WEIGHTS);
const auto &dst_scales = attr.scales_.get(DNNL_ARG_DST);
jcp.is_oc_scale = wei_scales.get_mask() > 0;
jcp.dst_scale = !dst_scales.has_default_values();
jcp.post_ops = p;
jcp.dst_dt = dst_d.data_type();
jcp.bia_dt = jcp.with_bias ? bias_d.data_type() : data_type::undef;
jcp.typesize_bia
= jcp.with_bias ? types::data_type_size(bias_d.data_type()) : 0;
jcp.typesize_in = types::data_type_size(src_d.data_type());
jcp.typesize_out = types::data_type_size(dst_d.data_type());
jcp.nb_ch = div_up(jcp.ngroups, jcp.ch_block);
jcp.nb_oc = jcp.oc / jcp.oc_block;
jcp.nb_ic = jcp.ic / jcp.ic_block;
/* kernel blocking params */
const int regs = jcp.has_vnni ? 14 : 12;
jcp.nb_ch_blocking = 1;
jcp.nb_oc_blocking = nstl::min(4, jcp.nb_oc);
for (; jcp.nb_oc_blocking > 1; jcp.nb_oc_blocking--)
if (jcp.nb_oc % jcp.nb_oc_blocking == 0
&& jcp.l_pad <= regs / (jcp.nb_oc_blocking + 1))
break;
jcp.ur_w = regs / (jcp.nb_oc_blocking + 1);
const int l_overflow = max(
0, ((jcp.kw - 1) * (jcp.dilate_w + 1) - jcp.l_pad) / jcp.stride_w);
if (jcp.ow < jcp.ur_w) {
jcp.ur_w = jcp.ow;
jcp.ur_w_tail = 0;
} else {
for (; jcp.ur_w >= 1; jcp.ur_w--) {
/* ur_w should be multiple of stride_w in order
to simplify logic for get_ow_start and get_ow_end */
const bool is_multiple_of_stride = jcp.ur_w % jcp.stride_w == 0;
/* boundary conditions:
These conditions ensure all elements close to boundary
are computed in a single call of compute loop */
const bool left_boundary_covered
= jcp.ur_w >= l_overflow * jcp.stride_w;
jcp.ur_w_tail = jcp.ow % jcp.ur_w;
const int r_overflow_no_tail = max(0,
((jcp.kw - 1) * (jcp.dilate_w + 1) - max(0, jcp.r_pad)
- jcp.ur_w_tail)
/ jcp.stride_w);
const bool right_boundary_covered
= jcp.ur_w >= r_overflow_no_tail * jcp.stride_w;
if (is_multiple_of_stride && left_boundary_covered
&& right_boundary_covered)
break;
else if (jcp.ur_w == 1)
/* The boundary conditions above are also important
to maintain simplicity of calls to icb_loop,
if those conditions are not satisfied,
then special cases will need to be added
to use correct l_overflow/r_overflow values
when different iterations of compute loop
work on the locations close to boundary.
So to keep code simple, return unimplemented
for extreme case when a good ur_w cannot be found.
*/
return status::unimplemented;
}
}
jcp.wei_adj_scale
= (weights_d.extra().flags & memory_extra_flags::scale_adjust)
? weights_d.extra().scale_adjust
: 1.f;
jcp.loop_order = jcp.ngroups > 1 ? loop_ngc : loop_cgn;
return status::success;
}
template <cpu_isa_t isa>
jit_uni_x8s8s32x_deconv_fwd_kernel<isa>::jit_uni_x8s8s32x_deconv_fwd_kernel(
const jit_conv_conf_t &ajcp, const primitive_attr_t &attr,
const memory_desc_wrapper &dst_d)
: kernel_(nullptr) {
const int ch_block = ajcp.is_depthwise ? ajcp.ch_block : ajcp.ic_block;
switch (ch_block) {
case 8:
if (isa == avx2) {
kernel_ = utils::make_unique<
_jit_avx2_x8s8s32x_deconv_fwd_kernel>(
ajcp, attr, dst_d);
return;
} else {
assert(!"invalid channel blocking for current ISA");
}
break;
case 4:
kernel_ = utils::make_unique<
_jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Xbyak::Xmm>>(
ajcp, attr, dst_d);
return;
default: assert(!"invalid channel blocking");
}
}
template <cpu_isa_t isa>
jit_uni_x8s8s32x_deconv_fwd_kernel<isa>::~jit_uni_x8s8s32x_deconv_fwd_kernel()
= default;
template <cpu_isa_t isa>
void jit_uni_x8s8s32x_deconv_fwd_kernel<isa>::init_scratchpad(
memory_tracking::registrar_t &scratchpad, const jit_conv_conf_t &jcp,
const primitive_attr_t &attr) {
const int mask = attr.scales_.get_mask(DNNL_ARG_WEIGHTS);
const dim_t scales_count
= mask == 0 ? 1 : static_cast<dim_t>(jcp.oc) * jcp.ngroups;
dim_t count = nstl::max<dim_t>(scales_count, 8);
scratchpad.book<float>(key_conv_adjusted_scales, count);
if (zp::should_calculate_deconv_zp_src_pad_str_comp(jcp)) {
const auto zp_pad_comp_size
= static_cast<size_t>(jcp.oc_without_padding) * jcp.ngroups
* jcp.kd * jcp.kh * jcp.kw;
scratchpad.book<int32_t>(key_deconv_zp, zp_pad_comp_size);
}
}
template <cpu_isa_t isa>
bool jit_uni_x8s8s32x_deconv_fwd_kernel<isa>::post_ops_ok(jit_conv_conf_t &jcp,
const memory_desc_wrapper &dst_d, const primitive_attr_t &attr) {
using namespace injector;
return injector::post_ops_ok(post_ops_ok_args_t(isa, {sum, eltwise, binary},
attr.post_ops_, &dst_d, false /*sum_at_pos_0_only*/,
false /*sum_requires_scale_one*/, false /*sum_requires_zp_zero*/,
true /*sum_requires_same_params*/,
{broadcasting_strategy_t::per_oc,
broadcasting_strategy_t::scalar}));
}
template <cpu_isa_t isa, typename Vmm>
_jit_uni_x8s8s32x_deconv_fwd_kernel<isa,
Vmm>::_jit_uni_x8s8s32x_deconv_fwd_kernel(const jit_conv_conf_t &ajcp,
const primitive_attr_t &attr, const memory_desc_wrapper &dst_d)
: jit_generator_t(jit_name(), isa)
, jcp_(ajcp)
, postops_injector_(nullptr)
, ker_max_regs_(jcp_.has_vnni ? 14 : 12) {
if (jcp_.with_eltwise || jcp_.with_binary || jcp_.with_sum) {
const std::size_t tail_size = get_tail_size();
static constexpr bool preserve_gpr = true;
static constexpr bool preserve_vmm = true;
static constexpr bool use_exact_tail_scalar_bcast = false;
static constexpr size_t vmm_helper_idx = 15;
const binary_injector::rhs_arg_static_params_t rhs_sp {vmm_helper_idx,
this->r14, this->r15, this->r13, preserve_gpr, preserve_vmm,
GET_OFF(post_ops_binary_rhs_arg_vec), GET_OFF(dst_orig), dst_d,
tail_size, Xbyak::Opmask(2), use_exact_tail_scalar_bcast};
const binary_injector::static_params_t bsp {this->param1_, rhs_sp};
postops_injector_ = utils::make_unique<
injector::jit_uni_postops_injector_t<isa, Vmm>>(
this, jcp_.post_ops, bsp);
}
}
template <cpu_isa_t isa, typename Vmm>
_jit_uni_x8s8s32x_deconv_fwd_kernel<isa,
Vmm>::~_jit_uni_x8s8s32x_deconv_fwd_kernel()
= default;
template <cpu_isa_t isa, typename Vmm>
Vmm _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::vmm_out(
int i_ur, int i_oc) const {
const int idx = i_ur * jcp_.nb_oc_blocking + i_oc;
assert(idx < ker_max_regs_);
/* remap the reg indices to avoid using xmm0 in eltwise injector */
return Vmm(15 - idx);
}
template <cpu_isa_t isa, typename Vmm>
Vmm _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::vmm_inp(
int i_ic, int nb_x_blocking) const {
const int idx = i_ic + nb_x_blocking * jcp_.ur_w;
assert(idx < ker_max_regs_);
return Vmm(15 - idx);
}
template <cpu_isa_t isa, typename Vmm>
int _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::get_ow_start(
int ki, int l_overflow) const noexcept {
int res = (jcp_.ow - 1 + jcp_.r_pad) % jcp_.stride_w
+ l_overflow * jcp_.stride_w
- (jcp_.kw - 1 - ki) * (jcp_.dilate_w + 1);
while (res < 0)
res += jcp_.stride_w;
return res;
}
template <cpu_isa_t isa, typename Vmm>
int _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::get_ow_end(
int ur_w, int ki, int r_overflow) const noexcept {
if (utils::one_of(ur_w, jcp_.ow, jcp_.ur_w_tail))
ur_w += nstl::min(0, jcp_.r_pad); // remove negative padding
int res = (ur_w - 1 + jcp_.l_pad) % jcp_.stride_w
+ r_overflow * jcp_.stride_w - ki * (jcp_.dilate_w + 1);
while (res < 0)
res += jcp_.stride_w;
return ur_w - res;
}
template <cpu_isa_t isa, typename Vmm>
int _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::get_blocking_size()
const noexcept {
return jcp_.is_depthwise ? jcp_.ch_block : jcp_.oc_block;
}
template <cpu_isa_t isa, typename Vmm>
int _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::get_tail_size()
const noexcept {
return jcp_.is_depthwise ? jcp_.ngroups % jcp_.ch_block
: jcp_.oc_without_padding % jcp_.oc_block;
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::compute(
const Vmm vreg_acc, const Vmm vreg_wei, const Vmm vreg_src) {
if (jcp_.has_vnni) {
vpdpbusd(vreg_acc, vreg_src, vreg_wei, Xbyak::VexEncoding);
} else if (jcp_.is_depthwise) {
uni_vmovups(vmm_tmp_, vreg_src);
uni_vpmulld(vmm_tmp_, vmm_tmp_, vreg_wei);
uni_vpaddd(vreg_acc, vreg_acc, vmm_tmp_);
} else {
uni_vpmaddubsw(vmm_tmp_, vreg_src, vreg_wei);
uni_vpmaddwd(vmm_tmp_, vmm_tmp_, vmm_one_);
uni_vpaddd(vreg_acc, vreg_acc, vmm_tmp_);
}
}
template <cpu_isa_t isa, typename Vmm>
std::function<Vmm()> _jit_uni_x8s8s32x_deconv_fwd_kernel<isa,
Vmm>::prepare_round_robin_vmm_inp_generator(int ur_w) const noexcept {
const int start_vmm_idx = vmm_inp(ur_w - 1, jcp_.nb_oc_blocking).getIdx();
const int end_vmm_idx = vmm_inp(0, jcp_.nb_oc_blocking).getIdx() + 1;
int current_vmm_idx = start_vmm_idx;
return [current_vmm_idx, start_vmm_idx, end_vmm_idx]() mutable {
const Vmm vmm {static_cast<int>(current_vmm_idx++)};
if (current_vmm_idx == end_vmm_idx) current_vmm_idx = start_vmm_idx;
return vmm;
};
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::apply_zp_src_pad_str_comp(
int ur_w, int l_overflow, int r_overflow, bool h_padded) {
Xbyak::Label end_zp_pad, no_tail;
// apply once per icb loop, zp src stride paddding compensation calculate as
// zp_pad_str_compensation = conv(1, weights_s8) * zero_point_source
cmp(reg_icb_, jcp_.nb_ic);
jne(end_zp_pad, T_NEAR);
if (jcp_.ngroups % jcp_.ch_block
|| jcp_.oc_without_padding % jcp_.oc_block) {
if (jcp_.is_depthwise)
cmp(reg_oc_blocks_, jcp_.nb_ch - 1);
else
cmp(reg_oc_blocks_, jcp_.nb_oc - jcp_.nb_oc_blocking);
jne(no_tail, T_NEAR);
append_zp_src_pad_str_comp(
ur_w, l_overflow, r_overflow, h_padded, true /*last_oc_block*/);
jmp(end_zp_pad, T_NEAR);
}
L(no_tail);
append_zp_src_pad_str_comp(
ur_w, l_overflow, r_overflow, h_padded, false /*last_oc_block*/);
L(end_zp_pad);
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::append_zp_src_pad_str_comp(
int ur_w, int l_overflow, int r_overflow, bool h_padded,
bool last_oc_block) {
const auto ®_zp_src_pad_comp = reg_scratch_;
const auto get_next_comp_vmm = prepare_round_robin_vmm_inp_generator(ur_w);
bool base_comp_addr_loaded = false;
const auto load_base_zp_src_pad_comp_addr = [&]() {
if (!base_comp_addr_loaded) {
if (jcp_.ndims == 5) mov(reg_scratch_preserved_, reg_scratch_);
if (jcp_.ndims > 3)
mov(reg_zp_src_pad_comp, zp_src_pad_comp_addr_);
else
mov(reg_zp_src_pad_comp,
qword[param1_ + GET_OFF(zp_src_pad_str_compensation)]);
base_comp_addr_loaded = true;
}
};
const auto load_zp_src_pad_comp = [&](const Vmm zp_pad_comp_vmm,
const Xbyak::Address &comp_addr,
const int ocb) {
const bool is_tail = last_oc_block && ocb == jcp_.nb_oc_blocking - 1;
if (is_tail)
load_data(data_type::s32, zp_pad_comp_vmm, comp_addr,
get_tail_size());
else
uni_vmovups(zp_pad_comp_vmm, comp_addr);
};
const auto get_zp_src_comp_pad_off = [&](int it_kw, int ocb) {
const auto kw_offset = it_kw * jcp_.oc_without_padding * jcp_.ngroups;
const auto oc_offset = ocb * jcp_.oc_block;
return (kw_offset + oc_offset) * sizeof(int32_t);
};
for (int it_kw = 0; it_kw < jcp_.kw; ++it_kw) {
const int ow_start = get_ow_start(it_kw, l_overflow);
const int ow_end = get_ow_end(ur_w, it_kw, r_overflow);
for (int ocb = 0; ocb < jcp_.nb_oc_blocking; ocb++) {
Vmm zp_src_comp_pad_vmm; // will be assigned later
bool ocb_zp_loaded = false;
const auto zp_src_comp_pad_off
= get_zp_src_comp_pad_off(it_kw, ocb);
for (int it_ow = 0; it_ow < ur_w; ++it_ow) {
const bool inside_padded_area = h_padded
|| !(it_ow >= ow_start && it_ow < ow_end
&& ((it_ow + jcp_.l_pad - it_kw) % jcp_.stride_w
== 0));
if (inside_padded_area) {
load_base_zp_src_pad_comp_addr();
if (!ocb_zp_loaded) {
zp_src_comp_pad_vmm = get_next_comp_vmm();
const auto comp_addr = ptr[reg_zp_src_pad_comp
+ zp_src_comp_pad_off];
load_zp_src_pad_comp(
zp_src_comp_pad_vmm, comp_addr, ocb);
ocb_zp_loaded = true;
}
const auto vmm_dst = vmm_out(it_ow, ocb);
uni_vpaddd(vmm_dst, vmm_dst, zp_src_comp_pad_vmm);
}
}
}
}
if (jcp_.ndims > 3) {
if (!base_comp_addr_loaded) load_base_zp_src_pad_comp_addr();
const auto kh_offset = jcp_.kw * jcp_.oc_without_padding * jcp_.ngroups
* sizeof(int32_t);
add(reg_zp_src_pad_comp, kh_offset);
mov(zp_src_pad_comp_addr_, reg_zp_src_pad_comp);
}
if (jcp_.ndims == 5 && base_comp_addr_loaded)
mov(reg_scratch_, reg_scratch_preserved_);
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::compute_ker(int ur_w,
int l_overflow, int r_overflow, ker_block_t last_ic_block_flag,
bool h_padded) {
const bool signed_input_or_src_zp
= (jcp_.signed_input || jcp_.src_zero_point);
const int ch_block_all = jcp_.ch_block * jcp_.ic_block * jcp_.oc_block;
const int ur_w_stride = signed_input_or_src_zp ? 1 : jcp_.stride_w;
const auto src_offset = [this](int oj, int icb, int ki) {
return jcp_.typesize_in
* (((oj + jcp_.l_pad - ki * (jcp_.dilate_w + 1))
/ jcp_.stride_w)
* jcp_.ngroups * jcp_.ic_without_padding
+ icb * 4);
};
const auto kernel_offset = [this, ch_block_all](int ocb, int icb, int ki) {
return jcp_.typesize_in
* ((ocb * jcp_.nb_ic * jcp_.kd * jcp_.kh * jcp_.kw + ki)
* ch_block_all
+ icb * jcp_.oc_block * IC_SUB_STEP);
};
for (int ki = 0; ki < jcp_.kw; ki++) {
const int jj_start = get_ow_start(ki, l_overflow);
const int jj_end = get_ow_end(ur_w, ki, r_overflow);
const int _start = (signed_input_or_src_zp) ? 0 : jj_start;
const int _end = (signed_input_or_src_zp) ? ur_w : jj_end;
const int tail_size = jcp_.is_depthwise ? jcp_.ngroups % jcp_.ch_block
: jcp_.ic_without_padding % 4;
const int n_ic_blocks = jcp_.is_depthwise
? 1
: (last_ic_block_flag != no_last_block ? div_up(
jcp_.ic_without_padding % jcp_.ic_block, 4)
: jcp_.ic_block / 4);
for (int icb1 = 0; icb1 < n_ic_blocks; icb1++) {
if (h_padded) {
/* fill padded area with shifted values */
if (jcp_.signed_input) {
const Vmm inp = vmm_inp(0, jcp_.nb_oc_blocking);
uni_vpxor(inp, inp, inp);
uni_vpsubb(inp, inp, vmm_shift_);
}
} else {
for (int jj = _start; jj < _end; jj += ur_w_stride) {
const int aux_src_off = src_offset(jj, icb1, ki);
const auto vmm_src = vmm_inp(jj, jcp_.nb_oc_blocking);
if (jj >= jj_start && jj < jj_end
&& ((jj + jcp_.l_pad - ki) % jcp_.stride_w == 0)) {
if (jcp_.is_depthwise) {
if (tail_size != 0)
assert(jcp_.nb_oc_blocking == 1);
const bool mask_flag
= last_ic_block_flag != no_last_block
&& tail_size;
load_data(data_type::u8, vmm_src, aux_reg_src_,
aux_src_off,
mask_flag ? tail_size : jcp_.ch_block);
} else if ((last_ic_block_flag == last_sp_block)
&& tail_size != 0 && icb1 == n_ic_blocks - 1) {
const auto vmm_inp_tmp = Xmm(vmm_src.getIdx());
load_bytes(vmm_inp_tmp, aux_reg_src_, aux_src_off,
tail_size);
uni_vpbroadcastd(vmm_src, vmm_inp_tmp);
} else {
uni_vpbroadcastd(
vmm_src, ptr[aux_reg_src_ + aux_src_off]);
}
if (jcp_.signed_input)
uni_vpsubb(vmm_src, vmm_src, vmm_shift_);
} else {
/* fill padded area with shifted values */
if (jcp_.signed_input) {
uni_vpxor(vmm_src, vmm_src, vmm_src);
uni_vpsubb(vmm_src, vmm_src, vmm_shift_);
}
}
}
}
for (int ocb = 0; ocb < jcp_.nb_oc_blocking; ocb++) {
const int aux_filt_off = kernel_offset(ocb, icb1, ki);
if (_end - _start > 0) {
if (jcp_.is_depthwise) {
uni_vpmovsxbd(
vmm_wei_, ptr[aux_reg_filt_ + aux_filt_off]);
} else
uni_vmovups(
vmm_wei_, ptr[aux_reg_filt_ + aux_filt_off]);
}
for (int jj = _start; jj < _end; jj += ur_w_stride) {
const bool inside_padded_area = h_padded
|| !(jj >= jj_start && jj < jj_end
&& ((jj + jcp_.l_pad - ki) % jcp_.stride_w
== 0));
const auto vmm_dst = vmm_out(jj, ocb);
if (jcp_.signed_input || !inside_padded_area) {
const Vmm inp = vmm_inp(
h_padded ? 0 : jj, jcp_.nb_oc_blocking);
compute(vmm_dst, vmm_wei_, inp);
}
}
}
}
}
if (zp::should_calculate_deconv_zp_src_pad_str_comp(jcp_))
apply_zp_src_pad_str_comp(ur_w, l_overflow, r_overflow, h_padded);
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::kh_loop(int ur_w,
int l_overflow, int r_overflow, ker_block_t last_ic_block_flag) {
const bool signed_input_or_src_zp
= (jcp_.signed_input || jcp_.src_zero_point);
const int ch_block_all = jcp_.ch_block * jcp_.ic_block * jcp_.oc_block;
const int shift_src_ih = jcp_.typesize_in * (jcp_.dilate_h + 1) * jcp_.iw
* jcp_.ngroups * jcp_.ic_without_padding;
const int shift_src_id = jcp_.typesize_in * (jcp_.dilate_d + 1) * jcp_.ih
* jcp_.iw * jcp_.ngroups * jcp_.ic_without_padding;
const int stride_h = signed_input_or_src_zp ? 1 : jcp_.stride_h;
const int shift_filt_kh
= jcp_.typesize_in * jcp_.kw * ch_block_all * stride_h;
const int stride_d = signed_input_or_src_zp ? 1 : jcp_.stride_d;
const int shift_filt_kd
= jcp_.typesize_in * jcp_.kw * ch_block_all * jcp_.kh * stride_d;
Label kd_loop_label, kh_loop_label, skip_kh_loop, skip_kd_loop;
Label t_overflow_label, no_t_overflow_label, b_overflow_label,
no_b_overflow_label;
Label back_overflow_label, no_back_overflow_label, d_h_overflow_label,
front_overflow_label, no_front_overflow_label, d_h_overflow_label2;
if (jcp_.ndims == 5) {
mov(aux_reg_filt_d_, reg_filt_);
mov(aux_reg_src_d_, reg_src_);
if (signed_input_or_src_zp) {
mov(reg_ki_, ptr[param1_ + GET_OFF(back_overflow)]);
cmp(reg_ki_, 0);
je(no_back_overflow_label, T_NEAR);
L(back_overflow_label);
{
mov(aux_reg_filt_, aux_reg_filt_d_);
mov(reg_kh_, jcp_.kh);
L(d_h_overflow_label);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_kh_);
jnz(d_h_overflow_label);
}
add(aux_reg_filt_d_, shift_filt_kd);
dec(reg_ki_);
jnz(back_overflow_label);
}
L(no_back_overflow_label);
}
mov(reg_ki_, ptr[param1_ + GET_OFF(kd_padding)]);
if ((signed_input_or_src_zp) || (jcp_.dilate_d >= jcp_.id)
|| (jcp_.kd < jcp_.stride_d)
|| ((!signed_input_or_src_zp)
&& ((min(jcp_.f_pad, jcp_.back_pad) < 0)
|| ((jcp_.kd - 1) * (jcp_.dilate_d + 1)
< nstl::max(
jcp_.f_pad, jcp_.back_pad))))) {
cmp(reg_ki_, 0);
je(skip_kd_loop, T_NEAR);
}
L(kd_loop_label);
mov(aux_reg_src_, aux_reg_src_d_);
mov(aux_reg_filt_, aux_reg_filt_d_);
} else {
mov(aux_reg_src_, reg_src_);
mov(aux_reg_filt_, reg_filt_);
}
if (signed_input_or_src_zp && jcp_.ndims > 3) {
/* Weights are transposed, so first compute 'bottom' padding. */
mov(reg_overflow_, ptr[param1_ + GET_OFF(b_overflow)]);
cmp(reg_overflow_, 0);
je(no_b_overflow_label, T_NEAR);
L(b_overflow_label);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_overflow_);
cmp(reg_overflow_, 0);
jg(b_overflow_label, T_NEAR);
}
L(no_b_overflow_label);
}
mov(reg_kh_, ptr[param1_ + GET_OFF(kh_padding)]);
if ((signed_input_or_src_zp) || (jcp_.dilate_h >= jcp_.ih)
|| (jcp_.kh < jcp_.stride_h)
|| ((!signed_input_or_src_zp)
&& ((min(jcp_.t_pad, jcp_.b_pad) < 0)
|| ((jcp_.kh - 1) * (jcp_.dilate_h + 1)
< nstl::max(jcp_.t_pad, jcp_.b_pad))))) {
cmp(reg_kh_, 0);
je(skip_kh_loop, T_NEAR);
}
L(kh_loop_label);
{
compute_ker(ur_w, l_overflow, r_overflow, last_ic_block_flag, false);
sub(aux_reg_src_, shift_src_ih);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_kh_);
/* Insert weight compensation in stride 'holes' */
if (signed_input_or_src_zp && jcp_.stride_h > 1) {
Label kh_comp_loop;
cmp(reg_kh_, 0);
je(skip_kh_loop, T_NEAR);
mov(reg_comp_strides_, jcp_.stride_h - 1);
L(kh_comp_loop);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_comp_strides_);
cmp(reg_comp_strides_, 0);
jg(kh_comp_loop, T_NEAR);
}
}
cmp(reg_kh_, 0);
jg(kh_loop_label, T_NEAR);
}
L(skip_kh_loop);
if (signed_input_or_src_zp && jcp_.ndims > 3) {
mov(reg_overflow_, ptr[param1_ + GET_OFF(t_overflow)]);
cmp(reg_overflow_, 0);
je(no_t_overflow_label, T_NEAR);
L(t_overflow_label);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_overflow_);
cmp(reg_overflow_, 0);
jg(t_overflow_label, T_NEAR);
}
L(no_t_overflow_label);
}
if (jcp_.ndims == 5) {
sub(aux_reg_src_d_, shift_src_id);
add(aux_reg_filt_d_, shift_filt_kd);
dec(reg_ki_);
/* Insert weight compensation in stride 'holes' */
if (signed_input_or_src_zp && jcp_.stride_d > 1) {
Label kd_comp_loop, kd_kh_comp_loop;
cmp(reg_ki_, 0);
jz(skip_kd_loop, T_NEAR);
mov(reg_comp_strides_, jcp_.stride_d - 1);
L(kd_comp_loop);
mov(aux_reg_filt_, aux_reg_filt_d_);
mov(reg_kh_, jcp_.kh);
L(kd_kh_comp_loop);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_kh_);
jnz(kd_kh_comp_loop, T_NEAR);
}
add(aux_reg_filt_d_, shift_filt_kd);
dec(reg_comp_strides_);
jnz(kd_comp_loop);
}
cmp(reg_ki_, 0);
jg(kd_loop_label, T_NEAR);
L(skip_kd_loop);
if (signed_input_or_src_zp) {
mov(reg_ki_, ptr[param1_ + GET_OFF(f_overflow)]);
cmp(reg_ki_, 0);
jz(no_front_overflow_label, T_NEAR);
L(front_overflow_label);
{
mov(aux_reg_filt_, aux_reg_filt_d_);
mov(reg_kh_, jcp_.kh);
L(d_h_overflow_label2);
{
compute_ker(ur_w, 0, 0, last_ic_block_flag, true);
add(aux_reg_filt_, shift_filt_kh);
dec(reg_kh_);
jnz(d_h_overflow_label2);
}
add(aux_reg_filt_d_, shift_filt_kd);
dec(reg_ki_);
jnz(front_overflow_label);
}
L(no_front_overflow_label);
}
}
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::prepare_output(int ur_w) {
for (int ocb = 0; ocb < jcp_.nb_oc_blocking; ocb++) {
for (int ur = 0; ur < ur_w; ur++) {
const Vmm vmm = vmm_out(ur, ocb);
uni_vpxor(vmm, vmm, vmm);
}
}
if (jcp_.signed_input) {
const auto xmm_shift = Xbyak::Xmm(vmm_shift_.getIdx());
mov(reg_scratch_, 0x80808080);
uni_vmovq(xmm_shift, reg_scratch_);
uni_vpbroadcastd(vmm_shift_, xmm_shift);
}
}
template <cpu_isa_t isa, typename Vmm>
void _jit_uni_x8s8s32x_deconv_fwd_kernel<isa, Vmm>::cvt2ps(data_type_t type_in,
const Vmm vmm_in, const Reg64 reg, int offset, int load_size) {
load_data(type_in, vmm_in, reg, offset, load_size);