From 8d88e391981c3e44813f7849eb7378daf759d509 Mon Sep 17 00:00:00 2001 From: zhangfei Date: Fri, 21 Mar 2025 10:41:20 +0800 Subject: [PATCH 1/6] riscv64: update intrinsics Signed-off-by: Zhang fei --- cmake/platform.cmake | 12 ++++++++++-- src/cpu/rv64/rvv_nchw_pooling.cpp | 24 ++++++++++++------------ 2 files changed, 22 insertions(+), 14 deletions(-) diff --git a/cmake/platform.cmake b/cmake/platform.cmake index f5de8521cd8..73ea43d7d4c 100644 --- a/cmake/platform.cmake +++ b/cmake/platform.cmake @@ -464,10 +464,18 @@ endif() if (DNNL_TARGET_ARCH STREQUAL "RV64") # Check if the RVV Intrinsics can be compiled with the current toolchain and flags include(CheckCXXSourceCompiles) - check_cxx_source_compiles("#include + check_cxx_source_compiles("#if !defined(__riscv) || !defined(__riscv_v) + #error \"RISC-V or vector extension(RVV) is not supported by the compiler\" + #endif + + #if defined(__riscv_v_intrinsic) && __riscv_v_intrinsic < 12000 + #error \"Wrong intrinsics version, v0.12 or higher is required for gcc or clang\" + #endif + + #include int main() { size_t size = 64; - return vsetvl_e32m2(size); + return __riscv_vsetvl_e32m2(size); };" CAN_COMPILE_RVV_INTRINSICS ) diff --git a/src/cpu/rv64/rvv_nchw_pooling.cpp b/src/cpu/rv64/rvv_nchw_pooling.cpp index 5ded8584251..12d4d5b5466 100644 --- a/src/cpu/rv64/rvv_nchw_pooling.cpp +++ b/src/cpu/rv64/rvv_nchw_pooling.cpp @@ -57,9 +57,9 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, int ow_offset = ow * strideW - padLeft; size_t size = std::min(ow_offset + kerW, inW) - std::max(ow_offset, 0); - size_t cycleLength = vsetvl_e32m8(size); + size_t cycleLength = __riscv_vsetvl_e32m8(size); vfloat32m8_t vmax - = vle32_v_f32m8(&arr_flt_min[0], cycleLength); + = __riscv_vle32_v_f32m8(&arr_flt_min[0], cycleLength); for (int id = std::max(od_offset, 0); id < std::min(od_offset + kerD, inD); id++) @@ -73,34 +73,34 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, size_t iw = 0; for (; iw < size - cycleLength; iw += cycleLength) { - vfloat32m8_t vsrc = vle32_v_f32m8( + vfloat32m8_t vsrc = __riscv_vle32_v_f32m8( &local_src[local_src_offset + iw], cycleLength); - vmax = vfmax_vv_f32m8( + vmax = __riscv_vfmax_vv_f32m8( vsrc, vmax, cycleLength); } - size_t tailLength = vsetvl_e32m8(size - iw); + size_t tailLength = __riscv_vsetvl_e32m8(size - iw); { - vfloat32m8_t vsrc = vle32_v_f32m8( + vfloat32m8_t vsrc = __riscv_vle32_v_f32m8( &local_src[local_src_offset + iw], tailLength); - vmax = vfmax_vv_f32m8( + vmax = __riscv_vfmax_vv_f32m8( vsrc, vmax, tailLength); } } vfloat32m1_t min_scalar; float min = -__FLT_MAX__; - min_scalar = vle32_v_f32m1(&min, 1); + min_scalar = __riscv_vle32_v_f32m1(&min, 1); - cycleLength = vsetvl_e32m8(size); + cycleLength = __riscv_vsetvl_e32m8(size); vfloat32m1_t vred_res; - vred_res = vfredmax_vs_f32m8_f32m1( - vred_res, vmax, min_scalar, cycleLength); + vred_res = __riscv_vfredmax_vs_f32m8_f32m1( + vmax, min_scalar, cycleLength); float red_res; - vse32_v_f32m1(&red_res, vred_res, 1); + __riscv_vse32_v_f32m1(&red_res, vred_res, 1); dst[dst_offset] = red_res; } } From ee0eb528d865e84248d6a22d5a9e49c64d53ca6e Mon Sep 17 00:00:00 2001 From: zhangfei Date: Fri, 21 Mar 2025 13:18:59 +0800 Subject: [PATCH 2/6] riscv64: fix clang-format error Signed-off-by: Zhang fei --- src/cpu/rv64/rvv_nchw_pooling.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu/rv64/rvv_nchw_pooling.cpp b/src/cpu/rv64/rvv_nchw_pooling.cpp index 12d4d5b5466..16c0fe42b98 100644 --- a/src/cpu/rv64/rvv_nchw_pooling.cpp +++ b/src/cpu/rv64/rvv_nchw_pooling.cpp @@ -80,7 +80,8 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, vsrc, vmax, cycleLength); } - size_t tailLength = __riscv_vsetvl_e32m8(size - iw); + size_t tailLength + = __riscv_vsetvl_e32m8(size - iw); { vfloat32m8_t vsrc = __riscv_vle32_v_f32m8( &local_src[local_src_offset + iw], From 62313a2e004e9f8facc4e96efc7f4b281ce71fee Mon Sep 17 00:00:00 2001 From: zhangfei Date: Fri, 21 Mar 2025 15:17:23 +0800 Subject: [PATCH 3/6] riscv64: fix clang-format error Signed-off-by: Zhang fei --- src/cpu/rv64/rvv_nchw_pooling.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/cpu/rv64/rvv_nchw_pooling.cpp b/src/cpu/rv64/rvv_nchw_pooling.cpp index 16c0fe42b98..bb680b2bd6e 100644 --- a/src/cpu/rv64/rvv_nchw_pooling.cpp +++ b/src/cpu/rv64/rvv_nchw_pooling.cpp @@ -58,8 +58,8 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, size_t size = std::min(ow_offset + kerW, inW) - std::max(ow_offset, 0); size_t cycleLength = __riscv_vsetvl_e32m8(size); - vfloat32m8_t vmax - = __riscv_vle32_v_f32m8(&arr_flt_min[0], cycleLength); + vfloat32m8_t vmax = __riscv_vle32_v_f32m8( + &arr_flt_min[0], cycleLength); for (int id = std::max(od_offset, 0); id < std::min(od_offset + kerD, inD); id++) @@ -81,7 +81,7 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, } size_t tailLength - = __riscv_vsetvl_e32m8(size - iw); + = __riscv_vsetvl_e32m8(size - iw); { vfloat32m8_t vsrc = __riscv_vle32_v_f32m8( &local_src[local_src_offset + iw], From 43e1b4afd680ed279653409aa653e1806d0a5f05 Mon Sep 17 00:00:00 2001 From: zhangfei Date: Fri, 21 Mar 2025 15:27:02 +0800 Subject: [PATCH 4/6] riscv64: fix clang-format error Signed-off-by: Zhang fei --- src/cpu/rv64/rvv_nchw_pooling.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/rv64/rvv_nchw_pooling.cpp b/src/cpu/rv64/rvv_nchw_pooling.cpp index bb680b2bd6e..e4a1b566c7f 100644 --- a/src/cpu/rv64/rvv_nchw_pooling.cpp +++ b/src/cpu/rv64/rvv_nchw_pooling.cpp @@ -81,7 +81,7 @@ void MaxPooling(const float *src, float *dst, const dim_t batch, } size_t tailLength - = __riscv_vsetvl_e32m8(size - iw); + = __riscv_vsetvl_e32m8(size - iw); { vfloat32m8_t vsrc = __riscv_vle32_v_f32m8( &local_src[local_src_offset + iw], From 204aa34f2ade949e9b9bcf0bc26558099ad0c780 Mon Sep 17 00:00:00 2001 From: zhangfei Date: Fri, 21 Mar 2025 20:51:12 +0800 Subject: [PATCH 5/6] riscv64: update cmake Signed-off-by: Zhang fei --- cmake/platform.cmake | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/cmake/platform.cmake b/cmake/platform.cmake index 73ea43d7d4c..63b18ef29a3 100644 --- a/cmake/platform.cmake +++ b/cmake/platform.cmake @@ -474,8 +474,7 @@ if (DNNL_TARGET_ARCH STREQUAL "RV64") #include int main() { - size_t size = 64; - return __riscv_vsetvl_e32m2(size); + return 0; };" CAN_COMPILE_RVV_INTRINSICS ) From ffbffffc40657d9779bf41ec1ea543541a646d84 Mon Sep 17 00:00:00 2001 From: zhangfei Date: Sat, 22 Mar 2025 08:01:47 +0800 Subject: [PATCH 6/6] riscv64: update cmake Signed-off-by: Zhang fei --- cmake/platform.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cmake/platform.cmake b/cmake/platform.cmake index 63b18ef29a3..ca9da6c0d16 100644 --- a/cmake/platform.cmake +++ b/cmake/platform.cmake @@ -469,7 +469,7 @@ if (DNNL_TARGET_ARCH STREQUAL "RV64") #endif #if defined(__riscv_v_intrinsic) && __riscv_v_intrinsic < 12000 - #error \"Wrong intrinsics version, v0.12 or higher is required for gcc or clang\" + #error \"RISC-V intrinsics v0.12 or higher is required\" #endif #include