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AlessandroLuoAlessandroLuo
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drivers: ambiq: Correct peripheral instance calculation
This commit corrected ambiq peripheral instance calculations Signed-off-by: Hao Luo <hluo@ambiq.com>
1 parent ee33539 commit 4da4ce3

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5 files changed

+48
-41
lines changed

5 files changed

+48
-41
lines changed

‎drivers/i2c/i2c_ambiq.c

+26-28
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ struct i2c_ambiq_config {
3939
#endif /* CONFIG_I2C_AMBIQ_BUS_RECOVERY */
4040
uint32_t base;
4141
int size;
42+
int inst_idx;
4243
uint32_t bitrate;
4344
const struct pinctrl_dev_config *pcfg;
4445
ambiq_i2c_pwr_func_t pwr_func;
@@ -54,7 +55,6 @@ struct i2c_ambiq_data {
5455
struct k_sem transfer_sem;
5556
i2c_ambiq_callback_t callback;
5657
void *callback_data;
57-
int inst_idx;
5858
uint32_t transfer_status;
5959
bool pm_policy_state_on;
6060
};
@@ -186,6 +186,7 @@ static int i2c_ambiq_write(const struct device *dev, struct i2c_msg *msg, uint16
186186
static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
187187
{
188188
struct i2c_ambiq_data *data = dev->data;
189+
const struct i2c_ambiq_config *cfg = dev->config;
189190

190191
if (!(I2C_MODE_CONTROLLER & dev_config)) {
191192
return -EINVAL;
@@ -206,7 +207,7 @@ static int i2c_ambiq_configure(const struct device *dev, uint32_t dev_config)
206207
}
207208

208209
#ifdef CONFIG_I2C_AMBIQ_DMA
209-
data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[data->inst_idx].buf;
210+
data->iom_cfg.pNBTxnBuf = i2c_dma_tcb_buf[cfg->inst_idx].buf;
210211
data->iom_cfg.ui32NBTxnBufLength = CONFIG_I2C_DMA_TCB_BUFFER_SIZE;
211212
#endif
212213

@@ -343,9 +344,7 @@ static int i2c_ambiq_init(const struct device *dev)
343344

344345
data->iom_cfg.eInterfaceMode = AM_HAL_IOM_I2C_MODE;
345346

346-
if (AM_HAL_STATUS_SUCCESS !=
347-
am_hal_iom_initialize((config->base - IOM0_BASE) / config->size,
348-
&data->iom_handler)) {
347+
if (AM_HAL_STATUS_SUCCESS != am_hal_iom_initialize(config->inst_idx, &data->iom_handler)) {
349348
LOG_ERR("Fail to initialize I2C\n");
350349
return -ENXIO;
351350
}
@@ -420,40 +419,39 @@ static int i2c_ambiq_pm_action(const struct device *dev, enum pm_device_action a
420419
}
421420
#endif /* CONFIG_PM_DEVICE */
422421

423-
#define AMBIQ_I2C_DEFINE(n) \
422+
#define AMBIQ_I2C_DEFINE(n) \
424423
PINCTRL_DT_INST_DEFINE(n); \
425424
static int pwr_on_ambiq_i2c_##n(void) \
426425
{ \
427-
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
428-
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
429-
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
430-
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
431-
return 0; \
426+
uint32_t addr = DT_REG_ADDR(DT_INST_PHANDLE(n, ambiq_pwrcfg)) + \
427+
DT_INST_PHA(n, ambiq_pwrcfg, offset); \
428+
sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
429+
k_busy_wait(PWRCTRL_MAX_WAIT_US); \
430+
return 0; \
432431
} \
433432
static void i2c_irq_config_func_##n(void) \
434433
{ \
435-
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), i2c_ambiq_isr, \
436-
DEVICE_DT_INST_GET(n), 0); \
437-
irq_enable(DT_INST_IRQN(n)); \
434+
IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), i2c_ambiq_isr, \
435+
DEVICE_DT_INST_GET(n), 0); \
436+
irq_enable(DT_INST_IRQN(n)); \
438437
}; \
439438
static struct i2c_ambiq_data i2c_ambiq_data##n = { \
440-
.bus_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.bus_sem, 1, 1), \
441-
.transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1), \
442-
.inst_idx = n, \
443-
}; \
439+
.bus_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.bus_sem, 1, 1), \
440+
.transfer_sem = Z_SEM_INITIALIZER(i2c_ambiq_data##n.transfer_sem, 0, 1)}; \
444441
static const struct i2c_ambiq_config i2c_ambiq_config##n = { \
445-
.base = DT_INST_REG_ADDR(n), \
446-
.size = DT_INST_REG_SIZE(n), \
447-
.bitrate = DT_INST_PROP(n, clock_frequency), \
448-
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
449-
.irq_config_func = i2c_irq_config_func_##n, \
450-
.pwr_func = pwr_on_ambiq_i2c_##n, \
451-
IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \
452-
(.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}),\
453-
.sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \
442+
.base = DT_INST_REG_ADDR(n), \
443+
.size = DT_INST_REG_SIZE(n), \
444+
.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
445+
.bitrate = DT_INST_PROP(n, clock_frequency), \
446+
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
447+
.irq_config_func = i2c_irq_config_func_##n, \
448+
.pwr_func = pwr_on_ambiq_i2c_##n, \
449+
IF_ENABLED(CONFIG_I2C_AMBIQ_BUS_RECOVERY, \
450+
(.scl = GPIO_DT_SPEC_INST_GET_OR(n, scl_gpios, {0}), \
451+
.sda = GPIO_DT_SPEC_INST_GET_OR(n, sda_gpios, {0}),)) }; \
454452
PM_DEVICE_DT_INST_DEFINE(n, i2c_ambiq_pm_action); \
455453
I2C_DEVICE_DT_INST_DEFINE(n, i2c_ambiq_init, PM_DEVICE_DT_INST_GET(n), &i2c_ambiq_data##n, \
456-
&i2c_ambiq_config##n, POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, \
454+
&i2c_ambiq_config##n, POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, \
457455
&i2c_ambiq_driver_api);
458456

459457
DT_INST_FOREACH_STATUS_OKAY(AMBIQ_I2C_DEFINE)

‎drivers/mspi/mspi_ambiq_ap3.c

+10-2
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,14 @@ LOG_MODULE_REGISTER(mspi_ambiq_ap3);
2626
#define PWRCTRL_MAX_WAIT_US 5
2727
#define MSPI_BUSY BIT(2)
2828

29+
#if defined(CONFIG_SOC_APOLLO3_BLUE)
30+
#define MSPI_BASE_ADDR MSPI_BASE
31+
#define MSPI_ADDR_INTERVAL 1
32+
#else
33+
#define MSPI_BASE_ADDR MSPI0_BASE
34+
#define MSPI_ADDR_INTERVAL (MSPI1_BASE - MSPI0_BASE)
35+
#endif
36+
2937
typedef int (*mspi_ambiq_pwr_func_t)(void);
3038
typedef void (*irq_config_func_t)(void);
3139

@@ -1356,8 +1364,8 @@ static DEVICE_API(mspi, mspi_ambiq_driver_api) = {
13561364

13571365
#define MSPI_CONFIG(n) \
13581366
{ \
1359-
.channel_num = (DT_INST_REG_ADDR(n) - MSPI0_BASE) / \
1360-
(DT_INST_REG_SIZE(n) * 4), \
1367+
.channel_num = (DT_INST_REG_ADDR(n) - MSPI_BASE_ADDR) / \
1368+
MSPI_ADDR_INTERVAL, \
13611369
.op_mode = MSPI_OP_MODE_CONTROLLER, \
13621370
.duplex = MSPI_HALF_DUPLEX, \
13631371
.max_freq = MSPI_MAX_FREQ, \

‎drivers/spi/spi_ambiq_bleif.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -180,7 +180,7 @@ static int spi_ambiq_init(const struct device *dev)
180180
}
181181
#endif /* CONFIG_SPI_AMBIQ_BLEIF_TIMING_TRACE */
182182

183-
ret = am_hal_ble_initialize((cfg->base - BLEIF_BASE) / cfg->size, &data->BLEhandle);
183+
ret = am_hal_ble_initialize(0, &data->BLEhandle);
184184
if (ret) {
185185
return ret;
186186
}

‎drivers/spi/spi_ambiq_spic.c

+5-5
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ typedef int (*ambiq_spi_pwr_func_t)(void);
3030
struct spi_ambiq_config {
3131
uint32_t base;
3232
int size;
33+
int inst_idx;
3334
uint32_t clock_freq;
3435
const struct pinctrl_dev_config *pcfg;
3536
ambiq_spi_pwr_func_t pwr_func;
@@ -40,7 +41,6 @@ struct spi_ambiq_data {
4041
struct spi_context ctx;
4142
am_hal_iom_config_t iom_cfg;
4243
void *iom_handler;
43-
int inst_idx;
4444
bool cont;
4545
bool pm_policy_state_on;
4646
};
@@ -190,7 +190,7 @@ static int spi_config(const struct device *dev, const struct spi_config *config)
190190
ctx->config = config;
191191

192192
#ifdef CONFIG_SPI_AMBIQ_DMA
193-
data->iom_cfg.pNBTxnBuf = spi_dma_tcb_buf[data->inst_idx].buf;
193+
data->iom_cfg.pNBTxnBuf = spi_dma_tcb_buf[cfg->inst_idx].buf;
194194
data->iom_cfg.ui32NBTxnBufLength = CONFIG_SPI_DMA_TCB_BUFFER_SIZE;
195195
#endif
196196

@@ -431,8 +431,7 @@ static int spi_ambiq_init(const struct device *dev)
431431
const struct spi_ambiq_config *cfg = dev->config;
432432
int ret = 0;
433433

434-
if (AM_HAL_STATUS_SUCCESS !=
435-
am_hal_iom_initialize((cfg->base - IOM0_BASE) / cfg->size, &data->iom_handler)) {
434+
if (AM_HAL_STATUS_SUCCESS != am_hal_iom_initialize(cfg->inst_idx, &data->iom_handler)) {
436435
LOG_ERR("Fail to initialize SPI\n");
437436
return -ENXIO;
438437
}
@@ -508,10 +507,11 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
508507
static struct spi_ambiq_data spi_ambiq_data##n = { \
509508
SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
510509
SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \
511-
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx).inst_idx = n}; \
510+
SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(n), ctx)}; \
512511
static const struct spi_ambiq_config spi_ambiq_config##n = { \
513512
.base = DT_INST_REG_ADDR(n), \
514513
.size = DT_INST_REG_SIZE(n), \
514+
.inst_idx = (DT_INST_REG_ADDR(n) - IOM0_BASE) / (IOM1_BASE - IOM0_BASE), \
515515
.clock_freq = DT_INST_PROP(n, clock_frequency), \
516516
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
517517
.irq_config_func = spi_irq_config_func_##n, \

‎drivers/spi/spi_ambiq_spid.c

+6-5
Original file line numberDiff line numberDiff line change
@@ -24,12 +24,15 @@ LOG_MODULE_REGISTER(spi_ambiq_spid);
2424

2525
#define AMBIQ_SPID_PWRCTRL_MAX_WAIT_US 5
2626

27+
#define SPID_ADDR_INTERVAL 1
28+
2729
typedef int (*ambiq_spi_pwr_func_t)(void);
2830

2931
struct spi_ambiq_config {
3032
const struct gpio_dt_spec int_gpios;
3133
uint32_t base;
3234
int size;
35+
int inst_idx;
3336
const struct pinctrl_dev_config *pcfg;
3437
ambiq_spi_pwr_func_t pwr_func;
3538
void (*irq_config_func)(void);
@@ -39,7 +42,6 @@ struct spi_ambiq_data {
3942
struct spi_context ctx;
4043
am_hal_ios_config_t ios_cfg;
4144
void *ios_handler;
42-
int inst_idx;
4345
struct k_sem spim_wrcmp_sem;
4446
};
4547

@@ -336,8 +338,7 @@ static int spi_ambiq_init(const struct device *dev)
336338
const struct spi_ambiq_config *cfg = dev->config;
337339
int ret = 0;
338340

339-
if (AM_HAL_STATUS_SUCCESS !=
340-
am_hal_ios_initialize((cfg->base - IOSLAVE_BASE) / cfg->size, &data->ios_handler)) {
341+
if (AM_HAL_STATUS_SUCCESS != am_hal_ios_initialize(cfg->inst_idx, &data->ios_handler)) {
341342
LOG_ERR("Fail to initialize SPID\n");
342343
return -ENXIO;
343344
}
@@ -413,12 +414,12 @@ static int spi_ambiq_pm_action(const struct device *dev, enum pm_device_action a
413414
static struct spi_ambiq_data spi_ambiq_data##n = { \
414415
SPI_CONTEXT_INIT_LOCK(spi_ambiq_data##n, ctx), \
415416
SPI_CONTEXT_INIT_SYNC(spi_ambiq_data##n, ctx), \
416-
.spim_wrcmp_sem = Z_SEM_INITIALIZER(spi_ambiq_data##n.spim_wrcmp_sem, 0, 1), \
417-
.inst_idx = n}; \
417+
.spim_wrcmp_sem = Z_SEM_INITIALIZER(spi_ambiq_data##n.spim_wrcmp_sem, 0, 1)}; \
418418
static const struct spi_ambiq_config spi_ambiq_config##n = { \
419419
.int_gpios = GPIO_DT_SPEC_INST_GET(n, int_gpios), \
420420
.base = DT_INST_REG_ADDR(n), \
421421
.size = DT_INST_REG_SIZE(n), \
422+
.inst_idx = (DT_INST_REG_ADDR(n) - IOSLAVE_BASE) / SPID_ADDR_INTERVAL, \
422423
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
423424
.irq_config_func = spi_irq_config_func_##n, \
424425
.pwr_func = pwr_on_ambiq_spi_##n}; \

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