The processor supports the following instructions: • Data processing instructions where the second source can be either an immediate value or a source register, with no shifts. The data processing instructions include ADD, SUB, AND, ORR, BIC, and EOR. The Arithmetic Logic Unit (ALU) supports all these instructions. • The LDR and STR instructions with positive immediate offset (offset mode). • Branch instruction Also, the processor can handle the following hazards: • Read After Write (RAW) Hazard • LDR Hazard • Control Hazards due to Branch or PC write
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The processor supports the following instructions: • Data processing instructions where the second source can be either an immediate value or a source register, with no shifts. The data processing instructions must include ADD, SUB, AND, ORR, BIC, and EOR. The Arithmetic Logic Unit (ALU) must be extended to support all these instructions but try…
kareemfarahat/32-bit-pipelined-ARM-processor
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The processor supports the following instructions: • Data processing instructions where the second source can be either an immediate value or a source register, with no shifts. The data processing instructions must include ADD, SUB, AND, ORR, BIC, and EOR. The Arithmetic Logic Unit (ALU) must be extended to support all these instructions but try…
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