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@lowRISC

lowRISC

Developing the Silicon Commons

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  1. opentitan opentitan Public

    OpenTitan: Open source silicon root of trust

    SystemVerilog 2.8k 838

  2. ibex ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    SystemVerilog 1.5k 599

  3. ibex-demo-system ibex-demo-system Public

    A demo system for Ibex including debug support and some peripherals

    C 63 54

Repositories

Showing 10 of 147 repositories
  • opentitan Public

    OpenTitan: Open source silicon root of trust

    lowRISC/opentitan’s past year of commit activity
    SystemVerilog 2,794 Apache-2.0 838 1,345 (13 issues need help) 392 Updated Apr 29, 2025
  • lowrisc-nix Public

    lowRISC Nix Packages and Environments

    lowRISC/lowrisc-nix’s past year of commit activity
    Nix 4 MIT 6 1 2 Updated Apr 29, 2025
  • ibex-demo-system Public

    A demo system for Ibex including debug support and some peripherals

    lowRISC/ibex-demo-system’s past year of commit activity
    C 63 Apache-2.0 54 10 7 Updated Apr 29, 2025
  • muntjac Public

    64-bit multicore Linux-capable RISC-V processor

    lowRISC/muntjac’s past year of commit activity
    SystemVerilog 91 Apache-2.0 11 1 0 Updated Apr 28, 2025
  • qemu Public Forked from qemu/qemu

    Fork of QEMU for development of lowRISC platforms (including OpenTitan)

    lowRISC/qemu’s past year of commit activity
    C 5 6,004 9 2 Updated Apr 27, 2025
  • opentitan-provisioning Public

    Reference OpenTitan Provisioning Infrastructure

    lowRISC/opentitan-provisioning’s past year of commit activity
    Go 5 Apache-2.0 5 13 0 Updated Apr 26, 2025
  • ot-sca Public

    Side-channel analysis setup for OpenTitan

    lowRISC/ot-sca’s past year of commit activity
    Jupyter Notebook 31 Apache-2.0 28 26 (1 issue needs help) 6 Updated Apr 25, 2025
  • sail Public Forked from rems-project/sail

    Sail architecture definition language

    lowRISC/sail’s past year of commit activity
    Isabelle 0 129 0 0 Updated Apr 25, 2025
  • ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    lowRISC/ibex’s past year of commit activity
    SystemVerilog 1,524 Apache-2.0 599 193 (5 issues need help) 28 Updated Apr 25, 2025
  • sonata-system Public

    A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI

    lowRISC/sonata-system’s past year of commit activity
    SystemVerilog 37 Apache-2.0 21 14 8 Updated Apr 24, 2025
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