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applications: sdp: mspi: Improve setting DQ2, DQ3 initial state #20712

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Mar 26, 2025
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applications: sdp: mspi: Improve setting DQ2, DQ3 initial state #20712

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7615195
applications: sdp: mspi: improve setting and clearing DQ2 and DQ3
magp-nordic Mar 17, 2025
263007e
drivers: mspi: add checking if data pins are not overlapping
magp-nordic Mar 17, 2025
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33 changes: 25 additions & 8 deletions applications/sdp/mspi/src/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,8 @@

#define MAX_SHIFT_COUNT 63

#define CE_PIN_UNUSED UINT8_MAX
#define DATA_PIN_UNUSED UINT8_MAX
#define CE_PIN_UNUSED UINT8_MAX

#define HRT_IRQ_PRIORITY 2
#define HRT_VEVIF_IDX_READ 17
Expand All @@ -50,6 +51,8 @@
#error "Unsupported SoC for SDP MSPI"
#endif

#define DATA_LINE_INDEX(pinctr_fun) (pinctr_fun - NRF_FUN_SDP_MSPI_DQ0)

BUILD_ASSERT(CONFIG_SDP_MSPI_MAX_RESPONSE_SIZE > 0, "Response max size should be greater that 0");

static const uint8_t pin_to_vio_map[NRFE_MSPI_PINS_MAX] = {
Expand Down Expand Up @@ -341,6 +344,10 @@ static void config_pins(nrfe_mspi_pinctrl_soc_pin_msg_t *pins_cfg)
xfer_params.tx_direction_mask = 0;
xfer_params.rx_direction_mask = 0;

for (uint8_t i = 0; i < DATA_PINS_MAX; i++) {
data_vios[i] = DATA_PIN_UNUSED;
}

for (uint8_t i = 0; i < pins_cfg->pins_count; i++) {
uint32_t psel = NRF_GET_PIN(pins_cfg->pin[i]);
uint32_t fun = NRF_GET_FUN(pins_cfg->pin[i]);
Expand All @@ -364,10 +371,13 @@ static void config_pins(nrfe_mspi_pinctrl_soc_pin_msg_t *pins_cfg)

} else if ((fun >= NRF_FUN_SDP_MSPI_DQ0) && (fun <= NRF_FUN_SDP_MSPI_DQ7)) {

data_vios[data_vios_count] = pin_to_vio_map[pin_number];
WRITE_BIT(xfer_params.tx_direction_mask, data_vios[data_vios_count],
NRFX_ASSERT(DATA_LINE_INDEX(fun) < DATA_PINS_MAX);
NRFX_ASSERT(data_vios[DATA_LINE_INDEX(fun)] == DATA_PIN_UNUSED);

data_vios[DATA_LINE_INDEX(fun)] = pin_to_vio_map[pin_number];
WRITE_BIT(xfer_params.tx_direction_mask, data_vios[DATA_LINE_INDEX(fun)],
VPRCSR_NORDIC_DIR_OUTPUT);
WRITE_BIT(xfer_params.rx_direction_mask, data_vios[data_vios_count],
WRITE_BIT(xfer_params.rx_direction_mask, data_vios[DATA_LINE_INDEX(fun)],
VPRCSR_NORDIC_DIR_INPUT);
data_vios_count++;
} else if (fun == NRF_FUN_SDP_MSPI_SCK) {
Expand Down Expand Up @@ -443,11 +453,18 @@ static void ep_recv(const void *data, size_t len, void *priv)
}

if (dev_config->dev_config.io_mode == MSPI_IO_MODE_SINGLE) {
nrf_vpr_csr_vio_out_or_set(BIT(3));
nrf_vpr_csr_vio_out_or_set(BIT(4));
if (data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)] != DATA_PIN_UNUSED &&
data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)] != DATA_PIN_UNUSED) {
nrf_vpr_csr_vio_out_or_set(
BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)]));
nrf_vpr_csr_vio_out_or_set(
BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)]));
}
} else {
nrf_vpr_csr_vio_out_clear_set(BIT(3));
nrf_vpr_csr_vio_out_clear_set(BIT(4));
nrf_vpr_csr_vio_out_clear_set(
BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ2)]));
nrf_vpr_csr_vio_out_clear_set(
BIT(data_vios[DATA_LINE_INDEX(NRF_FUN_SDP_MSPI_DQ3)]));
}

break;
Expand Down
20 changes: 17 additions & 3 deletions drivers/mspi/mspi_nrfe.c
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Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,8 @@ LOG_MODULE_REGISTER(mspi_nrfe, CONFIG_MSPI_LOG_LEVEL);
#define EP_SEND_TIMEOUT_MS 10
#define EXTREME_DRIVE_FREQ_THRESHOLD 32000000
#define CNT0_TOP_CALCULATE(freq) (NRFX_CEIL_DIV(SystemCoreClock, freq * 2) - 1)
#define DATA_LINE_INDEX(pinctr_fun) (pinctr_fun - NRF_FUN_SDP_MSPI_DQ0)
#define DATA_PIN_UNUSED UINT8_MAX

#ifdef CONFIG_SOC_NRF54L15

Expand Down Expand Up @@ -327,6 +329,11 @@ static int check_pin_assignments(const struct pinctrl_state *state)
uint8_t cs_pins[NRFE_MSPI_PINS_MAX];
uint8_t cs_pins_cnt = 0;
uint32_t psel = 0;
uint32_t pin_fun = 0;

for (uint8_t i = 0; i < NRFE_MSPI_DATA_LINE_CNT_MAX; i++) {
data_pins[i] = DATA_PIN_UNUSED;
}

for (uint8_t i = 0; i < state->pin_cnt; i++) {
psel = NRF_GET_PIN(state->pins[i]);
Expand All @@ -335,7 +342,8 @@ static int check_pin_assignments(const struct pinctrl_state *state)
NRFE_MSPI_PORT_NUMBER);
return -ENOTSUP;
}
switch (NRF_GET_FUN(state->pins[i])) {
pin_fun = NRF_GET_FUN(state->pins[i]);
switch (pin_fun) {
case NRF_FUN_SDP_MSPI_DQ0:
case NRF_FUN_SDP_MSPI_DQ1:
case NRF_FUN_SDP_MSPI_DQ2:
Expand All @@ -344,7 +352,13 @@ static int check_pin_assignments(const struct pinctrl_state *state)
case NRF_FUN_SDP_MSPI_DQ5:
case NRF_FUN_SDP_MSPI_DQ6:
case NRF_FUN_SDP_MSPI_DQ7:
data_pins[data_pins_cnt] = NRF_PIN_NUMBER_TO_PIN(psel);
if (data_pins[DATA_LINE_INDEX(pin_fun)] != DATA_PIN_UNUSED) {
LOG_ERR("This pin is assigned to an already taken data line: "
"%d.%d.",
NRF_PIN_NUMBER_TO_PORT(psel), NRF_PIN_NUMBER_TO_PIN(psel));
return -EINVAL;
}
data_pins[DATA_LINE_INDEX(pin_fun)] = NRF_PIN_NUMBER_TO_PIN(psel);
data_pins_cnt++;
break;
case NRF_FUN_SDP_MSPI_CS0:
Expand All @@ -363,7 +377,7 @@ static int check_pin_assignments(const struct pinctrl_state *state)
}
break;
default:
LOG_ERR("Not supported pin function: %d", NRF_GET_FUN(state->pins[i]));
LOG_ERR("Not supported pin function: %d", pin_fun);
return -ENOTSUP;
}
}
Expand Down