-
Notifications
You must be signed in to change notification settings - Fork 0
6 add binary reader for cycle accurate simulator #10
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Merged
AnthonyFaureGignoux
merged 62 commits into
main
from
6-add-binary-reader-for-cycle-accurate-simulator
May 14, 2025
Merged
6 add binary reader for cycle accurate simulator #10
AnthonyFaureGignoux
merged 62 commits into
main
from
6-add-binary-reader-for-cycle-accurate-simulator
May 14, 2025
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
…thub.com:onera/standalone-vta into 6-add-binary-reader-for-cycle-accurate-simulator
…tps://github.com/onera/standalone-vta into 6-add-binary-reader-for-cycle-accurate-simulator mise a jour
Add BinaryReader Add Test on binary reader
Add integration to ComputeTest
…s element in bits
…ding load instructions
…cted_out for average_pooling
…tps://github.com/onera/standalone-vta into 6-add-binary-reader-for-cycle-accurate-simulator average pooling
…ps all of the sram data
…_out_sram generating completed
…ed (version that works for layer1 but not for average_pooling in ComputeTest)
…g test in ComputeTest (the function no longer generates the right expected_out_sram for lenet5_layer1)
…nary files for layer1 and average_pooling are ok)
…rom compiler_output or a resources folder
AnthonyFaureGignoux
approved these changes
May 14, 2025
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
In this branch, I've implemented BinaryReader, a Scala file that reads binary files and creates a Map that associates, for the data (INP, WGT, OUT), a logical address and the values of the vectors according to the element size, and for ACC and UOP, a physical address (in the DRAM) and the values of the vectors.
BinaryReaderTest tests to see if the binary files are correctly decoded, in a format CHISEL can read. The examples used can be found in resources/examples_compute.
I've also used BinaryReader in ComputeTest, so that the scratchpads can be built using the binary files instead of the json files.
For now, for each test, the base address of UOP and ACC should be input when building the DRAM scratchpad according to the physical base addresses given by compiler/data_definition/memory_addresses.py, depending on which test in ComputeTest we want to run.
I'd like you to check if the tests in BinaryReaderTest are sufficient to make sure the code runs correctly, and that the tests in ComputeTest work with binary files.