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@riscv-non-isa

RISC-V Non-ISA Specifications

The Open-Standard Instruction Set Architecture

Welcome to the RISC-V Non-ISA Specifications 👋

RISC-V Logo

Non-ISA specifications do not add new instructions, create or change opcodes, or in any way modify the RISC-V ISA. They do help us to develop an ecosystem around the ISA Specifications.

Things you'll find here include:

  • ABI Documentation
  • Architecture Tests
  • Specifications like Debug, Processor Trace, and Software Interrupts

If you don't find what you're looking for here, try one of our other GitHub organizations:

Popular repositories Loading

  1. riscv-asm-manual riscv-asm-manual Public

    RISC-V Assembly Programmer's Manual

    Makefile 1.5k 243

  2. riscv-elf-psabi-doc riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    Python 730 165

  3. riscv-arch-test riscv-arch-test Public

    Assembly 530 211

  4. riscv-sbi-doc riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    Makefile 365 94

  5. rvv-intrinsic-doc rvv-intrinsic-doc Public

    C 303 90

  6. riscv-trace-spec riscv-trace-spec Public

    RISC-V Processor Trace Specification

    C 168 48

Repositories

Showing 10 of 35 repositories
  • riscv-external-debug-security Public

    The RISC-V External Debug Security Specification

    riscv-non-isa/riscv-external-debug-security’s past year of commit activity
    Makefile 19 CC-BY-4.0 4 1 1 Updated Jan 14, 2025
  • riscv-c-api-doc Public

    Documentation of the RISC-V C API

    riscv-non-isa/riscv-c-api-doc’s past year of commit activity
    Makefile 74 CC-BY-4.0 42 17 8 Updated Jan 14, 2025
  • riscv-security-model Public

    RISC-V Security Model

    riscv-non-isa/riscv-security-model’s past year of commit activity
    Makefile 29 CC-BY-4.0 15 4 1 Updated Jan 14, 2025
  • riscv-brs Public

    The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSVs) to interoperate with one another by providing expectations for the Operating System (OS) to utilize in acts of device discovery, system management, and other rich operations provided in this specification.

    riscv-non-isa/riscv-brs’s past year of commit activity
    TeX 44 CC-BY-4.0 15 15 1 Updated Jan 13, 2025
  • riscv-acpi-rimt Public

    RISC-V ACPI I/O Mapping Table Specification

    riscv-non-isa/riscv-acpi-rimt’s past year of commit activity
    Makefile 2 CC-BY-4.0 3 0 1 Updated Jan 13, 2025
  • riscv-rpmi Public

    RISC-V Platform Management Interface Specification. OS-agnostic messaging interface for system management and control

    riscv-non-isa/riscv-rpmi’s past year of commit activity
    Makefile 8 CC-BY-4.0 9 2 0 Updated Jan 10, 2025
  • riscv-elf-psabi-doc Public

    A RISC-V ELF psABI Document

    riscv-non-isa/riscv-elf-psabi-doc’s past year of commit activity
    Python 730 CC-BY-4.0 165 56 27 Updated Jan 10, 2025
  • riscv-server-platform Public

    The RISC-V Server Platform specification defines a standardized set of hardware and sofware capabilities, that portable system software, such as operating systems and hypervisors, can rely on being present in a RISC-V server platform.

    riscv-non-isa/riscv-server-platform’s past year of commit activity
    Makefile 10 CC-BY-4.0 5 9 1 Updated Jan 7, 2025
  • riscv-non-isa/riscv-arch-test’s past year of commit activity
    Assembly 530 Apache-2.0 211 48 33 Updated Jan 7, 2025
  • riscv-sbi-doc Public

    Documentation for the RISC-V Supervisor Binary Interface

    riscv-non-isa/riscv-sbi-doc’s past year of commit activity
    Makefile 365 CC-BY-4.0 94 14 4 Updated Jan 7, 2025

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