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riscv: telink: separate ram for tl3218x . #374

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merged 1 commit into from
Jan 20, 2025
Merged

riscv: telink: separate ram for tl3218x . #374

merged 1 commit into from
Jan 20, 2025

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haiwentelink
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@haiwentelink haiwentelink commented Jan 17, 2025 •
edited by s07641069
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  • use retention mode to seperate ram.
  • reserve more ram for ilm.

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@s07641069 already changed , can review again .

@haiwentelink haiwentelink force-pushed the master_seperate_ram branch 2 times, most recently from 06c603b to a6c714e Compare January 20, 2025 08:24
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riscv: telink: seperate ram for tl3218x .
1aea100 
- use retention mode to seperate ram.
- reserve more ram for ilm.

Signed-off-by: Haiwen Xia <haiwen.xia@telink-semi.com>
@haiwentelink haiwentelink merged commit f26a012 into master_ci Jan 20, 2025
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@haiwentelink haiwentelink deleted the master_seperate_ram branch January 20, 2025 11:14
@s07641069 s07641069 changed the title riscv: telink: seperate ram for tl3218x . riscv: telink: separate ram for tl3218x . Jan 20, 2025
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@s07641069 s07641069 Awaiting requested review from s07641069

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