telink: tl321x: update for SOC version 2

- update to V4.0.4.3
- add pwm module in compilation.
- add USB CDC sample in ci build.
- use adc_get_code() to fix reading errors.
- update to 60m mspi to save power.
- clean code for comment code.
- update hal_telink in west.yml.

Signed-off-by: Haiwen Xia <haiwen.xia@telink-semi.com>

Author: haiwentelink

.github/workflows/telink-tl321x-build.yaml

@@ -95,7 +95,7 @@ jobs:
     - name: Build TL321X net/openthread/cli
       run: |
         cd ..
-        west build -b tl3218x     -d build_ot_cli_tl321x                      zephyr/samples/net/openthread/cli              -- -DCONFIG_COMPILER_WARNINGS_AS_ERRORS=y
+        west build -b tl3218x     -d build_ot_cli_tl321x                      zephyr/samples/net/openthread/cli              -- -DCONFIG_COMPILER_WARNINGS_AS_ERRORS=y -DCONFIG_NET_BUF_TX_COUNT=12 -DCONFIG_NET_BUF_RX_COUNT=12
 
     - name: Build TL321X net/openthread/coprocessor in RCP configuration with UART interface
       run: |
@@ -107,6 +107,11 @@ jobs:
         cd ..
         west build -b tl3218x     -d build_usb_console_tl321x                 zephyr/samples/subsys/usb/console              -- -DCONFIG_COMPILER_WARNINGS_AS_ERRORS=y
 
+    - name: Build TL321x subsys/usb/cdc_acm for USB CDC
+      run: |
+        cd ..
+        west build -b tl3218x     -d build_usb_cdc_acm_tl321x                 zephyr/samples/subsys/usb/cdc_acm             -- -DCONFIG_COMPILER_WARNINGS_AS_ERRORS=y
+
     - name: Build TL321X boards/telink/tl321x/basic
       run: |
         cd ..
@@ -148,6 +153,7 @@ jobs:
         cp ../build_ot_cli_tl321x/zephyr/zephyr.bin                     telink_build_artifacts/tl321x_ot_cli.bin
         cp ../build_ot_coprocessor_rcp_uart_tl321x/zephyr/zephyr.bin    telink_build_artifacts/tl321x_ot_coprocessor_rcp_uart.bin
         cp ../build_usb_console_tl321x/zephyr/zephyr.bin                telink_build_artifacts/tl321x_usb_console.bin
+        cp ../build_usb_cdc_acm_tl321x/zephyr/zephyr.bin                telink_build_artifacts/tl321x_usb_cdc_acm.bin
         cp ../build_retention_basic_tl321x/zephyr/zephyr.bin            telink_build_artifacts/tl321x_retention_basic.bin
         cp ../build_ot_echo_client_pm_deep_tl321x/zephyr/zephyr.bin     telink_build_artifacts/tl321x_ot_echo_client_pm_retention.bin
         cp ../build_crypto_mbedtls_tl321x/zephyr/zephyr.bin             telink_build_artifacts/tl321x_mbedtls.bin

drivers/adc/adc_tlx.c

@@ -21,10 +21,6 @@ LOG_MODULE_REGISTER(adc_tlx, CONFIG_ADC_LOG_LEVEL);
 #include <adc.h>
 #include <zephyr/drivers/pinctrl.h>
 
-#if CONFIG_SOC_RISCV_TELINK_TL321X
-#define adc_input_pin_def_e     adc_input_pin_e
-#endif
-
 /* Set ADC resolution value */
 static inline void adc_set_resolution(adc_res_e res)
 {
@@ -155,15 +151,7 @@ static signed short adc_tlx_get_code(void)
 	signed short adc_code;
 
 #if CONFIG_SOC_RISCV_TELINK_TL321X || CONFIG_SOC_RISCV_TELINK_TL721X
-	extern unsigned char g_adc_rx_fifo_index;
-
-	if (g_adc_rx_fifo_index == 0) {
-		adc_code = reg_adc_rxfifo_dat(g_adc_rx_fifo_index);
-		g_adc_rx_fifo_index = 1;
-	} else {
-		adc_code = reg_adc_rxfifo_dat(g_adc_rx_fifo_index);
-		g_adc_rx_fifo_index = 0;
-	}
+	adc_code = adc_get_code();
 #endif
 	return adc_code;
 }

samples/net/openthread/cli/boards/tl3218x.conf

@@ -1,15 +1,19 @@
+# usb
+CONFIG_USB_DEVICE_STACK=y
+CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=n
+
 # Telink relative thread features
 CONFIG_NET_PKT_TXTIME=y
 CONFIG_NET_PKT_TIMESTAMP=y
 CONFIG_OPENTHREAD_NUM_MESSAGE_BUFFERS=35
 
-CONFIG_OPENTHREAD_THREAD_VERSION_1_1=y
-CONFIG_OPENTHREAD_SRP_CLIENT=n
+CONFIG_OPENTHREAD_NUM_MESSAGE_BUFFERS=150
+CONFIG_IEEE802154_TLX_MAC_FLASH=y
+
 CONFIG_OPENTHREAD_JOINER=n
 CONFIG_OPENTHREAD_LINK_METRICS_SUBJECT=n
 CONFIG_OPENTHREAD_BORDER_ROUTER=n
 CONFIG_OPENTHREAD_COMMISSIONER=n
-CONFIG_OPENTHREAD_PING_SENDER=n
 CONFIG_OPENTHREAD_DHCP6_CLIENT=n
 CONFIG_OPENTHREAD_DNS_CLIENT=n
 CONFIG_OPENTHREAD_SLAAC=n
@@ -22,4 +26,3 @@ CONFIG_OPENTHREAD_COAPS=n
 CONFIG_OPENTHREAD_ENABLE_SERVICE=n
 CONFIG_OPENTHREAD_CSL_RECEIVE_TIME_AHEAD=480
 CONFIG_OPENTHREAD_MAX_CHILDREN=5
-CONFIG_IEEE802154_TLX_MAC_FLASH=y

samples/net/openthread/cli/boards/tl3218x.overlay

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2024 Telink Semiconductor
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	chosen {
+		zephyr,shell-uart = &cdc_acm_uart0;
+	};
+};
+
+&zephyr_udc0 {
+	cdc_acm_uart0: cdc_acm_uart0 {
+		compatible = "zephyr,cdc-acm-uart";
+	};
+};

soc/telink/tlsr/telink_tlx/soc.c

@@ -178,7 +178,7 @@ void soc_early_init_hook(void)
 
 #if CONFIG_SOC_RISCV_TELINK_TL321X
 	case CLK_96MHZ:
-		PLL_192M_CCLK_96M_HCLK_48M_PCLK_48M_MSPI_48M;
+		PLL_192M_CCLK_96M_HCLK_48M_PCLK_48M_MSPI_64M;
 		break;
 #endif /* CONFIG_SOC_RISCV_TELINK_TL321X */
 #if CONFIG_SOC_RISCV_TELINK_TL721X
@@ -251,7 +251,7 @@ void soc_tlx_restore(void)
 #endif /* CONFIG_SOC_RISCV_TELINK_TL721X */
 #if CONFIG_SOC_RISCV_TELINK_TL321X
 	case CLK_96MHZ:
-		PLL_192M_CCLK_96M_HCLK_48M_PCLK_48M_MSPI_48M;
+		PLL_192M_CCLK_96M_HCLK_48M_PCLK_48M_MSPI_64M;
 		break;
 #endif /* CONFIG_SOC_RISCV_TELINK_TL321X */
 #if CONFIG_SOC_RISCV_TELINK_TL721X

west.yml

@@ -239,7 +239,7 @@ manifest:
         - hal
     - name: hal_telink
       url: https://github.com/telink-semi/hal_telink
-      revision: 8e116bb74c344c043500425793d76c4d3ae21565
+      revision: 38c66795ef4a79453330a1aed85d1217843a8d05
       path: modules/hal/telink
       groups:
         - hal