drivers: i2c: stm32: don't manage cache aside DMA support

[etienne-lms]

Commit 42c3a78 ("i2c: stm32: Add cache memory support") introduced a call to mem_attr_check_buf() in STM32 I2C driver i2c_ll_stm32_v2.c without adding the config dependency on CONFIG_MEM_ATTR needed. Fix STM32 I2C Kconfig accordingly.
By the way, select CONFIG_CACHE_MANAGEMENT and CONFIG_MEM_ATTR upon CONFIG_DCACHE=y instead of CONFIG_CPU_HAS_DCACHE to better relate to how STM32 I2C driver is implemented.

(edited)

Fix STM32 I2C driver to not call cache management related functions when DMA is not used. This change fixes an issue introduced by commit 42c3a78 ("i2c: stm32: Add cache memory support"). The issue makes boards embedding this driver with both CONFIG_I2C_STM32_V2_DMA and CONFIG_ARCH_MPU disabled to fail to build with an error trace message like the below:

  .../i2c_ll_stm32_v2.c:701: undefined reference to `mem_attr_check_buf'

Fixes: 42c3a78

[etienne-lms]

@sgilbert182, could you have a look at this change. Some build currently fail on STM32 I2C driver and seem related to #81814.

[sgilbert182]

@sgilbert182, could you have a look at this change. Some build currently fail on STM32 I2C driver and seem related to #81814.

Will do, give me an hour or so

[etienne-lms]

For info, my patch was not accurate enough. I've updated it.

[etienne-lms]

By the way, @JarmouniA, looking at other STM32 drivers, I saw some other equivalent potential issues in drivers/adc/adc_stm32.c, drivers/spi/spi_ll_stm32.c and drivers/serial/uart_stm32.c that are hidden by the fact CONFIG_MEM_ATTR is default enabled when CONFIG_ARM_MPU=y which seems the case for the SoCs embedding these drivers. I wonder if equivalent explicit dependencies are worth being also defined in the Kconfig files relative to these drivers. What do you think?

[etienne-lms]

Comment addressed.

[JarmouniA]

looking at other STM32 drivers, I saw some other equivalent potential issues in drivers/adc/adc_stm32.c, drivers/spi/spi_ll_stm32.c and drivers/serial/uart_stm32.c that are hidden by the fact CONFIG_MEM_ATTR is default enabled when CONFIG_ARM_MPU=y which seems the case for the SoCs embedding these drivers.

I don't know if that's really problematic for the time being, since AFAIK STM32 targets that have DCache support (mainly CM7) in Zephyr also have an ARM MPU & it's enabled at the board level.

I wonder if equivalent explicit dependencies are worth being also defined in the Kconfig files relative to these drivers. What do you think?

Maybe, to avoid potential issues later down the road.

[etienne-lms]

@erwango, may I ask your feedback on this change? It's needed to fix issues currently reported by CI tests on various P-Rs.

[etienne-lms]

I wonder if equivalent explicit dependencies are worth being also defined in the Kconfig files relative to these drivers. What do you think?

Maybe, to avoid potential issues later down the road.

FYI I've created #87757.

[etienne-lms]

As discussed above, I restricted this P-R to a change in driver source file.
Cleaning the Kconfig file is still prefer IMHO but I've moved it to #87757 so that the CI tests issue gets fixed quicker.

[erwango]

Nit: Update PR title and description

[pillo79]

Thanks for the hotfix!